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Searched refs:buffer_store_dword (Results 1 – 25 of 151) sorted by relevance

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/external/llvm/test/MC/AMDGPU/
Dmubuf.s201 buffer_store_dword v1, off, s[4:7], s1 label
205 buffer_store_dword v1, off, s[4:7], s1 offset:4 label
209 buffer_store_dword v1, off, s[4:7], s1 offset:4 glc label
213 buffer_store_dword v1, off, s[4:7], s1 offset:4 slc label
217 buffer_store_dword v1, off, s[4:7], s1 offset:4 tfe label
221 buffer_store_dword v1, off, s[4:7], s1 glc tfe label
225 buffer_store_dword v1, off, s[4:7], s1 offset:4 glc slc tfe label
229 buffer_store_dword v1, off, ttmp[4:7], ttmp1 offset:4 glc slc tfe label
237 buffer_store_dword v1, v2, s[4:7], s1 offen label
241 buffer_store_dword v1, v2, s[4:7], s1 offen offset:4 label
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Dcaptured-frame-index.ll6 ; GCN: buffer_store_dword v{{[0-9]+}}, [[ZERO1]]
20 ; GCN-DAG: buffer_store_dword v{{[0-9]+}}, [[ZERO]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen{{$}}
21 ; GCN-DAG: buffer_store_dword v{{[0-9]+}}, [[ZERO]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen offs…
44 ; GCN: buffer_store_dword [[K]], [[ZERO]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen{{$}}
45 ; GCN: buffer_store_dword [[ZERO]], [[ZERO]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen{{$}}
59 ; GCN: buffer_store_dword [[K0]], [[ZERO]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen{{$}}
62 ; GCN: buffer_store_dword [[K1]], [[ZERO]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen offset:2048{{…
65 ; GCN: buffer_store_dword [[OFFSETK]], [[ZERO]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen offset:2…
83 ; GCN: buffer_store_dword v{{[0-9]+}}, [[ZERO]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen{{$}}
84 ; GCN: buffer_store_dword v{{[0-9]+}}, [[ZERO]], s{{\[[0-9]+:[0-9]+\]}}, s{{[0-9]+}} offen offset:4…
[all …]
Dprivate-element-size.ll26 ; HSA-ELT4-DAG: buffer_store_dword {{v[0-9]+}}, v{{[0-9]+}}, s[0:3], s9 offen{{$}}
27 ; HSA-ELT4-DAG: buffer_store_dword {{v[0-9]+}}, v{{[0-9]+}}, s[0:3], s9 offen offset:4{{$}}
28 ; HSA-ELT4-DAG: buffer_store_dword {{v[0-9]+}}, v{{[0-9]+}}, s[0:3], s9 offen offset:8{{$}}
29 ; HSA-ELT4-DAG: buffer_store_dword {{v[0-9]+}}, v{{[0-9]+}}, s[0:3], s9 offen offset:12{{$}}
30 ; HSA-ELT4-DAG: buffer_store_dword {{v[0-9]+}}, v{{[0-9]+}}, s[0:3], s9 offen offset:16{{$}}
31 ; HSA-ELT4-DAG: buffer_store_dword {{v[0-9]+}}, v{{[0-9]+}}, s[0:3], s9 offen offset:20{{$}}
32 ; HSA-ELT4-DAG: buffer_store_dword {{v[0-9]+}}, v{{[0-9]+}}, s[0:3], s9 offen offset:24{{$}}
33 ; HSA-ELT4-DAG: buffer_store_dword {{v[0-9]+}}, v{{[0-9]+}}, s[0:3], s9 offen offset:28{{$}}
84 ; HSA-ELT4-DAG: buffer_store_dword {{v[0-9]+}}, v{{[0-9]+}}, s[0:3], s9 offen{{$}}
85 ; HSA-ELT4-DAG: buffer_store_dword {{v[0-9]+}}, v{{[0-9]+}}, s[0:3], s9 offen offset:4{{$}}
[all …]
Dcopy-illegal-type.ll6 ; SI: buffer_store_dword [[REG]]
16 ; SI: buffer_store_dword [[REG]]
17 ; SI: buffer_store_dword [[REG]]
28 ; SI: buffer_store_dword [[REG]]
29 ; SI: buffer_store_dword [[REG]]
30 ; SI: buffer_store_dword [[REG]]
42 ; SI: buffer_store_dword [[REG]]
43 ; SI: buffer_store_dword [[REG]]
44 ; SI: buffer_store_dword [[REG]]
45 ; SI: buffer_store_dword [[REG]]
[all …]
Dpromote-alloca-stored-pointer-value.ll7 ; GCN: buffer_store_dword v
16 ; GCN: buffer_store_dword v
30 ; GCN: buffer_store_dword v
31 ; GCN: buffer_store_dword v
45 ; GCN: buffer_store_dword
46 ; GCN: buffer_store_dword
47 ; GCN: buffer_store_dword
48 ; GCN: buffer_store_dword
Dindirect-private-64.ll14 ; SI-ALLOCA4: buffer_store_dword v
15 ; SI-ALLOCA4: buffer_store_dword v
39 ; SI-ALLOCA4: buffer_store_dword v
40 ; SI-ALLOCA4: buffer_store_dword v
41 ; SI-ALLOCA4: buffer_store_dword v
42 ; SI-ALLOCA4: buffer_store_dword v
70 ; SI-ALLOCA4: buffer_store_dword v
71 ; SI-ALLOCA4: buffer_store_dword v
96 ; SI-ALLOCA4: buffer_store_dword v
97 ; SI-ALLOCA4: buffer_store_dword v
[all …]
Duse-sgpr-multiple-times.ll13 ; GCN: buffer_store_dword [[RESULT]]
23 ; GCN: buffer_store_dword [[RESULT]]
37 ; GCN: buffer_store_dword [[RESULT]]
58 ; GCN: buffer_store_dword [[RESULT0]]
59 ; GCN: buffer_store_dword [[RESULT1]]
77 ; GCN: buffer_store_dword [[RESULT]]
91 ; GCN: buffer_store_dword [[RESULT]]
101 ; GCN: buffer_store_dword [[RESULT]]
111 ; GCN: buffer_store_dword [[RESULT]]
122 ; GCN: buffer_store_dword [[RESULT]]
[all …]
Dimm.ll35 ; CHECK: buffer_store_dword [[REG]]
43 ; CHECK: buffer_store_dword [[REG]]
51 ; CHECK: buffer_store_dword [[REG]]
59 ; CHECK: buffer_store_dword [[REG]]
67 ; CHECK: buffer_store_dword [[REG]]
75 ; CHECK: buffer_store_dword [[REG]]
83 ; CHECK: buffer_store_dword [[REG]]
91 ; CHECK: buffer_store_dword [[REG]]
99 ; CHECK: buffer_store_dword [[REG]]
107 ; CHECK: buffer_store_dword [[REG]]
[all …]
Damdgpu.work-item-intrinsics.deprecated.ll11 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
26 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
41 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
56 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
71 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
86 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
101 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
116 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
131 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
146 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
[all …]
Dbitreverse-inline-immediates.ll9 ; GCN: buffer_store_dword [[K]]
26 ; GCN: buffer_store_dword [[K]]
43 ; GCN: buffer_store_dword [[K]]
60 ; GCN: buffer_store_dword [[K]]
77 ; GCN: buffer_store_dword [[K]]
94 ; GCN: buffer_store_dword [[K]]
111 ; GCN: buffer_store_dword [[K]]
128 ; GCN: buffer_store_dword [[K]]
145 ; GCN: buffer_store_dword [[K]]
Dfcanonicalize.ll8 ; GCN: buffer_store_dword [[REG]]
18 ; GCN: buffer_store_dword [[REG]]
27 ; GCN: buffer_store_dword [[REG]]
36 ; GCN: buffer_store_dword [[REG]]
45 ; GCN: buffer_store_dword [[REG]]
54 ; GCN: buffer_store_dword [[REG]]
63 ; GCN: buffer_store_dword [[REG]]
72 ; GCN: buffer_store_dword [[REG]]
81 ; GCN: buffer_store_dword [[REG]]
90 ; GCN: buffer_store_dword [[REG]]
[all …]
Dextractelt-to-trunc.ll9 ; GCN: buffer_store_dword [[ADD]]
22 ; GCN: buffer_store_dword v
35 ; GCN: buffer_store_dword
47 ; GCN: buffer_store_dword v
58 ; GCN: buffer_store_dword v
70 ; GCN: buffer_store_dword v
Damdgcn.work-item-intrinsics.ll10 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
24 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
40 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
52 ; GCN-NOHSA: buffer_store_dword [[VVAL]]
71 ; GCN-NOHSA: buffer_store_dword v0
85 ; GCN-NOHSA: buffer_store_dword v1
98 ; GCN-NOHSA: buffer_store_dword v2
Dextract-vector-elt-build-vector-combine.ll12 ; GCN: buffer_store_dword
13 ; GCN: buffer_store_dword
14 ; GCN: buffer_store_dword
15 ; GCN: buffer_store_dword
54 ; GCN: buffer_store_dword
55 ; GCN: buffer_store_dword
56 ; GCN: buffer_store_dword
57 ; GCN: buffer_store_dword
Dllvm.AMDGPU.bfe.i32.ll89 ; SI: buffer_store_dword [[VREG]],
184 ; SI: buffer_store_dword [[VREG]],
196 ; SI: buffer_store_dword [[VREG]],
208 ; SI: buffer_store_dword [[VREG]],
220 ; SI: buffer_store_dword [[VREG]],
232 ; SI: buffer_store_dword [[VREG]],
244 ; SI: buffer_store_dword [[VREG]],
256 ; SI: buffer_store_dword [[VREG]],
268 ; SI: buffer_store_dword [[VREG]],
280 ; SI: buffer_store_dword [[VREG]],
[all …]
Dglobal_atomics.ll38 ; GCN: buffer_store_dword [[RET]]
61 ; GCN: buffer_store_dword [[RET]]
81 ; GCN: buffer_store_dword [[RET]]
102 ; GCN: buffer_store_dword [[RET]]
122 ; GCN: buffer_store_dword [[RET]]
145 ; GCN: buffer_store_dword [[RET]]
165 ; GCN: buffer_store_dword [[RET]]
186 ; GCN: buffer_store_dword [[RET]]
206 ; GCN: buffer_store_dword [[RET]]
229 ; GCN: buffer_store_dword [[RET]]
[all …]
Ddagcombine-reassociate-bug.ll7 ; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR:v\[[0-9]+:[0-9]+\]]], [[SADDR:s\[[0-9]+:[0-9]+\]]]
8 ; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR]], [[SADDR]]
9 ; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR]], [[SADDR]]
10 ; CHECK: buffer_store_dword v{{[0-9]+}}, [[VADDR]], [[SADDR]]
Duniform-cfg.ll13 ; SI: buffer_store_dword [[STORE_VAL]]
43 ; SI: buffer_store_dword [[STORE_VAL]]
70 ; SI: buffer_store_dword [[STORE_VAL]]
100 ; SI: buffer_store_dword [[STORE_VAL]]
125 ; SI: buffer_store_dword
150 ; SI: buffer_store_dword
174 ; SI: buffer_store_dword [[TWO]]
179 ; SI: buffer_store_dword [[ONE]]
203 ; SI: buffer_store_dword [[TWO]]
208 ; SI: buffer_store_dword [[ONE]]
[all …]
Dread_register.ll9 ; CHECK: buffer_store_dword [[COPY]]
39 ; CHECK: buffer_store_dword [[COPY]]
48 ; CHECK: buffer_store_dword [[COPY]]
57 ; CHECK: buffer_store_dword [[COPY]]
66 ; CHECK: buffer_store_dword [[COPY]]
Dllvm.AMDGPU.bfe.u32.ll196 ; SI: buffer_store_dword [[VREG]],
332 ; SI: buffer_store_dword [[VREG]],
344 ; SI: buffer_store_dword [[VREG]],
356 ; SI: buffer_store_dword [[VREG]],
368 ; SI: buffer_store_dword [[VREG]],
380 ; SI: buffer_store_dword [[VREG]],
392 ; SI: buffer_store_dword [[VREG]],
404 ; SI: buffer_store_dword [[VREG]],
416 ; SI: buffer_store_dword [[VREG]],
428 ; SI: buffer_store_dword [[VREG]],
[all …]
Dfmul-2-combine-multi-use.ll13 ; GCN: buffer_store_dword [[A20]]
32 ; GCN-DAG: buffer_store_dword [[MUL2]]
33 ; GCN-DAG: buffer_store_dword [[MAD]]
47 ; GCN-DAG: buffer_store_dword [[MUL2]]
48 ; GCN-DAG: buffer_store_dword [[MAD]]
77 ; GCN: buffer_store_dword [[RESULT]]
91 ; GCN: buffer_store_dword [[RESULT]]
Ddebugger-emit-prologue.ll8 ; CHECK: buffer_store_dword [[WGIDX]], off, s[{{[0-9]+:[0-9]+}}], s[[SOFF]]
9 ; CHECK: buffer_store_dword v0, off, s[{{[0-9]+:[0-9]+}}], s[[SOFF]] offset:16
12 ; CHECK: buffer_store_dword [[WGIDY]], off, s[{{[0-9]+:[0-9]+}}], s[[SOFF]] offset:4
13 ; CHECK: buffer_store_dword v1, off, s[{{[0-9]+:[0-9]+}}], s[[SOFF]] offset:20
16 ; CHECK: buffer_store_dword [[WGIDZ]], off, s[{{[0-9]+:[0-9]+}}], s[[SOFF]] offset:8
17 ; CHECK: buffer_store_dword v2, off, s[{{[0-9]+:[0-9]+}}], s[[SOFF]] offset:24
Dshl_add_constant.ll10 ; SI: buffer_store_dword [[RESULT]]
25 ; SI-DAG: buffer_store_dword [[ADDREG]]
26 ; SI-DAG: buffer_store_dword [[SHLREG]]
44 ; SI: buffer_store_dword [[RESULT]]
63 ; SI: buffer_store_dword [[VRESULT]]
79 ; SI: buffer_store_dword [[VRESULT]]
Dsi-triv-disjoint-mem-access.ll14 ; CI: buffer_store_dword
33 ; CI: buffer_store_dword
54 ; CI: buffer_store_dword
73 ; CI-DAG: buffer_store_dword
78 ; CI: buffer_store_dword
101 ; CI: buffer_store_dword
123 ; CI: buffer_store_dword
142 ; CI: buffer_store_dword
161 ; CI: buffer_store_dword
183 ; CI: buffer_store_dword {{v[0-9]+}}, off, {{s\[[0-9]+:[0-9]+\]}}, 0 offset:12
[all …]
/external/llvm/test/MC/Disassembler/AMDGPU/
Dmubuf_vi.txt87 # VI: buffer_store_dword v1, off, s[4:7], s1 ; encoding: [0x00,0x00,0x70,0xe0,0x00,0x01,0x01,0x01]
90 # VI: buffer_store_dword v1, off, s[4:7], s1 offset:4 ; encoding: [0x04,0x00,0x70,0xe0,0x00,0x01,…
93 # VI: buffer_store_dword v1, off, s[4:7], s1 offset:4 glc ; encoding: [0x04,0x40,0x70,0xe0,0x00,0…
96 # VI: buffer_store_dword v1, off, s[4:7], s1 offset:4 slc ; encoding: [0x04,0x00,0x72,0xe0,0x00,0…
99 # VI: buffer_store_dword v1, off, s[4:7], s1 offset:4 tfe ; encoding: [0x04,0x00,0x70,0xe0,0x00,0…
102 # VI: buffer_store_dword v1, off, s[4:7], s1 glc tfe ; encoding: [0x00,0x40,0x70,0xe0,0x00,0x01,0…
105 # VI: buffer_store_dword v1, off, s[4:7], s1 offset:4 glc slc tfe ; encoding: [0x04,0x40,0x72,0xe…
108 # VI: buffer_store_dword v1, v2, s[4:7], s1 offen ; encoding: [0x00,0x10,0x70,0xe0,0x02,0x01,0x01…
111 # VI: buffer_store_dword v1, v2, s[4:7], s1 offen offset:4 ; encoding: [0x04,0x10,0x70,0xe0,0x02,…
114 # VI: buffer_store_dword v1, v2, s[4:7], s1 offen offset:4 glc ; encoding: [0x04,0x50,0x70,0xe0,0…
[all …]

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