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Searched refs:clock_clr_reset (Results 1 – 4 of 4) sorted by relevance

/external/coreboot/src/soc/nvidia/tegra210/include/soc/
Dclock.h351 #define clock_clr_reset(l, h, u, v, w, x, y) \ macro
381 #define clock_clr_reset_l(l) clock_clr_reset(l, 0, 0, 0, 0, 0, 0)
382 #define clock_clr_reset_h(h) clock_clr_reset(0, h, 0, 0, 0, 0, 0)
383 #define clock_clr_reset_u(u) clock_clr_reset(0, 0, u, 0, 0, 0, 0)
384 #define clock_clr_reset_v(v) clock_clr_reset(0, 0, 0, v, 0, 0, 0)
385 #define clock_clr_reset_w(w) clock_clr_reset(0, 0, 0, 0, w, 0, 0)
386 #define clock_clr_reset_x(x) clock_clr_reset(0, 0, 0, 0, 0, x, 0)
387 #define clock_clr_reset_y(y) clock_clr_reset(0, 0, 0, 0, 0, 0, y)
/external/coreboot/src/soc/nvidia/tegra210/
Dape.c20 clock_clr_reset(0, 0, 0, CLK_V_APB2APE, 0, 0, CLK_Y_APE); in unreset_ape_periphs()
Di2c6.c34 clock_clr_reset(CLK_L_HOST1X, 0, 0, 0, 0, CLK_X_DPAUX, 0); in unreset_sor_periphs()
Dclock.c719 clock_clr_reset(l, h, u, v, w, x, y); in clock_enable_clear_reset()