Searched refs:cmd_ctl (Results 1 – 5 of 5) sorted by relevance
198 uint8_t cmd_ctl; member
1322 comp_ctl2.s.cmd_ctl = in initialize_ddr_clock()1323 (custom_lmc_config->cmd_ctl == 0) ? 4 : custom_lmc_config->cmd_ctl; /* Default 4=34.3 ohm */ in initialize_ddr_clock()1339 comp_ctl2.s.cmd_ctl = strtoul(s, NULL, 0); in initialize_ddr_clock()
199 …custom->cmd_ctl = bdk_config_get_int(BDK_CONFIG_DDR_CUSTOM_CMD_CTL, … in libdram_config_load()
4597 …comp_ctl2.s.cmd_ctl = (custom_lmc_config->cmd_ctl == 0) ? 4 : custom_lmc_config->cmd_ctl; /… in init_octeon3_ddr3_interface()4631 comp_ctl2.s.cmd_ctl = strtoul(s, NULL, 0); in init_octeon3_ddr3_interface()4646 ddr_print("%-45s : %d, %d ohms\n", "CMD_CTL ", comp_ctl2.s.cmd_ctl, in init_octeon3_ddr3_interface()4647 imp_values->drive_strength[comp_ctl2.s.cmd_ctl ]); in init_octeon3_ddr3_interface()
998 …uint64_t cmd_ctl : 4; /**< [ 11: 8](R/W) Drive strength control for DDR_RAS_L_A\<1… member1081 …uint64_t cmd_ctl : 4; /**< [ 11: 8](R/W) Drive strength control for DDR_RAS_L_A\<1…1205 …uint64_t cmd_ctl : 4; /**< [ 11: 8](R/W) Drive strength control for DDR_RAS_L_A\<1… member1255 …uint64_t cmd_ctl : 4; /**< [ 11: 8](R/W) Drive strength control for DDR_RAS_L_A\<1…1370 …uint64_t cmd_ctl : 4; /**< [ 11: 8](R/W) Drive strength control for DDR_RAS_L_A\<1… member1453 …uint64_t cmd_ctl : 4; /**< [ 11: 8](R/W) Drive strength control for DDR_RAS_L_A\<1…