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Searched refs:fcmla (Results 1 – 20 of 20) sorted by relevance

/external/vixl/src/aarch64/
Dlogic-aarch64.cc2657 LogicVRegister Simulator::fcmla(VectorFormat vform, in fcmla() function in vixl::aarch64::Simulator
2718 LogicVRegister Simulator::fcmla(VectorFormat vform, in fcmla() function in vixl::aarch64::Simulator
2725 fcmla<SimFloat16>(vform, dst, src1, src2, acc, -1, rot); in fcmla()
2727 fcmla<float>(vform, dst, src1, src2, acc, -1, rot); in fcmla()
2729 fcmla<double>(vform, dst, src1, src2, acc, -1, rot); in fcmla()
2735 LogicVRegister Simulator::fcmla(VectorFormat vform, in fcmla() function in vixl::aarch64::Simulator
2742 fcmla<SimFloat16>(vform, dst, src1, src2, dst, index, rot); in fcmla()
2744 fcmla<float>(vform, dst, src1, src2, dst, index, rot); in fcmla()
2746 fcmla<double>(vform, dst, src1, src2, dst, index, rot); in fcmla()
Dmacro-assembler-sve-aarch64.cc2136 fcmla(ztmp, pg, zn, zm, rot); in Fcmla()
2141 fcmla(zd, pg, zn, zm, rot); in Fcmla()
Dassembler-aarch64.h3597 void fcmla(const VRegister& vd,
3604 void fcmla(const VRegister& vd,
4282 void fcmla(const ZRegister& zda,
4289 void fcmla(const ZRegister& zda,
Dsimulator-aarch64.h3815 LogicVRegister fcmla(VectorFormat vform,
3822 LogicVRegister fcmla(VectorFormat vform,
3828 LogicVRegister fcmla(VectorFormat vform,
Dsimulator-aarch64.cc8161 fcmla(vf, rd, rn, rm, rd, rot); in VisitNEON3SameExtra()
8569 fcmla(vform, rd, rn, rm, index, instr->GetImmRotFcmlaSca()); in SimulateNEONComplexMulByElement()
11010 fcmla(vform, result, zn, zm, zda, rot); in VisitSVEFPComplexMulAdd()
11048 fcmla(vform, zda, zn, temp, zda, rot); in VisitSVEFPComplexMulAddIndex()
Dmacro-assembler-aarch64.h3261 fcmla(vd, vn, vm, vm_index, rot); in Fcmla()
3269 fcmla(vd, vn, vm, rot); in Fcmla()
4396 fcmla(zda, zn, zm, index, rot); in Fcmla()
Dassembler-aarch64.cc4521 void Assembler::fcmla(const VRegister& vd, in fcmla() function in vixl::aarch64::Assembler
4538 void Assembler::fcmla(const VRegister& vd, in fcmla() function in vixl::aarch64::Assembler
Dassembler-sve-aarch64.cc1289 void Assembler::fcmla(const ZRegister& zda, in fcmla() function in vixl::aarch64::Assembler
1310 void Assembler::fcmla(const ZRegister& zda, in fcmla() function in vixl::aarch64::Assembler
/external/vixl/test/aarch64/
Dtest-api-movprfx-aarch64.cc376 __ fcmla(z5.VnH(), z0.VnH(), z5.VnH(), 2, 180); in TEST() local
379 __ fcmla(z10.VnS(), z8.VnS(), z10.VnS(), 1, 270); in TEST() local
382 __ fcmla(z12.VnH(), z12.VnH(), z3.VnH(), 2, 180); in TEST() local
385 __ fcmla(z8.VnS(), z8.VnS(), z1.VnS(), 1, 270); in TEST() local
1293 __ fcmla(z10.VnH(), z22.VnH(), z3.VnH(), 2, 180); in TEST() local
1296 __ fcmla(z12.VnS(), z3.VnS(), z10.VnS(), 1, 270); in TEST() local
1742 __ fcmla(z21.VnH(), z31.VnH(), z6.VnH(), 2, 180); in TEST() local
1745 __ fcmla(z16.VnS(), z11.VnS(), z6.VnS(), 1, 270); in TEST() local
Dtest-cpu-features-aarch64.cc3537 TEST_FP_FCMA_NEON(fcmla_0, fcmla(v0.V4S(), v1.V4S(), v2.S(), 0, 180))
3538 TEST_FP_FCMA_NEON(fcmla_1, fcmla(v0.V2S(), v1.V2S(), v2.V2S(), 90))
3539 TEST_FP_FCMA_NEON(fcmla_2, fcmla(v0.V4S(), v1.V4S(), v2.V4S(), 90))
3540 TEST_FP_FCMA_NEON(fcmla_3, fcmla(v0.V2D(), v1.V2D(), v2.V2D(), 90))
3776 TEST_FP_FCMA_NEON_NEONHALF(fcmla_0, fcmla(v0.V4H(), v1.V4H(), v2.H(), 0, 0))
3777 TEST_FP_FCMA_NEON_NEONHALF(fcmla_1, fcmla(v0.V8H(), v1.V8H(), v2.H(), 2, 180))
3778 TEST_FP_FCMA_NEON_NEONHALF(fcmla_2, fcmla(v0.V4H(), v1.V4H(), v2.V4H(), 180))
3779 TEST_FP_FCMA_NEON_NEONHALF(fcmla_3, fcmla(v0.V8H(), v1.V8H(), v2.V8H(), 0))
Dtest-disasm-sve-aarch64.cc1519 COMPARE(fcmla(z30.VnH(), z20.VnH(), z3.VnH(), 0, 0), in TEST()
1521 COMPARE(fcmla(z30.VnH(), z20.VnH(), z3.VnH(), 1, 0), in TEST()
1523 COMPARE(fcmla(z30.VnH(), z20.VnH(), z3.VnH(), 2, 90), in TEST()
1525 COMPARE(fcmla(z30.VnH(), z20.VnH(), z3.VnH(), 0, 270), in TEST()
1527 COMPARE(fcmla(z10.VnS(), z20.VnS(), z1.VnS(), 0, 0), in TEST()
1529 COMPARE(fcmla(z10.VnS(), z20.VnS(), z1.VnS(), 1, 0), in TEST()
1531 COMPARE(fcmla(z10.VnS(), z20.VnS(), z1.VnS(), 1, 90), in TEST()
1533 COMPARE(fcmla(z10.VnS(), z20.VnS(), z1.VnS(), 0, 270), in TEST()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12498 "ge\005fcmgt\005fcmla\005fcmle\005fcmlt\005fcmne\004fcmp\005fcmpe\005fcm"
13818 …{ 1132 /* fcmla */, AArch64::FCMLA_ZZZI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__…
13819 …{ 1132 /* fcmla */, AArch64::FCMLA_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__…
13820 …{ 1132 /* fcmla */, AArch64::FCMLAv2f64, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__Vect…
13821 …{ 1132 /* fcmla */, AArch64::FCMLAv4f32, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__Vect…
13822 …{ 1132 /* fcmla */, AArch64::FCMLAv8f16, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__Vect…
13823 …{ 1132 /* fcmla */, AArch64::FCMLAv2f32, Convert__VectorReg641_0__Tie0_1_1__VectorReg641_2__Vector…
13824 …{ 1132 /* fcmla */, AArch64::FCMLAv4f16, Convert__VectorReg641_0__Tie0_1_1__VectorReg641_2__Vector…
13825 …{ 1132 /* fcmla */, AArch64::FCMLA_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Ti…
13826 …{ 1132 /* fcmla */, AArch64::FCMLA_ZPmZZ_S, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Ti…
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td217 defm FCMLA_ZPmZZ : sve_fp_fcmla<"fcmla", int_aarch64_sve_fcmla>;
234 defm FCMLA_ZZZI : sve_fp_fcmla_by_indexed_elem<"fcmla", int_aarch64_sve_fcmla_lane>;
DAArch64InstrInfo.td794 "fcmla", null_frag>;
797 defm FCMLA : SIMDIndexedTiedComplexHSD<1, 0, 1, complexrotateop, "fcmla",
/external/swiftshader/third_party/llvm-16.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc18934 "clamp\005fcmeq\005fcmge\005fcmgt\005fcmla\005fcmle\005fcmlt\005fcmne\004"
20725 …{ 2181 /* fcmla */, AArch64::FCMLA_ZZZI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__…
20726 …{ 2181 /* fcmla */, AArch64::FCMLA_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__…
20727 …{ 2181 /* fcmla */, AArch64::FCMLAv2f64, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__Vect…
20728 …{ 2181 /* fcmla */, AArch64::FCMLAv4f32, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__Vect…
20729 …{ 2181 /* fcmla */, AArch64::FCMLAv8f16, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__Vect…
20730 …{ 2181 /* fcmla */, AArch64::FCMLAv2f32, Convert__VectorReg641_0__Tie0_1_1__VectorReg641_2__Vector…
20731 …{ 2181 /* fcmla */, AArch64::FCMLAv4f16, Convert__VectorReg641_0__Tie0_1_1__VectorReg641_2__Vector…
20732 …{ 2181 /* fcmla */, AArch64::FCMLA_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Ti…
20733 …{ 2181 /* fcmla */, AArch64::FCMLA_ZPmZZ_S, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Ti…
[all …]
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md3585 void fcmla(const VRegister& vd,
3596 void fcmla(const VRegister& vd,
7509 void fcmla(const ZRegister& zda,
7520 void fcmla(const ZRegister& zda,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td653 defm FCMLA_ZPmZZ : sve_fp_fcmla<"fcmla", int_aarch64_sve_fcmla>;
717 defm FCMLA_ZZZI : sve_fp_fcmla_by_indexed_elem<"fcmla", int_aarch64_sve_fcmla_lane>;
DAArch64InstrInfo.td1257 "fcmla", null_frag>;
1260 defm FCMLA : SIMDIndexedTiedComplexHSD<0, 1, complexrotateop, "fcmla">;
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc572 "llvm.aarch64.sve.fcmla",
573 "llvm.aarch64.sve.fcmla.lane",
10705 1, // llvm.aarch64.sve.fcmla
10706 1, // llvm.aarch64.sve.fcmla.lane
/external/swiftshader/third_party/llvm-16.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc956 "llvm.aarch64.sve.fcmla",
957 "llvm.aarch64.sve.fcmla.lane",
16984 89, // llvm.aarch64.sve.fcmla
16985 88, // llvm.aarch64.sve.fcmla.lane