| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUGlobalISelUtils.h | 24 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg);
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| D | AMDGPUGlobalISelUtils.cpp | 17 AMDGPU::getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) { in getBaseWithConstantOffset() function in AMDGPU
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| D | AMDGPURegisterBankInfo.cpp | 1283 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) { in getBaseWithConstantOffset() function
1304 std::tie(BaseReg, ImmOffset) = getBaseWithConstantOffset(*B.getMRI(), in splitBufferOffsets()
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| D | AMDGPUInstructionSelector.cpp | 921 = AMDGPU::getBaseWithConstantOffset(*MRI, OrigOffset); in splitBufferOffsets()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUGlobalISelUtils.h | 27 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg,
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| D | AMDGPUGlobalISelUtils.cpp | 20 AMDGPU::getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg, in getBaseWithConstantOffset() function in AMDGPU
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| D | AMDGPURegisterBankInfo.cpp | 1275 AMDGPU::getBaseWithConstantOffset(*MRI, CombinedOffset); in setBufferOffsets()
1791 getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) { in getBaseWithConstantOffset() function
1813 std::tie(BaseReg, ImmOffset) = getBaseWithConstantOffset(*B.getMRI(), in splitBufferOffsets()
2684 AMDGPU::getBaseWithConstantOffset(MRI, MI.getOperand(2).getReg()); in applyMappingImpl()
2815 AMDGPU::getBaseWithConstantOffset(MRI, MI.getOperand(3).getReg()); in applyMappingImpl()
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| D | AMDGPUInstructionSelector.cpp | 1638 AMDGPU::getBaseWithConstantOffset(*MRI, BaseOffset, KnownBits); in selectDSGWSIntrinsic()
2904 AMDGPU::getBaseWithConstantOffset(MRI, IdxReg, &KnownBits); in computeIndirectRegIndex()
4854 AMDGPU::getBaseWithConstantOffset(*MRI, Root.getReg(), KnownBits); in selectSMRDBufferSgprImm()
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| D | AMDGPULegalizerInfo.cpp | 4237 AMDGPU::getBaseWithConstantOffset(MRI, OrigOffset); in splitBufferOffsets()
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 9520 static void getBaseWithConstantOffset(SDValue Loc, SDValue &Base, in getBaseWithConstantOffset() function
9528 getBaseWithConstantOffset(Loc.getOperand(0), Base, Offset, DAG); in getBaseWithConstantOffset()
9553 getBaseWithConstantOffset(Loc, Base1, Offset1, DAG); in isConsecutiveLSLoc()
9554 getBaseWithConstantOffset(BaseLoc, Base2, Offset2, DAG); in isConsecutiveLSLoc()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 12025 static void getBaseWithConstantOffset(SDValue Loc, SDValue &Base, in getBaseWithConstantOffset() function
12033 getBaseWithConstantOffset(Loc.getOperand(0), Base, Offset, DAG); in getBaseWithConstantOffset()
12058 getBaseWithConstantOffset(Loc, Base1, Offset1, DAG); in isConsecutiveLSLoc()
12059 getBaseWithConstantOffset(BaseLoc, Base2, Offset2, DAG); in isConsecutiveLSLoc()
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.cpp | 13285 static void getBaseWithConstantOffset(SDValue Loc, SDValue &Base, in getBaseWithConstantOffset() function
13293 getBaseWithConstantOffset(Loc.getOperand(0), Base, Offset, DAG); in getBaseWithConstantOffset()
13318 getBaseWithConstantOffset(Loc, Base1, Offset1, DAG); in isConsecutiveLSLoc()
13319 getBaseWithConstantOffset(BaseLoc, Base2, Offset2, DAG); in isConsecutiveLSLoc()
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