Searched refs:getEquivalentVGPRClass (Results 1 – 14 of 14) sorted by relevance
122 const TargetRegisterClass *getEquivalentVGPRClass(
225 const TargetRegisterClass *NewSrcRC = TRI->getEquivalentVGPRClass(SrcRC); in foldVGPRCopyIntoRegSequence()
1889 const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(RC); in legalizeOpWithMove()2251 VRC = RI.getEquivalentVGPRClass(SRC); in legalizeOperands()2291 const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(OpRC); in legalizeOperands()2719 const TargetRegisterClass *NewDestRC = RI.getEquivalentVGPRClass(DestRC); in splitScalar64BitUnaryOp()2780 const TargetRegisterClass *NewDestRC = RI.getEquivalentVGPRClass(DestRC); in splitScalar64BitBinaryOp()2962 NewDstRC = RI.getEquivalentVGPRClass(NewDstRC); in getDestEquivalentVGPRClass()
729 const TargetRegisterClass *SIRegisterInfo::getEquivalentVGPRClass( in getEquivalentVGPRClass() function in SIRegisterInfo
164 const TargetRegisterClass *getEquivalentVGPRClass(
3849 const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(RC); in legalizeOpWithMove()4228 VRC = RI.getEquivalentVGPRClass(VRC); in readlaneVGPRToSGPR()4574 : RI.getEquivalentVGPRClass(SRC); in legalizeOperands()4578 : RI.getEquivalentVGPRClass(VRC); in legalizeOperands()4617 const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(OpRC); in legalizeOperands()5318 const TargetRegisterClass *NewDestRC = RI.getEquivalentVGPRClass(DestRC); in splitScalar64BitUnaryOp()5456 const TargetRegisterClass *NewDestRC = RI.getEquivalentVGPRClass(DestRC); in splitScalar64BitBinaryOp()5770 NewDstRC = RI.getEquivalentVGPRClass(NewDstRC); in getDestEquivalentVGPRClass()5779 NewDstRC = RI.getEquivalentVGPRClass(NewDstRC); in getDestEquivalentVGPRClass()
297 const TargetRegisterClass *NewSrcRC = TRI->getEquivalentVGPRClass(SrcRC); in foldVGPRCopyIntoRegSequence()
1325 const TargetRegisterClass *SIRegisterInfo::getEquivalentVGPRClass( in getEquivalentVGPRClass() function in SIRegisterInfo
10467 auto *NewRC = TRI->getEquivalentVGPRClass(RC); in AdjustInstrPostInstrSelection()11002 return TRI->getEquivalentVGPRClass(RC); in getRegClassFor()
239 getEquivalentVGPRClass(const TargetRegisterClass *SRC) const;
4981 const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(RC); in legalizeOpWithMove()5393 VRC = RI.getEquivalentVGPRClass(VRC); in readlaneVGPRToSGPR()5887 : RI.getEquivalentVGPRClass(SRC); in legalizeOperands()5891 : RI.getEquivalentVGPRClass(VRC); in legalizeOperands()5930 const TargetRegisterClass *VRC = RI.getEquivalentVGPRClass(OpRC); in legalizeOperands()6369 Register DestReg = MRI.createVirtualRegister(RI.getEquivalentVGPRClass( in moveToVALU()6398 RI.getEquivalentVGPRClass(MRI.getRegClass(Dest0.getReg())); in moveToVALU()6857 const TargetRegisterClass *NewDestRC = RI.getEquivalentVGPRClass(DestRC); in splitScalar64BitUnaryOp()7003 const TargetRegisterClass *NewDestRC = RI.getEquivalentVGPRClass(DestRC); in splitScalar64BitBinaryOp()7374 NewDstRC = RI.getEquivalentVGPRClass(NewDstRC); in getDestEquivalentVGPRClass()[all …]
310 const TargetRegisterClass *NewSrcRC = TRI->getEquivalentVGPRClass(SrcRC); in foldVGPRCopyIntoRegSequence()
933 return getEquivalentVGPRClass(RC); in getCrossCopyRegClass()2790 SIRegisterInfo::getEquivalentVGPRClass(const TargetRegisterClass *SRC) const { in getEquivalentVGPRClass() function in SIRegisterInfo
12134 auto *NewRC = TRI->getEquivalentVGPRClass(RC); in AdjustInstrPostInstrSelection()13048 return TRI->getEquivalentVGPRClass(RC); in getRegClassFor()