Searched refs:getRegForInlineAsmConstraint (Results 1 – 25 of 120) sorted by relevance
12345
/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.h | 52 std::pair<unsigned, const TargetRegisterClass *> getRegForInlineAsmConstraint(
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/ |
D | BPFISelLowering.h | 50 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/BPF/ |
D | BPFISelLowering.h | 53 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
D | LanaiISelLowering.h | 96 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/llvm/lib/Target/Lanai/ |
D | LanaiISelLowering.h | 97 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/llvm/lib/Target/AVR/ |
D | AVRISelLowering.h | 106 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.h | 63 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.h | 103 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Lanai/ |
D | LanaiISelLowering.h | 101 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
D | AVRISelLowering.h | 119 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.h | 106 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/MSP430/ |
D | MSP430ISelLowering.h | 110 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.h | 195 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.h | 193 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/CSKY/ |
D | CSKYISelLowering.h | 94 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/XCore/ |
D | XCoreISelLowering.h | 192 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyISelLowering.h | 66 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AVR/ |
D | AVRISelLowering.h | 133 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.h | 97 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.h | 153 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.h | 96 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
D | SparcISelLowering.h | 93 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/M68k/ |
D | M68kISelLowering.h | 162 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
D | RISCVISelLowering.h | 100 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/LoongArch/ |
D | LoongArchISelLowering.h | 240 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
|
12345