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Searched refs:getRegForInlineAsmConstraint (Results 1 – 25 of 120) sorted by relevance

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/external/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.h52 std::pair<unsigned, const TargetRegisterClass *> getRegForInlineAsmConstraint(
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/BPF/
DBPFISelLowering.h50 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/BPF/
DBPFISelLowering.h53 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/
DLanaiISelLowering.h96 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/llvm/lib/Target/Lanai/
DLanaiISelLowering.h97 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/llvm/lib/Target/AVR/
DAVRISelLowering.h106 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.h63 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/llvm/lib/Target/MSP430/
DMSP430ISelLowering.h103 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Lanai/
DLanaiISelLowering.h101 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/
DAVRISelLowering.h119 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/
DMSP430ISelLowering.h106 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/MSP430/
DMSP430ISelLowering.h110 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/
DXCoreISelLowering.h195 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/llvm/lib/Target/XCore/
DXCoreISelLowering.h193 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/CSKY/
DCSKYISelLowering.h94 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/XCore/
DXCoreISelLowering.h192 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/WebAssembly/
DWebAssemblyISelLowering.h66 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AVR/
DAVRISelLowering.h133 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.h97 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/llvm/lib/Target/AMDGPU/
DSIISelLowering.h153 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Sparc/
DSparcISelLowering.h96 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcISelLowering.h93 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/M68k/
DM68kISelLowering.h162 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVISelLowering.h100 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/LoongArch/
DLoongArchISelLowering.h240 getRegForInlineAsmConstraint(const TargetRegisterInfo *TRI,

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