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Searched refs:gpio_num (Results 1 – 25 of 63) sorted by relevance

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/external/coreboot/src/soc/amd/common/block/acpi/
Dgpio.c7 static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num) in acpigen_soc_gpio_op() argument
9 if (gpio_num >= SOC_GPIO_TOTAL_PINS) { in acpigen_soc_gpio_op()
11 " %d\n", gpio_num, SOC_GPIO_TOTAL_PINS); in acpigen_soc_gpio_op()
15 gpio_num >= SOC_GPIO_TOTAL_PINS) { in acpigen_soc_gpio_op()
17 " yet.\n", gpio_num); in acpigen_soc_gpio_op()
22 acpigen_write_integer(gpio_num); in acpigen_soc_gpio_op()
26 static int acpigen_soc_get_gpio_state(const char *op, unsigned int gpio_num) in acpigen_soc_get_gpio_state() argument
28 if (gpio_num >= SOC_GPIO_TOTAL_PINS) { in acpigen_soc_get_gpio_state()
30 " %d\n", gpio_num, SOC_GPIO_TOTAL_PINS); in acpigen_soc_get_gpio_state()
34 gpio_num >= SOC_GPIO_TOTAL_PINS) { in acpigen_soc_get_gpio_state()
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/external/coreboot/src/soc/intel/braswell/
Dgpio_support.c66 static int gpio_get_community_num(gpio_t gpio_num, int *pad) in gpio_get_community_num() argument
70 if (gpio_num >= GP_SW_00 && gpio_num <= GP_SW_97) { in gpio_get_community_num()
72 *pad = gpio_num % GP_SOUTHWEST_COUNT; in gpio_get_community_num()
74 } else if (gpio_num >= GP_NC_00 && gpio_num <= GP_NC_72) { in gpio_get_community_num()
76 *pad = gpio_num % GP_SOUTHWEST_COUNT; in gpio_get_community_num()
78 } else if (gpio_num >= GP_E_00 && gpio_num <= GP_E_26) { in gpio_get_community_num()
80 *pad = gpio_num % (GP_SOUTHWEST_COUNT + GP_NORTH_COUNT); in gpio_get_community_num()
84 *pad = gpio_num % (GP_SOUTHWEST_COUNT + GP_NORTH_COUNT + GP_EAST_COUNT); in gpio_get_community_num()
89 static void gpio_config_pad(gpio_t gpio_num, const struct soc_gpio_map *cfg) in gpio_config_pad() argument
96 if (gpio_num > MAX_GPIO_CNT) in gpio_config_pad()
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/external/coreboot/src/soc/amd/common/block/gpio/
Dgpio.c25 static inline void *gpio_ctrl_ptr(gpio_t gpio_num) in gpio_ctrl_ptr() argument
30 gpio_num < AMD_GPIO_FIRST_REMOTE_GPIO_NUMBER) in gpio_ctrl_ptr()
31 return acpimmio_gpio0 + gpio_num * sizeof(uint32_t); in gpio_ctrl_ptr()
34 (gpio_num - AMD_GPIO_FIRST_REMOTE_GPIO_NUMBER) * sizeof(uint32_t); in gpio_ctrl_ptr()
37 static inline uint32_t gpio_read32(gpio_t gpio_num) in gpio_read32() argument
39 return read32(gpio_ctrl_ptr(gpio_num)); in gpio_read32()
42 static inline void gpio_write32(gpio_t gpio_num, uint32_t value) in gpio_write32() argument
44 write32(gpio_ctrl_ptr(gpio_num), value); in gpio_write32()
47 static inline void *gpio_mux_ptr(gpio_t gpio_num) in gpio_mux_ptr() argument
52 gpio_num < AMD_GPIO_FIRST_REMOTE_GPIO_NUMBER) in gpio_mux_ptr()
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/external/coreboot/src/soc/intel/common/block/acpi/
Dgpio.c5 static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num) in acpigen_soc_gpio_op() argument
9 acpigen_write_integer(gpio_num); in acpigen_soc_gpio_op()
13 static int acpigen_soc_get_gpio_state(const char *op, unsigned int gpio_num) in acpigen_soc_get_gpio_state() argument
17 acpigen_soc_gpio_op(op, gpio_num); in acpigen_soc_get_gpio_state()
22 int acpigen_soc_read_rx_gpio(unsigned int gpio_num) in acpigen_soc_read_rx_gpio() argument
24 return acpigen_soc_get_gpio_state("\\_SB.PCI0.GRXS", gpio_num); in acpigen_soc_read_rx_gpio()
27 int acpigen_soc_get_tx_gpio(unsigned int gpio_num) in acpigen_soc_get_tx_gpio() argument
29 return acpigen_soc_get_gpio_state("\\_SB.PCI0.GTXS", gpio_num); in acpigen_soc_get_tx_gpio()
32 int acpigen_soc_set_tx_gpio(unsigned int gpio_num) in acpigen_soc_set_tx_gpio() argument
34 return acpigen_soc_gpio_op("\\_SB.PCI0.STXS", gpio_num); in acpigen_soc_set_tx_gpio()
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/external/coreboot/src/soc/intel/apollolake/
Dacpi.c214 static int acpigen_soc_get_gpio_val(unsigned int gpio_num, uint32_t mask) in acpigen_soc_get_gpio_val() argument
216 assert(gpio_num < TOTAL_PADS); in acpigen_soc_get_gpio_val()
217 uintptr_t addr = (uintptr_t)gpio_dwx_address(gpio_num); in acpigen_soc_get_gpio_val()
238 static int acpigen_soc_set_gpio_val(unsigned int gpio_num, uint32_t val) in acpigen_soc_set_gpio_val() argument
240 assert(gpio_num < TOTAL_PADS); in acpigen_soc_set_gpio_val()
241 uintptr_t addr = (uintptr_t)gpio_dwx_address(gpio_num); in acpigen_soc_set_gpio_val()
268 int acpigen_soc_read_rx_gpio(unsigned int gpio_num) in acpigen_soc_read_rx_gpio() argument
270 return acpigen_soc_get_gpio_val(gpio_num, PAD_CFG0_RX_STATE); in acpigen_soc_read_rx_gpio()
273 int acpigen_soc_get_tx_gpio(unsigned int gpio_num) in acpigen_soc_get_tx_gpio() argument
275 return acpigen_soc_get_gpio_val(gpio_num, PAD_CFG0_TX_STATE); in acpigen_soc_get_tx_gpio()
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/external/coreboot/src/vendorcode/google/chromeos/
Dacpi.c13 int gpio_num; in chromeos_acpi_gpio_generate() local
28 gpio_num = gpios[i].gpio_num; in chromeos_acpi_gpio_generate()
31 if (gpios[i].gpio_num != CROS_GPIO_VIRTUAL) in chromeos_acpi_gpio_generate()
32 gpio_num = gpio_acpi_pin(gpio_num); in chromeos_acpi_gpio_generate()
34 acpigen_write_integer(gpio_num); in chromeos_acpi_gpio_generate()
Dchromeos.h82 int gpio_num; member
90 .gpio_num = (num), \
/external/coreboot/src/southbridge/intel/common/
Dgpio.c87 int get_gpio(int gpio_num) in get_gpio() argument
93 if (gpio_num > MAX_GPIO_NUMBER) in get_gpio()
96 index = gpio_num / 32; in get_gpio()
97 bit = gpio_num % 32; in get_gpio()
124 void set_gpio(int gpio_num, int value) in set_gpio() argument
133 if (gpio_num > MAX_GPIO_NUMBER) in set_gpio()
136 index = gpio_num / 32; in set_gpio()
137 bit = gpio_num % 32; in set_gpio()
146 int gpio_is_native(int gpio_num) in gpio_is_native() argument
155 if (gpio_num > MAX_GPIO_NUMBER) in gpio_is_native()
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Dgpio.h157 int get_gpio(int gpio_num);
164 void set_gpio(int gpio_num, int value);
166 void clear_gpio(int gpio_num);
168 int gpio_is_native(int gpio_num);
/external/coreboot/src/southbridge/intel/lynxpoint/
Dlp_gpio.c102 int get_gpio(int gpio_num) in get_gpio() argument
106 if (gpio_num > MAX_GPIO_NUMBER) in get_gpio()
109 return !!(inl(gpio_base + GPIO_CONFIG0(gpio_num)) & GPI_LEVEL); in get_gpio()
131 void set_gpio(int gpio_num, int value) in set_gpio() argument
136 if (gpio_num > MAX_GPIO_NUMBER) in set_gpio()
139 conf0 = inl(gpio_base + GPIO_CONFIG0(gpio_num)); in set_gpio()
142 outl(conf0, gpio_base + GPIO_CONFIG0(gpio_num)); in set_gpio()
145 int gpio_is_native(int gpio_num) in gpio_is_native() argument
149 return !(inl(gpio_base + GPIO_CONFIG0(gpio_num)) & 1); in gpio_is_native()
Dlp_gpio.h161 int get_gpio(int gpio_num);
164 void set_gpio(int gpio_num, int value);
167 int gpio_is_native(int gpio_num);
/external/coreboot/src/superio/smsc/sch5545/
Dsch5545_early_init.c154 uint8_t gpio_bank, gpio_num; in sch5545_get_gpio() local
157 gpio_num = gpio % 10; in sch5545_get_gpio()
163 if (gpio_num > 7) in sch5545_get_gpio()
165 else if (gpio_bank == 7 && gpio_num > 1) in sch5545_get_gpio()
182 outb(gpio_bank * 8 + gpio_num, runtime_reg_base + SCH5545_RR_GPIO_SEL); in sch5545_get_gpio()
Dsuperio.c18 uint8_t gpio_bank, gpio_num; in sch5545_get_gpio() local
21 gpio_num = gpio % 10; in sch5545_get_gpio()
28 if (gpio_num > 7) in sch5545_get_gpio()
30 else if (gpio_bank == 7 && gpio_num > 1) in sch5545_get_gpio()
54 outb(gpio_bank * 8 + gpio_num, runtime_reg_base + SCH5545_RR_GPIO_SEL); in sch5545_get_gpio()
/external/arm-trusted-firmware/drivers/nxp/gpio/
Dnxp_gpio.c100 uint32_t gpio_num = 0U; in select_gpio_n_bitnum() local
117 gpio_num = povdd_gpio_val >> GPIO_ID_BASE_ADDR_SHIFT; in select_gpio_n_bitnum()
122 switch (gpio_num) { in select_gpio_n_bitnum()
140 INFO("GPIO_NUM = %d doesn't exist.\n", gpio_num); in select_gpio_n_bitnum()
/external/trusty/arm-trusted-firmware/drivers/nxp/gpio/
Dnxp_gpio.c101 uint32_t gpio_num = 0U; in select_gpio_n_bitnum() local
118 gpio_num = povdd_gpio_val >> GPIO_ID_BASE_ADDR_SHIFT; in select_gpio_n_bitnum()
123 switch (gpio_num) { in select_gpio_n_bitnum()
141 INFO("GPIO_NUM = %d doesn't exist.\n", gpio_num); in select_gpio_n_bitnum()
/external/vboot_reference/host/arch/x86/lib/
Dcrossystem_arch.c566 static int FindGpioChipOffset(unsigned *gpio_num, unsigned *offset, in FindGpioChipOffset() argument
593 static int FindGpioChipOffsetByLabel(unsigned *gpio_num, unsigned *offset, in FindGpioChipOffsetByLabel() argument
637 static int FindGpioChipOffsetByNumber(unsigned *gpio_num, unsigned *offset, in FindGpioChipOffsetByNumber() argument
653 if (*gpio_num >= data->base) { in FindGpioChipOffsetByNumber()
654 *gpio_num -= data->base; in FindGpioChipOffsetByNumber()
703 static int BraswellFindGpioChipOffset(unsigned *gpio_num, unsigned *offset, in BraswellFindGpioChipOffset() argument
735 if (*gpio_num >= 0x10000 && *gpio_num < 0x18000) in BraswellFindGpioChipOffset()
738 ret = FindGpioChipOffsetByNumber(gpio_num, offset, data); in BraswellFindGpioChipOffset()
771 static int BayTrailFindGpioChipOffset(unsigned *gpio_num, unsigned *offset, in BayTrailFindGpioChipOffset() argument
780 return FindGpioChipOffsetByNumber(gpio_num, offset, data); in BayTrailFindGpioChipOffset()
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/external/coreboot/src/soc/intel/common/block/gpio/
Dgpio.c516 int gpio_get(gpio_t gpio_num) in gpio_get() argument
518 const struct pad_community *comm = gpio_get_community(gpio_num); in gpio_get()
522 config_offset = pad_config_offset(comm, gpio_num); in gpio_get()
528 int gpio_tx_get(gpio_t gpio_num) in gpio_tx_get() argument
530 const struct pad_community *comm = gpio_get_community(gpio_num); in gpio_tx_get()
534 config_offset = pad_config_offset(comm, gpio_num); in gpio_tx_get()
718 void gpio_set(gpio_t gpio_num, int value) in gpio_set() argument
720 const struct pad_community *comm = gpio_get_community(gpio_num); in gpio_set()
723 config_offset = pad_config_offset(comm, gpio_num); in gpio_set()
728 uint16_t gpio_acpi_pin(gpio_t gpio_num) in gpio_acpi_pin() argument
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/external/coreboot/src/mainboard/google/storm/
Dchromeos.c18 static int read_gpio(gpio_t gpio_num) in read_gpio() argument
20 gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE, in read_gpio()
23 return gpio_get(gpio_num); in read_gpio()
/external/coreboot/src/mainboard/google/gale/
Dchromeos.c46 static int read_gpio(gpio_t gpio_num) in read_gpio() argument
48 gpio_tlmm_config_set(gpio_num, GPIO_FUNC_DISABLE, in read_gpio()
51 return gpio_get(gpio_num); in read_gpio()
/external/arm-trusted-firmware/plat/marvell/armada/a3k/a3700/board/
Dpm_src.c18 .gpio_data.gpio_num = 14
25 .gpio_data.gpio_num = 2
/external/trusty/arm-trusted-firmware/plat/marvell/armada/a3k/a3700/board/
Dpm_src.c18 .gpio_data.gpio_num = 14
25 .gpio_data.gpio_num = 2
/external/coreboot/src/mainboard/google/dedede/variants/waddledoo/
Doverridetree.cb162 register "gpio_panel.gpio[0].gpio_num" = "GPP_D13" #power_enable_2p8
163 register "gpio_panel.gpio[1].gpio_num" = "GPP_D14" #power_enable_1p2
164 register "gpio_panel.gpio[2].gpio_num" = "GPP_D12" #reset
227 register "gpio_panel.gpio[0].gpio_num" = "GPP_D13" #power_enable_2p8
228 register "gpio_panel.gpio[1].gpio_num" = "GPP_D14" #power_enable_1p2
229 register "gpio_panel.gpio[2].gpio_num" = "GPP_D15" #reset
/external/coreboot/Documentation/acpi/
Dgpio.md33 int acpigen_soc_read_rx_gpio(unsigned int gpio_num)
35 int acpigen_soc_get_tx_gpio(unsigned int gpio_num)
37 int acpigen_soc_set_tx_gpio(unsigned int gpio_num)
39 int acpigen_soc_clear_tx_gpio(unsigned int gpio_num)
41 Each of the above functions takes as input gpio_num which is the gpio
116 uint64_t gpio_reg_offset = gpio_get_reg_offset(gpio_num);
137 uint64_t gpio_reg_offset = gpio_get_reg_offset(gpio_num);
/external/coreboot/src/mainboard/google/brya/variants/brya0/
Doverridetree.cb561 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" #power_enable_2p8
562 register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #power_enable_1p2
563 register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset
597 register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR
629 register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR
666 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" #power_enable_2p8
667 register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #power_enable_1p2
668 register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset
702 register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR
734 register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR
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/external/coreboot/src/mainboard/google/brya/variants/skolas/
Doverridetree.cb560 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" #power_enable_2p8
561 register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #power_enable_1p2
562 register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset
596 register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR
628 register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR
665 register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" #power_enable_2p8
666 register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #power_enable_1p2
667 register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset
701 register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR
733 register "gpio_panel.gpio[0].gpio_num" = "GPP_D16" #EN_WCAM_PWR
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