Searched refs:gpio_port (Results 1 – 5 of 5) sorted by relevance
| /external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/gpio/ |
| D | rk3399_gpio.c | 21 uint32_t gpio_port[] = { variable
259 mmio_setbits_32(gpio_port[port] + SWPORTA_DDR, !direction << num); in set_direction()
280 direction = !((mmio_read_32(gpio_port[port] + in get_direction()
296 value = (mmio_read_32(gpio_port[port] + EXT_PORTA) >> num) & 0x1; in get_value()
311 mmio_clrsetbits_32(gpio_port[port] + SWPORTA_DR, 1 << num, in set_value()
339 mmio_read_32(gpio_port[i] + SWPORTA_DR); in plat_rockchip_save_gpio()
341 mmio_read_32(gpio_port[i] + SWPORTA_DDR); in plat_rockchip_save_gpio()
343 mmio_read_32(gpio_port[i] + INTEN); in plat_rockchip_save_gpio()
345 mmio_read_32(gpio_port[i] + INTMASK); in plat_rockchip_save_gpio()
347 mmio_read_32(gpio_port[i] + INTTYPE_LEVEL); in plat_rockchip_save_gpio()
[all …]
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| /external/coreboot/src/soc/rockchip/common/ |
| D | gpio.c | 12 clrsetbits32(&gpio_port[gpio.port]->swporta_ddr, in gpio_set_dir()
71 clrsetbits32(&gpio_port[gpio.port]->int_polarity, in gpio_input_irq()
73 clrsetbits32(&gpio_port[gpio.port]->inttype_level, in gpio_input_irq()
76 setbits32(&gpio_port[gpio.port]->inten, mask); in gpio_input_irq()
77 clrbits32(&gpio_port[gpio.port]->intmask, mask); in gpio_input_irq()
83 uint32_t int_status = read32(&gpio_port[gpio.port]->int_status); in gpio_irq_status()
88 setbits32(&gpio_port[gpio.port]->porta_eoi, mask); in gpio_irq_status()
94 return (read32(&gpio_port[gpio.port]->ext_porta) >> gpio.num) & 0x1; in gpio_get()
99 clrsetbits32(&gpio_port[gpio.port]->swporta_dr, 1 << gpio.num, in gpio_set()
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| /external/coreboot/src/soc/rockchip/rk3288/ |
| D | gpio.c | 9 struct rockchip_gpio_regs *gpio_port[] = { variable
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| /external/coreboot/src/soc/rockchip/rk3399/ |
| D | gpio.c | 8 struct rockchip_gpio_regs *gpio_port[] = { variable
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| /external/coreboot/src/soc/rockchip/common/include/soc/ |
| D | gpio.h | 53 extern struct rockchip_gpio_regs *gpio_port[];
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