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/external/deqp/android/cts/main/vk-main-2025-03-01/
Dsynchronization2.txt1 dEQP-VK.synchronization2.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.…
2 dEQP-VK.synchronization2.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.…
3 dEQP-VK.synchronization2.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.…
4 dEQP-VK.synchronization2.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.…
5 dEQP-VK.synchronization2.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.…
6 dEQP-VK.synchronization2.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.…
7 dEQP-VK.synchronization2.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.…
8 dEQP-VK.synchronization2.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.…
9 dEQP-VK.synchronization2.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.…
10 dEQP-VK.synchronization2.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.…
[all …]
Dsynchronization.txt301 dEQP-VK.synchronization.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.0…
302 dEQP-VK.synchronization.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.0…
303 dEQP-VK.synchronization.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.0…
304 dEQP-VK.synchronization.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.0…
305 dEQP-VK.synchronization.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.0…
306 dEQP-VK.synchronization.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.0…
307 dEQP-VK.synchronization.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.0…
308 dEQP-VK.synchronization.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.0…
309 dEQP-VK.synchronization.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.0…
310 dEQP-VK.synchronization.implicit.binary_semaphore.write_copy_buffer_read_copy_buffer.buffer_16384.0…
[all …]
/external/llvm/test/CodeGen/AMDGPU/
Ddetect-dead-lanes.mir16 # CHECK: S_NOP 0, implicit-def %0
17 # CHECK: S_NOP 0, implicit-def %1
18 # CHECK: S_NOP 0, implicit-def dead %2
20 # CHECK: S_NOP 0, implicit %3:sub0
21 # CHECK: S_NOP 0, implicit %3:sub1
22 # CHECK: S_NOP 0, implicit undef %3:sub2
25 # CHECK: S_NOP 0, implicit %4:sub0
26 # CHECK: S_NOP 0, implicit %4:sub1
27 # CHECK: S_NOP 0, implicit undef %5:sub0
39 S_NOP 0, implicit-def %0
[all …]
Dindirect-addressing-undef.mir9 # CHECK: V_READFIRSTLANE_B32 undef %vgpr10, implicit %exec
10 # CHECK: %vgpr0 = V_MOVRELS_B32_e32 %vgpr0, implicit %m0, implicit %exec, implicit %vgpr0_vgpr1_vgp…
11 # CHECK: S_CBRANCH_EXECNZ %bb.1, implicit %exec
94 …r1_vgpr2_vgpr3 = BUFFER_LOAD_DWORDX4_OFFSET %sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit %exec
97 …gpr1_vgpr2_vgpr3, undef %vgpr10, 0, implicit-def dead %exec, implicit-def dead %vcc, implicit-def …
99 …ER_STORE_DWORD_OFFSET killed %vgpr0, killed %sgpr4_sgpr5_sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit %exec
109 # CHECK: %vcc_lo = V_READFIRSTLANE_B32 undef %vgpr10, implicit %exec
111 # CHECK: %m0 = S_ADD_I32 %m0, -7, implicit-def %scc
112 # CHECK: %vgpr0 = V_MOVRELS_B32_e32 %vgpr0, implicit %m0, implicit %exec, implicit %vgpr0_vgpr1_vgp…
113 # CHECK: S_CBRANCH_EXECNZ %bb.1, implicit %exec
[all …]
Drename-independent-subregs.mir10 # CHECK: S_NOP 0, implicit-def undef %0:sub0
11 # CHECK: S_NOP 0, implicit-def undef %2:sub1
12 # CHECK: S_NOP 0, implicit %2:sub1
13 # CHECK: S_NOP 0, implicit-def undef %1:sub1
14 # CHECK: S_NOP 0, implicit %1:sub1
15 # CHECK: S_NOP 0, implicit-def %0:sub1
16 # CHECK: S_NOP 0, implicit %0
23 S_NOP 0, implicit-def undef %0:sub0
24 S_NOP 0, implicit-def %0:sub1
25 S_NOP 0, implicit %0:sub1
[all …]
/external/llvm/test/CodeGen/X86/
Dmachine-copy-prop.mir24 # CHECK-NEXT: NOOP implicit %rdi
26 # CHECK-NEXT: NOOP implicit %rax, implicit %rdi
32 NOOP implicit killed %rdi
34 NOOP implicit %rax, implicit %rdi
42 # CHECK-NEXT: NOOP implicit %edi
44 # CHECK-NEXT: NOOP implicit %rax, implicit %rdi
50 NOOP implicit killed %edi
52 NOOP implicit %rax, implicit %rdi
60 # CHECK-NEXT: NOOP implicit %rdi
62 # CHECK-NEXT: NOOP implicit %rax, implicit %rdi
[all …]
Dpr27681.mir32 frame-setup PUSH32r killed %ebp, implicit-def %esp, implicit %esp
33 frame-setup PUSH32r killed %ebx, implicit-def %esp, implicit %esp
34 frame-setup PUSH32r killed %edi, implicit-def %esp, implicit %esp
35 frame-setup PUSH32r killed %esi, implicit-def %esp, implicit %esp
36 %esp = frame-setup SUB32ri8 %esp, 36, implicit-def dead %eflags
48 %ebp = SHR32rCL killed %ebp, implicit-def dead %eflags, implicit %cl
49 %ebp = XOR32rr killed %ebp, killed %ebx, implicit-def dead %eflags
50 TEST32rr %edx, %edx, implicit-def %eflags
51 %cl = SETNEr implicit %eflags
54 %cl = OR8rr killed %cl, %bl, implicit-def dead %eflags
[all …]
Dimplicit-null-checks.mir1 # RUN: llc -run-pass implicit-null-checks -mtriple=x86_64-apple-macosx -o - %s | FileCheck %s
10 br i1 undef, label %is_null, label %not_null, !make.implicit !0
29 br i1 undef, label %is_null, label %not_null, !make.implicit !0
48 br i1 undef, label %is_null, label %not_null, !make.implicit !0
67 br i1 undef, label %is_null, label %not_null, !make.implicit !0
96 …OAD_OP %bb.3.is_null, {{[0-9]+}}, killed %eax, killed %rdi, 1, _, 0, _, implicit-def dead %eflags …
104 TEST64rr %rdi, %rdi, implicit-def %eflags
105 JE_1 %bb.3.is_null, implicit %eflags
112 …%eax = AND32rm killed %eax, killed %rdi, 1, _, 0, _, implicit-def dead %eflags :: (load 4 from %ir…
113 CMP32rr killed %eax, killed %esi, implicit-def %eflags
[all …]
/external/llvm/test/CodeGen/PowerPC/
Daddisdtprelha-nonr3.mir55 %x0 = MFLR8 implicit %lr8
63 …implicit-def dead %x0, implicit-def dead %x4, implicit-def dead %x5, implicit-def dead %x6, implic…
67 …implicit-def dead %x0, implicit-def dead %x4, implicit-def dead %x5, implicit-def dead %x6, implic…
78 MTLR8 killed %x0, implicit-def %lr8
79 BLR8 implicit %lr8, implicit %rm
/external/llvm/test/CodeGen/MIR/AMDGPU/
Dtarget-index-operands.mir55 …gpr2 = S_ADD_U32 %sgpr2, target-index(amdgpu-constdata-start), implicit-def %scc, implicit-def %scc
56 …%sgpr2 = S_ADD_U32 %sgpr2, target-index(amdgpu-constdata-start), implicit-def %scc, implicit-def %…
57 … %sgpr3 = S_ADDC_U32 %sgpr3, 0, implicit-def %scc, implicit %scc, implicit-def %scc, implicit %scc
58 %sgpr4_sgpr5 = S_LSHR_B64 %sgpr2_sgpr3, 32, implicit-def dead %scc
60 %sgpr7 = S_ASHR_I32 %sgpr6, 31, implicit-def dead %scc
61 %sgpr6_sgpr7 = S_LSHL_B64 %sgpr6_sgpr7, 2, implicit-def dead %scc
62 %sgpr2 = S_ADD_U32 %sgpr2, @float_gv, implicit-def %scc
63 %sgpr3 = S_ADDC_U32 %sgpr4, 0, implicit-def dead %scc, implicit %scc
64 %sgpr4 = S_ADD_U32 %sgpr2, %sgpr6, implicit-def %scc
65 %sgpr5 = S_ADDC_U32 %sgpr3, %sgpr7, implicit-def dead %scc, implicit %scc
[all …]
Dexpected-target-index-name.mir47 %sgpr2 = S_ADD_U32 %sgpr2, target-index(0), implicit-def %scc, implicit-def %scc
48 … %sgpr3 = S_ADDC_U32 %sgpr3, 0, implicit-def %scc, implicit %scc, implicit-def %scc, implicit %scc
49 %sgpr4_sgpr5 = S_LSHR_B64 %sgpr2_sgpr3, 32, implicit-def dead %scc
51 %sgpr7 = S_ASHR_I32 %sgpr6, 31, implicit-def dead %scc
52 %sgpr6_sgpr7 = S_LSHL_B64 %sgpr6_sgpr7, 2, implicit-def dead %scc
53 %sgpr2 = S_ADD_U32 %sgpr2, @float_gv, implicit-def %scc
54 %sgpr3 = S_ADDC_U32 %sgpr4, 0, implicit-def dead %scc, implicit %scc
55 %sgpr4 = S_ADD_U32 %sgpr2, %sgpr6, implicit-def %scc
56 %sgpr5 = S_ADDC_U32 %sgpr3, %sgpr7, implicit-def dead %scc, implicit %scc
61 %vgpr0 = V_MOV_B32_e32 killed %sgpr2, implicit %exec
[all …]
Dinvalid-target-index-operand.mir47 %sgpr2 = S_ADD_U32 %sgpr2, target-index(constdata-start), implicit-def %scc, implicit-def %scc
48 … %sgpr3 = S_ADDC_U32 %sgpr3, 0, implicit-def %scc, implicit %scc, implicit-def %scc, implicit %scc
49 %sgpr4_sgpr5 = S_LSHR_B64 %sgpr2_sgpr3, 32, implicit-def dead %scc
51 %sgpr7 = S_ASHR_I32 %sgpr6, 31, implicit-def dead %scc
52 %sgpr6_sgpr7 = S_LSHL_B64 %sgpr6_sgpr7, 2, implicit-def dead %scc
53 %sgpr2 = S_ADD_U32 %sgpr2, @float_gv, implicit-def %scc
54 %sgpr3 = S_ADDC_U32 %sgpr4, 0, implicit-def dead %scc, implicit %scc
55 %sgpr4 = S_ADD_U32 %sgpr2, %sgpr6, implicit-def %scc
56 %sgpr5 = S_ADDC_U32 %sgpr3, %sgpr7, implicit-def dead %scc, implicit %scc
61 %vgpr0 = V_MOV_B32_e32 killed %sgpr2, implicit %exec
[all …]
/external/python/pyyaml/tests/data/
Dmappings.events5 - !Scalar { implicit: [true,true], value: 'key' }
6 - !Scalar { implicit: [true,true], value: 'value' }
7 - !Scalar { implicit: [true,true], value: 'empty mapping' }
10 - !Scalar { implicit: [true,true], value: 'empty mapping with tag' }
11 - !MappingStart { tag: '!mytag', implicit: false }
13 - !Scalar { implicit: [true,true], value: 'block mapping' }
16 - !Scalar { implicit: [true,true], value: 'complex' }
17 - !Scalar { implicit: [true,true], value: 'key' }
18 - !Scalar { implicit: [true,true], value: 'complex' }
19 - !Scalar { implicit: [true,true], value: 'key' }
[all …]
Dscalars.events5 - !Scalar { implicit: [true,true], value: 'empty scalar' }
6 - !Scalar { implicit: [true,false], value: '' }
7 - !Scalar { implicit: [true,true], value: 'implicit scalar' }
8 - !Scalar { implicit: [true,true], value: 'data' }
9 - !Scalar { implicit: [true,true], value: 'quoted scalar' }
11 - !Scalar { implicit: [true,true], value: 'block scalar' }
13 - !Scalar { implicit: [true,true], value: 'empty scalar with tag' }
14 - !Scalar { implicit: [false,false], tag: '!mytag', value: '' }
15 - !Scalar { implicit: [true,true], value: 'implicit scalar with tag' }
16 - !Scalar { implicit: [false,false], tag: '!mytag', value: 'data' }
[all …]
/external/snakeyaml/src/test/resources/pyyaml/
Dmappings.events5 - !Scalar { implicit: [true,true], value: 'key' }
6 - !Scalar { implicit: [true,true], value: 'value' }
7 - !Scalar { implicit: [true,true], value: 'empty mapping' }
10 - !Scalar { implicit: [true,true], value: 'empty mapping with tag' }
11 - !MappingStart { tag: '!mytag', implicit: false }
13 - !Scalar { implicit: [true,true], value: 'block mapping' }
16 - !Scalar { implicit: [true,true], value: 'complex' }
17 - !Scalar { implicit: [true,true], value: 'key' }
18 - !Scalar { implicit: [true,true], value: 'complex' }
19 - !Scalar { implicit: [true,true], value: 'key' }
[all …]
Dscalars.events5 - !Scalar { implicit: [true,true], value: 'empty scalar' }
6 - !Scalar { implicit: [true,false], value: '' }
7 - !Scalar { implicit: [true,true], value: 'implicit scalar' }
8 - !Scalar { implicit: [true,true], value: 'data' }
9 - !Scalar { implicit: [true,true], value: 'quoted scalar' }
11 - !Scalar { implicit: [true,true], value: 'block scalar' }
13 - !Scalar { implicit: [true,true], value: 'empty scalar with tag' }
14 - !Scalar { implicit: [false,false], tag: '!mytag', value: '' }
15 - !Scalar { implicit: [true,true], value: 'implicit scalar with tag' }
16 - !Scalar { implicit: [false,false], tag: '!mytag', value: 'data' }
[all …]
/external/llvm/test/CodeGen/MIR/ARM/
Dbundled-instructions.mir32 ; CHECK-NEXT: t2CMNri killed %r0, 78, 14, _, implicit-def %cpsr
33 ; CHECK-NEXT: BUNDLE implicit-def dead %itstate, implicit-def %r1, implicit killed %cpsr {
34 ; CHECK-NEXT: t2IT 12, 8, implicit-def %itstate
35 ; CHECK-NEXT: %r1 = t2MOVi 1, 12, killed %cpsr, _, implicit internal killed %itstate
38 ; CHECK-NEXT: tBX_RET 14, _, implicit killed %r0
40 t2CMNri killed %r0, 78, 14, _, implicit-def %cpsr
41 BUNDLE implicit-def dead %itstate, implicit-def %r1, implicit killed %cpsr {
42 t2IT 12, 8, implicit-def %itstate
43 %r1 = t2MOVi 1, 12, killed %cpsr, _, implicit internal killed %itstate
46 tBX_RET 14, _, implicit killed %r0
[all …]
/external/angle/third_party/glslang/src/Test/
Dhlsl.type.type.conversion.valid.frag46 float var1 = float2(zeros2);// warning X3206: implicit truncation of vector type
47 float var2 = float3(zeros3);// warning X3206: implicit truncation of vector type
48 float var3 = float4(zeros4);// warning X3206: implicit truncation of vector type
49 float var4 = float2x2(zeros4);// warning X3206: implicit truncation of vector type
50 float var5 = float2x3(zeros6);// warning X3206: implicit truncation of vector type
51 float var6 = float2x4(zeros8);// warning X3206: implicit truncation of vector type
52 float var7 = float3x2(zeros6);// warning X3206: implicit truncation of vector type
53 float var8 = float3x3(zeros9);// warning X3206: implicit truncation of vector type
54 float var9 = float3x4(zeros12);// warning X3206: implicit truncation of vector type
55 float var10 = float4x2(zeros8);// warning X3206: implicit truncation of vector type
[all …]
/external/deqp-deps/glslang/Test/
Dhlsl.type.type.conversion.valid.frag46 float var1 = float2(zeros2);// warning X3206: implicit truncation of vector type
47 float var2 = float3(zeros3);// warning X3206: implicit truncation of vector type
48 float var3 = float4(zeros4);// warning X3206: implicit truncation of vector type
49 float var4 = float2x2(zeros4);// warning X3206: implicit truncation of vector type
50 float var5 = float2x3(zeros6);// warning X3206: implicit truncation of vector type
51 float var6 = float2x4(zeros8);// warning X3206: implicit truncation of vector type
52 float var7 = float3x2(zeros6);// warning X3206: implicit truncation of vector type
53 float var8 = float3x3(zeros9);// warning X3206: implicit truncation of vector type
54 float var9 = float3x4(zeros12);// warning X3206: implicit truncation of vector type
55 float var10 = float4x2(zeros8);// warning X3206: implicit truncation of vector type
[all …]
/external/llvm/test/CodeGen/MIR/Mips/
Dmemory-operands.mir46 Save16 %ra, 24, implicit-def %sp, implicit %sp
57 …eg16 killed %v1, csr_o32, implicit-def %ra, implicit killed %t9, implicit %a0, implicit killed %gp…
59 %ra = Restore16 24, implicit-def %sp, implicit %sp
60 RetRA16 implicit %v0
82 SaveX16 %s0, %ra, %s2, 32, implicit-def %sp, implicit %sp
95 …JumpLinkReg16 killed %v1, csr_o32, implicit-def %ra, implicit %v0, implicit killed %gp, implicit-d…
99 …6 killed %v1, csr_mips16rethelper, implicit-def %ra, implicit killed %t9, implicit %v0, implicit k…
100 %s0, %ra, %s2 = RestoreX16 32, implicit-def %sp, implicit %sp
101 RetRA16 implicit %v0
/external/llvm/test/CodeGen/MIR/X86/
Dused-physical-register-info.mir48 %eax = IMUL32rri8 %edi, 11, implicit-def %eflags
68 PUSH64r %rax, implicit-def %rsp, implicit %rsp
69 … CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax
70 %rdx = POP64r implicit-def %rsp, implicit %rsp
88 PUSH64r %rax, implicit-def %rsp, implicit %rsp
89 … CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax
90 %rdx = POP64r implicit-def %rsp, implicit %rsp
105 PUSH64r %rax, implicit-def %rsp, implicit %rsp
106 … CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax
107 %rdx = POP64r implicit-def %rsp, implicit %rsp
Dimplicit-register-flag.mir2 # This test ensures that the MIR parser parses the 'implicit' and 'implicit-def'
35 ; CHECK: CMP32ri8 %edi, 10, implicit-def %eflags
36 ; CHECK-NEXT: JG_1 %bb.2.exit, implicit %eflags
37 CMP32ri8 %edi, 10, implicit-def %eflags
38 JG_1 %bb.2.exit, implicit %eflags
41 ; CHECK: %eax = MOV32r0 implicit-def %eflags
42 %eax = MOV32r0 implicit-def %eflags
53 ; Verify that the implicit register verifier won't report an error on implicit
56 ; CHECK: dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al
57 dead %eax = XOR32rr undef %eax, undef %eax, implicit-def dead %eflags, implicit-def %al
[all …]
Dregister-mask-operands.mir25 %eax = IMUL32rri8 %edi, 11, implicit-def %eflags
34 …; CHECK-NEXT: CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, imp…
35 PUSH64r %rax, implicit-def %rsp, implicit %rsp
36 … CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax
37 %rdx = POP64r implicit-def %rsp, implicit %rsp
/external/clang/test/SemaOpenCL/
Dclang-builtin-version.cl7 …enqueue_kernel(tmp, tmp, tmp, ^(void) { // expected-warning{{implicit declaration of function 'enq…
10 …unsigned size = get_kernel_work_group_size(^(void) { // expected-warning{{implicit declaration of …
13 …size = get_kernel_preferred_work_group_size_multiple(^(void) { // expected-warning{{implicit decla…
21 …read_pipe(tmp, tmp); // expected-warning{{implicit declaration of function 'read_pipe' is invalid…
22 …write_pipe(tmp, tmp); // expected-warning{{implicit declaration of function 'write_pipe' is invali…
24 …reserve_read_pipe(tmp, tmp); // expected-warning{{implicit declaration of function 'reserve_read_…
25 …reserve_write_pipe(tmp, tmp); // expected-warning{{implicit declaration of function 'reserve_write…
27 …work_group_reserve_read_pipe(tmp, tmp); // expected-warning{{implicit declaration of function 'wo…
28 …work_group_reserve_write_pipe(tmp, tmp); // expected-warning{{implicit declaration of function 'wo…
30 …sub_group_reserve_write_pipe(tmp, tmp); // expected-warning{{implicit declaration of function 'sub…
[all …]
/external/llvm/test/CodeGen/MIR/Lanai/
Dpeephole-compare.mir16 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr
21 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr
26 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr
31 # CHECK: SUB_F_R [[IN1]], [[IN2]], 0, implicit-def %sr
216 SFSUB_F_RI_LO %4, 0, implicit-def %sr
217 %5 = SELECT %2, %4, 7, implicit %sr
219 RET implicit %rca, implicit %rv
262 SFSUB_F_RR %1, %0, implicit-def %sr
263 %4 = SELECT %2, %1, 7, implicit %sr
265 RET implicit %rca, implicit %rv
[all …]

12345678910>>...65