Searched refs:input_freq (Results 1 – 2 of 2) sorted by relevance
1938 static int clk_compute_pll1_settings(unsigned long input_freq, in clk_compute_pll1_settings() argument1951 unsigned long post_divm = input_freq / divm; in clk_compute_pll1_settings()1967 divn = (freq / input_freq) - 1U; in clk_compute_pll1_settings()1972 frac = ((freq * FRAC_MAX) / input_freq) - ((divn + 1U) * FRAC_MAX); in clk_compute_pll1_settings()2025 unsigned long input_freq = 0UL; in clk_get_pll1_settings() local2032 input_freq = stm32mp_clk_get_rate(CK_HSI); in clk_get_pll1_settings()2035 input_freq = stm32mp_clk_get_rate(CK_HSE); in clk_get_pll1_settings()2041 if (input_freq == 0UL) { in clk_get_pll1_settings()2045 return clk_compute_pll1_settings(input_freq, freq_khz, pllcfg, fracv); in clk_get_pll1_settings()
1322 unsigned long input_freq = 0UL; in clk_compute_pll1_settings() local1328 input_freq = _clk_stm32_get_rate(priv, _CK_HSI); in clk_compute_pll1_settings()1331 input_freq = _clk_stm32_get_rate(priv, _CK_HSE); in clk_compute_pll1_settings()1337 if (input_freq == 0UL) { in clk_compute_pll1_settings()1346 unsigned long post_divm = input_freq / divm; in clk_compute_pll1_settings()1362 divn = (freq / input_freq) - 1U; in clk_compute_pll1_settings()1367 frac = ((freq * FRAC_MAX) / input_freq) - ((divn + 1U) * FRAC_MAX); in clk_compute_pll1_settings()