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Searched refs:link_width (Results 1 – 12 of 12) sorted by relevance

/external/trusty/arm-trusted-firmware/plat/brcm/board/stingray/src/
Dsr_paxb_phy.c510 unsigned int link_width, serdes, nr_serdes; in paxb_serdes_gate_clock() local
515 link_width = paxb->get_link_width(core_idx); in paxb_serdes_gate_clock()
516 if (!link_width) { in paxb_serdes_gate_clock()
521 nr_serdes = link_width / 2; in paxb_serdes_gate_clock()
764 unsigned int link_width; in paxb_sr_phy_init() local
768 link_width = paxb->get_link_width(core_idx); in paxb_sr_phy_init()
769 if (!link_width) { in paxb_sr_phy_init()
774 ret = paxb_serdes_init(core_idx, link_width / 2); in paxb_sr_phy_init()
782 ret = paxb_gen3_serdes_init(core_idx, link_width / 2); in paxb_sr_phy_init()
Dpaxb.c265 static void pcie_set_default_tx_coeff(uint32_t core_idx, uint32_t link_width) in pcie_set_default_tx_coeff() argument
271 for (lanes = 0; lanes < link_width; lanes = lanes + 2) { in pcie_set_default_tx_coeff()
287 unsigned int link_width; in paxb_rc_link_init() local
294 link_width = paxb->get_link_width(core_idx); in paxb_rc_link_init()
295 if (!link_width) { in paxb_rc_link_init()
304 val |= (link_width << CFG_RC_LINK_CAP_WIDTH_SHIFT); in paxb_rc_link_init()
326 pcie_set_default_tx_coeff(core_idx, link_width); in paxb_rc_link_init()
/external/arm-trusted-firmware/plat/brcm/board/stingray/src/
Dsr_paxb_phy.c510 unsigned int link_width, serdes, nr_serdes; in paxb_serdes_gate_clock() local
515 link_width = paxb->get_link_width(core_idx); in paxb_serdes_gate_clock()
516 if (!link_width) { in paxb_serdes_gate_clock()
521 nr_serdes = link_width / 2; in paxb_serdes_gate_clock()
764 unsigned int link_width; in paxb_sr_phy_init() local
768 link_width = paxb->get_link_width(core_idx); in paxb_sr_phy_init()
769 if (!link_width) { in paxb_sr_phy_init()
774 ret = paxb_serdes_init(core_idx, link_width / 2); in paxb_sr_phy_init()
782 ret = paxb_gen3_serdes_init(core_idx, link_width / 2); in paxb_sr_phy_init()
Dpaxb.c265 static void pcie_set_default_tx_coeff(uint32_t core_idx, uint32_t link_width) in pcie_set_default_tx_coeff() argument
271 for (lanes = 0; lanes < link_width; lanes = lanes + 2) { in pcie_set_default_tx_coeff()
287 unsigned int link_width; in paxb_rc_link_init() local
294 link_width = paxb->get_link_width(core_idx); in paxb_rc_link_init()
295 if (!link_width) { in paxb_rc_link_init()
304 val |= (link_width << CFG_RC_LINK_CAP_WIDTH_SHIFT); in paxb_rc_link_init()
326 pcie_set_default_tx_coeff(core_idx, link_width); in paxb_rc_link_init()
/external/kernel-headers/original/uapi/linux/
Drio_mport_cdev.h77 __u8 link_width; member
/external/harfbuzz_ng/src/graph/
Dgraph.hh1475 unsigned link_width = link.width ? link.width : 4; // treat virtual offsets as 32 bits wide in update_distances() local
1477 … ((int64_t) 1 << (link_width * 8)) * (vertices_.arrayZ[link.objidx].space + 1); in update_distances()
/external/bcc/libbpf-tools/arm64/
Dvmlinux_608.h57470 unsigned int link_width; member
57552 unsigned int link_width; member
Dvmlinux.h57470 unsigned int link_width; member
57552 unsigned int link_width; member
/external/bcc/libbpf-tools/loongarch/
Dvmlinux_602.h34855 int link_width; member
Dvmlinux.h34855 int link_width; member
/external/bcc/libbpf-tools/x86/
Dvmlinux.h82852 int link_width; member
Dvmlinux_518.h82852 int link_width; member