Home
last modified time | relevance | path

Searched refs:misc_ctrl0 (Results 1 – 4 of 4) sorted by relevance

/external/coreboot/src/soc/mediatek/mt8183/
Ddramc_pi_basic_api.c303 clrsetbits32(&ch[chn].phy.misc_ctrl0, in dramc_hw_dqs_gating_tracking()
324 setbits32(&ch[0].phy.misc_ctrl0, 0x1 << 10); in dramc_impedance_tracking_enable()
329 setbits32(&ch[chn].phy.misc_ctrl0, 0x1 << 18); in dramc_impedance_tracking_enable()
Ddramc_init_setting.c57 setbits32(&ch[chn].phy.misc_ctrl0, 0x3 << 19); in dvfs_settings()
505 clrbits32(&ch[0].phy.misc_ctrl0, 0x1 << 27); in update_initial_settings()
1048 clrbits32(&ch[0].phy.misc_ctrl0, 0x1 << 17); in dramc_setting()
1248 setbits32(&ch[0].phy.misc_ctrl0, in dramc_setting()
1410 clrbits32(&ch[0].phy.misc_ctrl0, 0xf << 0); in dramc_setting()
Ddramc_pi_calibration_api.c836 clrbits32(&ch[chn].phy.misc_ctrl0, 0x1 << 31); in dramc_apply_config_after_calibration()
/external/coreboot/src/soc/mediatek/mt8183/include/soc/
Ddramc_register.h397 uint32_t misc_ctrl0; member