Home
last modified time | relevance | path

Searched refs:num_engines (Results 1 – 25 of 45) sorted by relevance

12

/external/igt-gpu-tools/tests/i915/
Dgem_sync.c86 int num_engines = 0; in sync_ring() local
90 names[num_engines] = e__->name; in sync_ring()
91 engines[num_engines++] = ring; in sync_ring()
92 if (num_engines == ARRAY_SIZE(engines)) in sync_ring()
96 num_children *= num_engines; in sync_ring()
99 names[num_engines] = NULL; in sync_ring()
100 engines[num_engines++] = ring; in sync_ring()
118 execbuf.flags = engines[child % num_engines]; in sync_ring()
131 names[child % num_engines] ?: "", in sync_ring()
132 names[child % num_engines] ? " c" : "C", in sync_ring()
[all …]
Dgem_ctx_thrash.c64 static unsigned get_num_contexts(int fd, int num_engines) in get_num_contexts() argument
76 if (num_engines) /* one per engine with execlists */ in get_num_contexts()
77 size *= num_engines; in get_num_contexts()
93 unsigned int engines[16], num_engines, num_ctx; in single() local
104 num_engines = 0; in single()
112 engines[num_engines++] = engine; in single()
113 if (num_engines == ARRAY_SIZE(engines)) in single()
118 engines[num_engines++] = 0; in single()
120 igt_require(num_engines); in single()
122 num_ctx = get_num_contexts(fd, num_engines); in single()
[all …]
Dgem_ctx_create.c384 static void check_single_timeline(int i915, uint32_t ctx, int num_engines) in check_single_timeline() argument
405 for (int i = 0; i < num_engines; i++) { in check_single_timeline()
414 .rsvd2 = sw_sync_timeline_create_fence(timeline, num_engines - i), in check_single_timeline()
447 for (int i = 1; i < num_engines; i++) { in check_single_timeline()
Di915_query.c535 engines->num_engines = 1; in engines_invalid()
607 for (i = 0; i < engines->num_engines; i++) { in has_engine()
657 igt_assert(engines->num_engines > 0); in engines()
665 for (i = 0; i < engines->num_engines; i++) { in engines()
/external/igt-gpu-tools/tests/
Dperf_pmu.c415 static void log_busy(unsigned int num_engines, uint64_t *val) in log_busy() argument
422 for (i = 0; i < num_engines; i++) { in log_busy()
436 const unsigned int num_engines, unsigned int flags) in busy_check_all() argument
439 uint64_t tval[2][num_engines]; in busy_check_all()
441 uint64_t val[num_engines]; in busy_check_all()
442 int fd[num_engines]; in busy_check_all()
457 igt_assert_eq(i, num_engines); in busy_check_all()
460 pmu_read_multi(fd[0], num_engines, tval[0]); in busy_check_all()
464 pmu_read_multi(fd[0], num_engines, tval[1]); in busy_check_all()
470 for (i = 0; i < num_engines; i++) in busy_check_all()
[all …]
/external/mesa3d/src/intel/common/i915/
Dintel_engine.c79 i915_engines_info->num_engines); in i915_engine_get_info()
85 for (int i = 0; i < i915_engines_info->num_engines; i++) { in i915_engine_get_info()
94 intel_engines_info->num_engines = i915_engines_info->num_engines; in i915_engine_get_info()
Dintel_gem.c54 int num_engines, enum intel_engine_class *engine_classes, in i915_gem_create_context_engines() argument
59 assert(num_engines <= 64); in i915_gem_create_context_engines()
87 for (int i = 0; i < num_engines; i++) { in i915_gem_create_context_engines()
101 for (int i = 0; i < info->num_engines; i++) { in i915_gem_create_context_engines()
103 if (++(*idx) >= info->num_engines) in i915_gem_create_context_engines()
118 size += sizeof(engines_param.engines[0]) * num_engines; in i915_gem_create_context_engines()
Dintel_gem.h38 int num_engines, enum intel_engine_class *engine_classes,
/external/mesa3d/src/intel/common/xe/
Dintel_engine.c82 xe_engines->num_engines); in xe_engine_get_info()
88 for (uint32_t i = 0; i < xe_engines->num_engines; i++) { in xe_engine_get_info()
97 intel_engines_info->num_engines = xe_engines->num_engines; in xe_engine_get_info()
/external/mesa3d/src/intel/tools/
Dintel_noop_drm_shim.c387 uint32_t num_engines = num_copy + num_render; in i915_ioctl_query() local
394 num_engines * sizeof(info->engines[0]); in i915_ioctl_query()
405 for (uint32_t e = 0; e < num_render; e++, info->num_engines++) { in i915_ioctl_query()
406 info->engines[info->num_engines].engine.engine_class = in i915_ioctl_query()
408 info->engines[info->num_engines].engine.engine_instance = e; in i915_ioctl_query()
411 for (uint32_t e = 0; e < num_copy; e++, info->num_engines++) { in i915_ioctl_query()
412 info->engines[info->num_engines].engine.engine_class = in i915_ioctl_query()
414 info->engines[info->num_engines].engine.engine_instance = e; in i915_ioctl_query()
417 assert(info->num_engines == num_engines); in i915_ioctl_query()
/external/tensorflow/tensorflow/python/compiler/tensorrt/test/
Dbinary_tensor_weight_broadcast_test.py63 num_engines = 17 if run_params.dynamic_shape else 16
64 return [f"TRTEngineOp_{i:03d}" for i in range(num_engines)]
Dtf_function_test.py271 num_engines = 0
279 num_engines += 1
306 self.assertEqual(0, num_engines)
309 self.assertEqual(num_engines, len(expected_engines))
Dquantization_mnist_test.py185 num_engines = len(
187 self.assertEqual(1, num_engines)
Dtf_trt_integration_test_base.py847 num_engines = 0
852 num_engines += 1
885 self.assertEqual(0, num_engines)
887 self.assertEqual(num_engines, len(expected_engines))
/external/igt-gpu-tools/tools/
Dintel_gpu_top.c73 unsigned int num_engines; member
185 engines->num_engines = 0; in discover_engines()
195 engine_ptr(engines, engines->num_engines); in discover_engines()
254 engines->num_engines++; in discover_engines()
256 engines->num_engines * sizeof(struct engine)); in discover_engines()
272 qsort(engine_ptr(engines, 0), engines->num_engines, in discover_engines()
474 for (i = 0; i < engines->num_engines; i++) { in pmu_init()
653 for (i = 0; i < engines->num_engines; i++) { in pmu_sample()
1154 i < engines->num_engines && lines < con_h; in print_engines_header()
1372 i < engines->num_engines && lines < con_h; in main()
/external/mesa3d/src/intel/common/
Dintel_gem.c80 int num_engines, enum intel_engine_class *engine_classes, in intel_gem_create_context_engines() argument
84 return i915_gem_create_context_engines(fd, flags, info, num_engines, in intel_gem_create_context_engines()
Dintel_engine.h42 uint32_t num_engines; member
Dintel_engine.c52 for (int i = 0; i < info->num_engines; i++) { in intel_engines_count()
Dintel_gem.h117 int num_engines, enum intel_engine_class *engine_classes,
/external/igt-gpu-tools/lib/i915/
Dgem_engine_topology.c144 for (i = 0; i < query_engine->num_engines; i++) in query_engine_list()
149 ed->nengines = query_engine->num_engines; in query_engine_list()
/external/kernel-headers/original/uapi/drm/
Dxe_drm.h268 __u32 num_engines; member
1494 __u64 num_engines; member
/external/mesa3d/include/drm-uapi/
Dxe_drm.h268 __u32 num_engines; member
1497 __u64 num_engines; member
/external/mesa3d/src/intel/perf/xe/
Dintel_perf.c88 for (engine_i = 0; engine_i < oa_unit->num_engines; engine_i++) { in xe_oa_metrics_available()
102 poau += sizeof(*oa_unit) + oa_unit->num_engines * sizeof(oa_unit->eci[0]); in xe_oa_metrics_available()
/external/mesa3d/src/gallium/drivers/iris/xe/
Diris_batch.c82 for (uint32_t i = 0; i < engines_info->num_engines; i++) { in iris_xe_init_batch()
/external/intel-media-driver/media_softlet/linux/common/os/i915_production/include/
Di915_drm_prelim.h815 __u64 num_engines; member
1053 __u32 num_engines; member

12