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Searched refs:opcode2 (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/panfrost/compiler/valhall/
Dvalhall.py179 …def __init__(self, name, opcode, opcode2, srcs = [], dests = [], immediates = [], modifiers = [], … argument
184 self.opcode2 = opcode2 or 0
195 self.secondary_mask = 0xF if opcode2 is not None else 0x0
214 assert(not opcode2 or (opcode2 & self.secondary_mask) == opcode2)
264 opcode2 = overrides.get('opcode2') or el.attrib.get('opcode2')
267 opcode2 = int(opcode2, base=0) if opcode2 else None
306 …instr = Instruction(name, opcode, opcode2, srcs = sources, dests = dests, immediates = imms, modif…
Ddisasm.py303 assert(ins.opcode2 not in SECONDARY)
304 SECONDARY[ins.opcode2] = ins
Dvalhall.c.py176 return (op.opcode << 48) | (op.opcode2 << op.secondary_shift)
Dasm.py336 encoded |= (ins.opcode2 << ins.secondary_shift)
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/
DPPCInstrFormats.td89 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
100 let Inst{32-37} = opcode2;
329 class IForm_and_DForm_1<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,
332 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {
349 class IForm_and_DForm_4_zero<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,
352 : IForm_and_DForm_1<opcode1, aa, lk, opcode2,
1546 bits<6> opcode2, bits<2> xo2,
1549 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {
1574 bits<6> opcode2, bits<2> xo2,
1577 : XLForm_2_and_DSForm_1<opcode1, xo1, lk, opcode2, xo2,
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCInstrFormats.td73 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
84 let Inst{32-37} = opcode2;
313 class IForm_and_DForm_1<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,
316 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {
333 class IForm_and_DForm_4_zero<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,
336 : IForm_and_DForm_1<opcode1, aa, lk, opcode2,
1494 bits<6> opcode2, bits<2> xo2,
1497 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {
1522 bits<6> opcode2, bits<2> xo2,
1525 : XLForm_2_and_DSForm_1<opcode1, xo1, lk, opcode2, xo2,
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCInstrFormats.td68 class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
79 let Inst{32-37} = opcode2;
287 class IForm_and_DForm_1<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,
290 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {
307 class IForm_and_DForm_4_zero<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,
310 : IForm_and_DForm_1<opcode1, aa, lk, opcode2,
1302 bits<6> opcode2, bits<2> xo2,
1305 : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {
1330 bits<6> opcode2, bits<2> xo2,
1333 : XLForm_2_and_DSForm_1<opcode1, xo1, lk, opcode2, xo2,
/external/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_optimize.c898 const struct rc_opcode_info *opcode2 = rc_get_opcode_info(inst2->U.I.Opcode); in have_shared_source() local
900 for (unsigned j = 0; j < opcode2->NumSrcRegs; j++) { in have_shared_source()
1172 rc_opcode opcode2) in inst_combination() argument
1174 return ((inst1->U.I.Opcode == opcode1 && inst2->U.I.Opcode == opcode2) || in inst_combination()
1175 (inst2->U.I.Opcode == opcode1 && inst1->U.I.Opcode == opcode2)); in inst_combination()
/external/llvm/lib/Target/SystemZ/
DSystemZInstrFormats.td1562 multiclass BinaryRRAndK<string mnemonic, bits<8> opcode1, bits<16> opcode2,
1567 def K : BinaryRRFK<mnemonic, opcode2, null_frag, cls1, cls2>,
1574 multiclass BinaryRREAndK<string mnemonic, bits<16> opcode1, bits<16> opcode2,
1579 def K : BinaryRRFK<mnemonic, opcode2, null_frag, cls1, cls2>,
1601 multiclass BinaryRIAndK<string mnemonic, bits<12> opcode1, bits<16> opcode2,
1606 def K : BinaryRIE<mnemonic##"k", opcode2, null_frag, cls, imm>,
1638 multiclass BinaryRSAndK<string mnemonic, bits<8> opcode1, bits<16> opcode2,
1642 def K : BinaryRSY<mnemonic##"k", opcode2, null_frag, cls>,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZInstrFormats.td3138 multiclass BinaryRRAndK<string mnemonic, bits<8> opcode1, bits<16> opcode2,
3143 def K : BinaryRRFa<mnemonic#"k", opcode2, operator, cls1, cls1, cls2>,
3150 multiclass BinaryRREAndK<string mnemonic, bits<16> opcode1, bits<16> opcode2,
3155 def K : BinaryRRFa<mnemonic#"k", opcode2, operator, cls1, cls1, cls2>,
3297 multiclass BinaryRIAndK<string mnemonic, bits<12> opcode1, bits<16> opcode2,
3302 def K : BinaryRIE<mnemonic##"k", opcode2, operator, cls, imm>,
3375 multiclass BinaryRSAndK<string mnemonic, bits<8> opcode1, bits<16> opcode2,
3379 def K : BinaryRSY<mnemonic##"k", opcode2, operator, cls>,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SystemZ/
DSystemZInstrFormats.td3284 multiclass BinaryRRAndK<string mnemonic, bits<8> opcode1, bits<16> opcode2,
3289 def K : BinaryRRFa<mnemonic#"k", opcode2, operator, cls1, cls1, cls2>,
3296 multiclass BinaryRREAndK<string mnemonic, bits<16> opcode1, bits<16> opcode2,
3301 def K : BinaryRRFa<mnemonic#"k", opcode2, operator, cls1, cls1, cls2>,
3449 multiclass BinaryRIAndK<string mnemonic, bits<12> opcode1, bits<16> opcode2,
3454 def K : BinaryRIE<mnemonic#"k", opcode2, operator, cls, imm>,
3528 multiclass BinaryRSAndK<string mnemonic, bits<8> opcode1, bits<16> opcode2,
3532 def K : BinaryRSY<mnemonic#"k", opcode2, operator, cls>,
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/
DARMInstrVFP.td2012 let Inst{21-20} = 0b11; // opcode2