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Searched refs:phase (Results 1 – 25 of 1131) sorted by relevance

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/external/coreboot/Documentation/northbridge/intel/sandybridge/
Dnri_registers.md33 | 0:5| IO phase shift in 1/64th DCKs |
35 | 6:11| DQS phase shift on rising edge in 1/64 DCKs |
39 | 20:25| DQS phase shift on falling edge in 1/64 DCKs |
53 | 0:5| IO phase shift in 1/64th DCKs |
55 | 6:11| DQS phase shift on rising edge in 1/64 DCKs |
59 | 20:25| DQS phase shift on falling edge in 1/64 DCKs |
73 | 0:5| IO phase shift in 1/64th DCKs |
75 | 6:11| DQS phase shift on rising edge in 1/64 DCKs |
79 | 20:25| DQS phase shift on falling edge in 1/64 DCKs |
93 | 0:5| IO phase shift in 1/64th DCKs |
[all …]
/external/oboe/apps/OboeTester/app/src/main/cpp/synth/
DSawtoothOscillator.h45 synth_float_t phase = mPhase; in generate() local
48 output[i] = translatePhase(phase, phaseIncrement); in generate()
49 phase += phaseIncrement; in generate()
50 if (phase > 1.0) { in generate()
51 phase -= 2.0; in generate()
54 mPhase = phase; in generate()
58 synth_float_t phase = mPhase; in generate() local
61 output[i] = translatePhase(phase, phaseIncrement); in generate()
62 phase += phaseIncrement; in generate()
63 if (phase > 1.0) { in generate()
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/external/trusty/arm-trusted-firmware/plat/mediatek/mt8186/drivers/spm/
Dmt_spm_pmic_wrap.c28 enum pmic_wrap_phase_id phase; member
50 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
70 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
111 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase() argument
115 if (phase < NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_set_phase()
120 if (pw->phase != phase) { in mt_spm_pmic_wrap_set_phase()
121 pw->phase = phase; in mt_spm_pmic_wrap_set_phase()
125 for (idx = 0; idx < pw->set[phase].nr_idx; idx++) { in mt_spm_pmic_wrap_set_phase()
126 addr = pw->set[phase]._[idx].cmd_addr << SPM_DATA_SHIFT; in mt_spm_pmic_wrap_set_phase()
127 data = pw->set[phase]._[idx].cmd_wdata; in mt_spm_pmic_wrap_set_phase()
[all …]
/external/trusty/arm-trusted-firmware/plat/mediatek/mt8195/drivers/spm/
Dmt_spm_pmic_wrap.c41 enum pmic_wrap_phase_id phase; member
53 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
100 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase() argument
104 if (phase >= NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_set_phase()
108 if (pw.phase == phase) { in mt_spm_pmic_wrap_set_phase()
116 pw.phase = phase; in mt_spm_pmic_wrap_set_phase()
119 for (idx = 0U; idx < pw.set[phase].nr_idx; idx++) { in mt_spm_pmic_wrap_set_phase()
120 addr = pw.set[phase]._[idx].cmd_addr << SPM_DATA_SHIFT; in mt_spm_pmic_wrap_set_phase()
121 data = pw.set[phase]._[idx].cmd_wdata; in mt_spm_pmic_wrap_set_phase()
126 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, uint32_t idx, in mt_spm_pmic_wrap_set_cmd() argument
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/external/arm-trusted-firmware/plat/mediatek/mt8192/drivers/spm/
Dmt_spm_pmic_wrap.c41 enum pmic_wrap_phase_id phase; member
53 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
100 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase() argument
104 if (phase >= NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_set_phase()
108 if (pw.phase == phase) { in mt_spm_pmic_wrap_set_phase()
116 pw.phase = phase; in mt_spm_pmic_wrap_set_phase()
119 for (idx = 0U; idx < pw.set[phase].nr_idx; idx++) { in mt_spm_pmic_wrap_set_phase()
120 addr = pw.set[phase]._[idx].cmd_addr << SPM_DATA_SHIFT; in mt_spm_pmic_wrap_set_phase()
121 data = pw.set[phase]._[idx].cmd_wdata; in mt_spm_pmic_wrap_set_phase()
126 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, uint32_t idx, in mt_spm_pmic_wrap_set_cmd() argument
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/external/arm-trusted-firmware/plat/mediatek/mt8195/drivers/spm/
Dmt_spm_pmic_wrap.c41 enum pmic_wrap_phase_id phase; member
53 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
100 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase() argument
104 if (phase >= NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_set_phase()
108 if (pw.phase == phase) { in mt_spm_pmic_wrap_set_phase()
116 pw.phase = phase; in mt_spm_pmic_wrap_set_phase()
119 for (idx = 0U; idx < pw.set[phase].nr_idx; idx++) { in mt_spm_pmic_wrap_set_phase()
120 addr = pw.set[phase]._[idx].cmd_addr << SPM_DATA_SHIFT; in mt_spm_pmic_wrap_set_phase()
121 data = pw.set[phase]._[idx].cmd_wdata; in mt_spm_pmic_wrap_set_phase()
126 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, uint32_t idx, in mt_spm_pmic_wrap_set_cmd() argument
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/external/trusty/arm-trusted-firmware/plat/mediatek/drivers/spm/mt8188/
Dmt_spm_pmic_wrap.c46 enum pmic_wrap_phase_id phase; member
58 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
105 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase() argument
109 if ((phase >= NR_PMIC_WRAP_PHASE) || (pw.phase == phase)) { in mt_spm_pmic_wrap_set_phase()
117 pw.phase = phase; in mt_spm_pmic_wrap_set_phase()
120 for (idx = 0; idx < pw.set[phase].nr_idx; idx++) { in mt_spm_pmic_wrap_set_phase()
122 (pw.set[phase]._[idx].cmd_addr << SPM_DATA_SHIFT) | in mt_spm_pmic_wrap_set_phase()
123 (pw.set[phase]._[idx].cmd_wdata)); in mt_spm_pmic_wrap_set_phase()
127 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, unsigned int idx, in mt_spm_pmic_wrap_set_cmd() argument
131 if ((phase >= NR_PMIC_WRAP_PHASE) || (idx >= pw.set[phase].nr_idx)) { in mt_spm_pmic_wrap_set_cmd()
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/external/trusty/arm-trusted-firmware/plat/mediatek/mt8192/drivers/spm/
Dmt_spm_pmic_wrap.c41 enum pmic_wrap_phase_id phase; member
53 .phase = NR_PMIC_WRAP_PHASE, /* invalid setting for init */
100 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase() argument
104 if (phase >= NR_PMIC_WRAP_PHASE) { in mt_spm_pmic_wrap_set_phase()
108 if (pw.phase == phase) { in mt_spm_pmic_wrap_set_phase()
116 pw.phase = phase; in mt_spm_pmic_wrap_set_phase()
119 for (idx = 0U; idx < pw.set[phase].nr_idx; idx++) { in mt_spm_pmic_wrap_set_phase()
120 addr = pw.set[phase]._[idx].cmd_addr << SPM_DATA_SHIFT; in mt_spm_pmic_wrap_set_phase()
121 data = pw.set[phase]._[idx].cmd_wdata; in mt_spm_pmic_wrap_set_phase()
126 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, uint32_t idx, in mt_spm_pmic_wrap_set_cmd() argument
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/external/cronet/stable/net/third_party/quiche/src/quiche/quic/core/congestion_control/
Dbbr2_probe_bw.cc23 if (cycle_.phase == CyclePhase::PROBE_NOT_STARTED) { in Enter()
30 QUICHE_DCHECK(cycle_.phase == CyclePhase::PROBE_CRUISE || in Enter()
31 cycle_.phase == CyclePhase::PROBE_REFILL); in Enter()
33 if (cycle_.phase == CyclePhase::PROBE_CRUISE) { in Enter()
35 } else if (cycle_.phase == CyclePhase::PROBE_REFILL) { in Enter()
46 QUICHE_DCHECK_NE(cycle_.phase, CyclePhase::PROBE_NOT_STARTED); in OnCongestionEvent()
59 if (cycle_.phase == CyclePhase::PROBE_UP) { in OnCongestionEvent()
61 } else if (cycle_.phase == CyclePhase::PROBE_DOWN) { in OnCongestionEvent()
64 if (cycle_.phase != CyclePhase::PROBE_DOWN && in OnCongestionEvent()
68 } else if (cycle_.phase == CyclePhase::PROBE_CRUISE) { in OnCongestionEvent()
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/external/cronet/tot/net/third_party/quiche/src/quiche/quic/core/congestion_control/
Dbbr2_probe_bw.cc23 if (cycle_.phase == CyclePhase::PROBE_NOT_STARTED) { in Enter()
30 QUICHE_DCHECK(cycle_.phase == CyclePhase::PROBE_CRUISE || in Enter()
31 cycle_.phase == CyclePhase::PROBE_REFILL); in Enter()
33 if (cycle_.phase == CyclePhase::PROBE_CRUISE) { in Enter()
35 } else if (cycle_.phase == CyclePhase::PROBE_REFILL) { in Enter()
46 QUICHE_DCHECK_NE(cycle_.phase, CyclePhase::PROBE_NOT_STARTED); in OnCongestionEvent()
59 if (cycle_.phase == CyclePhase::PROBE_UP) { in OnCongestionEvent()
61 } else if (cycle_.phase == CyclePhase::PROBE_DOWN) { in OnCongestionEvent()
64 if (cycle_.phase != CyclePhase::PROBE_DOWN && in OnCongestionEvent()
68 } else if (cycle_.phase == CyclePhase::PROBE_CRUISE) { in OnCongestionEvent()
[all …]
/external/arm-trusted-firmware/plat/mediatek/mt8183/drivers/spm/
Dspm_pmic_wrap.c44 enum pmic_wrap_phase_id phase; member
56 .phase = NR_PMIC_WRAP_PHASE,
115 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase() argument
119 if (phase >= NR_PMIC_WRAP_PHASE) in mt_spm_pmic_wrap_set_phase()
122 if (pw.phase == phase) in mt_spm_pmic_wrap_set_phase()
128 pw.phase = phase; in mt_spm_pmic_wrap_set_phase()
132 for (idx = 0; idx < pw.set[phase].nr_idx; idx++) { in mt_spm_pmic_wrap_set_phase()
133 addr = pw.set[phase]._[idx].cmd_addr << SPM_DATA_SHIFT; in mt_spm_pmic_wrap_set_phase()
134 data = pw.set[phase]._[idx].cmd_wdata; in mt_spm_pmic_wrap_set_phase()
139 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, uint32_t idx, in mt_spm_pmic_wrap_set_cmd() argument
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/external/trusty/arm-trusted-firmware/plat/mediatek/mt8183/drivers/spm/
Dspm_pmic_wrap.c44 enum pmic_wrap_phase_id phase; member
56 .phase = NR_PMIC_WRAP_PHASE,
115 void mt_spm_pmic_wrap_set_phase(enum pmic_wrap_phase_id phase) in mt_spm_pmic_wrap_set_phase() argument
119 if (phase >= NR_PMIC_WRAP_PHASE) in mt_spm_pmic_wrap_set_phase()
122 if (pw.phase == phase) in mt_spm_pmic_wrap_set_phase()
128 pw.phase = phase; in mt_spm_pmic_wrap_set_phase()
132 for (idx = 0; idx < pw.set[phase].nr_idx; idx++) { in mt_spm_pmic_wrap_set_phase()
133 addr = pw.set[phase]._[idx].cmd_addr << SPM_DATA_SHIFT; in mt_spm_pmic_wrap_set_phase()
134 data = pw.set[phase]._[idx].cmd_wdata; in mt_spm_pmic_wrap_set_phase()
139 void mt_spm_pmic_wrap_set_cmd(enum pmic_wrap_phase_id phase, uint32_t idx, in mt_spm_pmic_wrap_set_cmd() argument
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/external/coreboot/src/drivers/intel/fsp2_0/
Dnotify.c48 static const struct fsp_notify_phase_data *get_notify_phase_data(enum fsp_notify_phase phase) in get_notify_phase_data() argument
51 if (notify_data[i].notify_phase == phase) in get_notify_phase_data()
54 die("Unknown FSP notify phase %u\n", phase); in get_notify_phase_data()
57 static void fsp_notify(enum fsp_notify_phase phase) in fsp_notify() argument
59 const struct fsp_notify_phase_data *data = get_notify_phase_data(phase); in fsp_notify()
60 struct fsp_notify_params notify_params = { .phase = phase }; in fsp_notify()
65 printk(BIOS_INFO, "coreboot skipped calling FSP notify phase: %08x.\n", phase); in fsp_notify()
98 platform_fsp_notify_status(phase); in fsp_notify()
103 enum fsp_notify_phase phase = (uint32_t)(uintptr_t)arg; in fsp_notify_dummy() local
107 fsp_notify(phase); in fsp_notify_dummy()
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/external/eigen/unsupported/test/
Dcxx11_non_blocking_thread_pool.cpp36 std::atomic<int> phase(0); in test_parallelism() local
44 while (phase < 1) { in test_parallelism()
52 phase = 1; in test_parallelism()
58 while (phase < 2) { in test_parallelism()
68 while (phase < 3) { in test_parallelism()
75 while (phase < 3) { in test_parallelism()
87 phase = 2; in test_parallelism()
91 while (phase < 3) { in test_parallelism()
98 phase = 3; in test_parallelism()
135 std::atomic<int> phase(0); in test_pool_partitions() local
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/external/cronet/tot/third_party/rust/chromium_crates_io/vendor/skrifa-0.24.1/src/outline/glyf/hint/
Dround.rs57 pub phase: i32, field
66 phase: 0, in default()
122 ((distance + (self.threshold - self.phase)) & -self.period) + self.phase; in round()
124 self.phase in round()
130 -(((self.threshold - self.phase) - distance) & -self.period) - self.phase; in round()
132 -self.phase in round()
141 let val = (((distance + (self.threshold - self.phase)) / self.period) in round()
143 + self.phase; in round()
145 self.phase in round()
150 let val = -((((self.threshold - self.phase) - distance) / self.period) in round()
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/external/cronet/stable/third_party/rust/chromium_crates_io/vendor/skrifa-0.24.1/src/outline/glyf/hint/
Dround.rs57 pub phase: i32, field
66 phase: 0, in default()
122 ((distance + (self.threshold - self.phase)) & -self.period) + self.phase; in round()
124 self.phase in round()
130 -(((self.threshold - self.phase) - distance) & -self.period) - self.phase; in round()
132 -self.phase in round()
141 let val = (((distance + (self.threshold - self.phase)) / self.period) in round()
143 + self.phase; in round()
145 self.phase in round()
150 let val = -((((self.threshold - self.phase) - distance) / self.period) in round()
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/external/skia/src/effects/
DSk1DPathEffect.cpp75 SkPath1DPathEffectImpl(const SkPath& path, SkScalar advance, SkScalar phase, in SkPath1DPathEffectImpl() argument
85 if (phase < 0) { in SkPath1DPathEffectImpl()
86 phase = -phase; in SkPath1DPathEffectImpl()
87 if (phase > advance) { in SkPath1DPathEffectImpl()
88 phase = SkScalarMod(phase, advance); in SkPath1DPathEffectImpl()
91 if (phase > advance) { in SkPath1DPathEffectImpl()
92 phase = SkScalarMod(phase, advance); in SkPath1DPathEffectImpl()
94 phase = advance - phase; in SkPath1DPathEffectImpl()
97 if (phase >= advance) { in SkPath1DPathEffectImpl()
98 phase = 0; in SkPath1DPathEffectImpl()
[all …]
/external/mesa3d/src/imagination/rogue/passes/
Drogue_schedule_instr_groups.c143 enum rogue_instr_phase phase = alu->instr.index; in rogue_lower_alu_io() local
146 if (info->phase_io[phase].dst[u] == ROGUE_IO_INVALID) in rogue_lower_alu_io()
151 info->phase_io[phase].dst[u], in rogue_lower_alu_io()
154 alu->dst[u].ref = rogue_ref_io(info->phase_io[phase].dst[u]); in rogue_lower_alu_io()
158 if (info->phase_io[phase].src[u] == ROGUE_IO_INVALID) in rogue_lower_alu_io()
163 info->phase_io[phase].src[u], in rogue_lower_alu_io()
166 alu->src[u].ref = rogue_ref_io(info->phase_io[phase].src[u]); in rogue_lower_alu_io()
210 enum rogue_instr_phase phase = bitwise->instr.index; in rogue_lower_bitwise_io() local
213 if (info->phase_io[phase].dst[u] == ROGUE_IO_INVALID) in rogue_lower_bitwise_io()
218 info->phase_io[phase].dst[u], in rogue_lower_bitwise_io()
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/external/tcpdump/tests/
Disakmp4.out3 3 1970-01-01 00:00:00.000000 IP 192.1.2.254.500 > 192.1.2.23.500: isakmp: phase 1 I ident
4 4 1970-01-01 00:00:00.000000 IP 192.1.2.23.500 > 192.1.2.254.500: isakmp: phase 1 R ident
5 5 1970-01-01 00:00:00.000000 IP 192.1.2.254.500 > 192.1.2.23.500: isakmp: phase 1 I ident
6 6 1970-01-01 00:00:00.000000 IP 192.1.2.23.500 > 192.1.2.254.500: isakmp: phase 1 R ident
7 …-01 00:00:00.000000 IP 192.1.2.254.4500 > 192.1.2.23.4500: NONESP-encap: isakmp: phase 1 I ident[E]
8 …-01 00:00:00.000000 IP 192.1.2.23.4500 > 192.1.2.254.4500: NONESP-encap: isakmp: phase 1 R ident[E]
9 …00:00.000000 IP 192.1.2.254.4500 > 192.1.2.23.4500: NONESP-encap: isakmp: phase 2/others I oakley-…
10 …00:00.000000 IP 192.1.2.23.4500 > 192.1.2.254.4500: NONESP-encap: isakmp: phase 2/others R oakley-…
11 …00:00.000000 IP 192.1.2.254.4500 > 192.1.2.23.4500: NONESP-encap: isakmp: phase 2/others I oakley-…
15 …00:00.000000 IP 192.1.2.23.4500 > 192.1.2.254.4500: NONESP-encap: isakmp: phase 2/others R oakley-…
[all …]
/external/trusty/arm-trusted-firmware/plat/st/common/
Dstm32cubeprogrammer_usb.c20 uint8_t phase; member
36 if (dfu->phase != PHASE_RESET) { \
40 dfu->phase = PHASE_RESET; \
65 dfu->buffer[0] = dfu->phase; in dfu_callback_upload()
75 if (dfu->phase == PHASE_FLASHLAYOUT && in dfu_callback_upload()
80 if (dfu->phase == PHASE_RESET) { in dfu_callback_upload()
90 dfu->phase, alt, usb_dfu_get_phase(alt)); in dfu_callback_upload()
108 if ((dfu->phase != usb_dfu_get_phase(alt)) || in dfu_callback_download()
111 dfu->phase, alt, (uint32_t)dfu->address); in dfu_callback_download()
130 if (dfu->phase != usb_dfu_get_phase(alt)) { in dfu_callback_manifestation()
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/external/speex/libspeexdsp/
D_kiss_fft_guts.h133 # define KISS_FFT_COS(phase) floor(MIN(32767,MAX(-32767,.5+32768 * cos (phase)))) argument
134 # define KISS_FFT_SIN(phase) floor(MIN(32767,MAX(-32767,.5+32768 * sin (phase)))) argument
137 # define KISS_FFT_COS(phase) _mm_set1_ps( cos(phase) ) argument
138 # define KISS_FFT_SIN(phase) _mm_set1_ps( sin(phase) ) argument
141 # define KISS_FFT_COS(phase) (kiss_fft_scalar) cos(phase) argument
142 # define KISS_FFT_SIN(phase) (kiss_fft_scalar) sin(phase) argument
146 #define kf_cexp(x,phase) \ argument
148 (x)->r = KISS_FFT_COS(phase);\
149 (x)->i = KISS_FFT_SIN(phase);\
151 #define kf_cexp2(x,phase) \ argument
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/external/rnnoise/src/
D_kiss_fft_guts.h157 # define KISS_FFT_COS(phase) floor(.5+TWID_MAX*cos (phase)) argument
158 # define KISS_FFT_SIN(phase) floor(.5+TWID_MAX*sin (phase)) argument
161 # define KISS_FFT_COS(phase) _mm_set1_ps( cos(phase) ) argument
162 # define KISS_FFT_SIN(phase) _mm_set1_ps( sin(phase) ) argument
165 # define KISS_FFT_COS(phase) (kiss_fft_scalar) cos(phase) argument
166 # define KISS_FFT_SIN(phase) (kiss_fft_scalar) sin(phase) argument
170 #define kf_cexp(x,phase) \ argument
172 (x)->r = KISS_FFT_COS(phase);\
173 (x)->i = KISS_FFT_SIN(phase);\
176 #define kf_cexp2(x,phase) \ argument
[all …]
/external/libopus/celt/
D_kiss_fft_guts.h157 # define KISS_FFT_COS(phase) floor(.5+TWID_MAX*cos (phase)) argument
158 # define KISS_FFT_SIN(phase) floor(.5+TWID_MAX*sin (phase)) argument
161 # define KISS_FFT_COS(phase) _mm_set1_ps( cos(phase) ) argument
162 # define KISS_FFT_SIN(phase) _mm_set1_ps( sin(phase) ) argument
165 # define KISS_FFT_COS(phase) (kiss_fft_scalar) cos(phase) argument
166 # define KISS_FFT_SIN(phase) (kiss_fft_scalar) sin(phase) argument
170 #define kf_cexp(x,phase) \ argument
172 (x)->r = KISS_FFT_COS(phase);\
173 (x)->i = KISS_FFT_SIN(phase);\
176 #define kf_cexp2(x,phase) \ argument
[all …]
/external/MPAndroidChart/MPChartLib/src/main/java/com/github/mikephil/charting/animation/
DChartAnimator.java176 public void setPhaseY(float phase) { in setPhaseY() argument
177 if (phase > 1f) { in setPhaseY()
178 phase = 1f; in setPhaseY()
179 } else if (phase < 0f) { in setPhaseY()
180 phase = 0f; in setPhaseY()
182 mPhaseY = phase; in setPhaseY()
199 public void setPhaseX(float phase) { in setPhaseX() argument
200 if (phase > 1f) { in setPhaseX()
201 phase = 1f; in setPhaseX()
202 } else if (phase < 0f) { in setPhaseX()
[all …]
/external/cronet/stable/base/trace_event/
Dtyped_macros_internal.cc26 GetPhaseAndIdForTraceLog(bool explicit_track, uint64_t track_uuid, char phase) { in GetPhaseAndIdForTraceLog() argument
28 return std::make_pair(phase, trace_event_internal::kNoId); in GetPhaseAndIdForTraceLog()
30 switch (phase) { in GetPhaseAndIdForTraceLog()
32 phase = TRACE_EVENT_PHASE_NESTABLE_ASYNC_BEGIN; in GetPhaseAndIdForTraceLog()
35 phase = TRACE_EVENT_PHASE_NESTABLE_ASYNC_END; in GetPhaseAndIdForTraceLog()
38 phase = TRACE_EVENT_PHASE_NESTABLE_ASYNC_INSTANT; in GetPhaseAndIdForTraceLog()
43 return std::make_pair(phase, static_cast<unsigned long long>(track_uuid)); in GetPhaseAndIdForTraceLog()
119 char phase, in CreateTrackEvent() argument
125 DCHECK(phase == TRACE_EVENT_PHASE_BEGIN || phase == TRACE_EVENT_PHASE_END || in CreateTrackEvent()
126 phase == TRACE_EVENT_PHASE_INSTANT); in CreateTrackEvent()
[all …]

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