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Searched refs:qb (Results 1 – 25 of 105) sorted by relevance

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/external/llvm/test/MC/Mips/micromips-dspr2/
Dvalid.s5 absq_s.qb $3, $4 # CHECK: absq_s.qb $3, $4 # encoding: [0x00,0x64,0x01,0x3c]
12 addu.qb $3, $4, $5 # CHECK: addu.qb $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xcd]
14 addu_s.qb $3, $4, $5 # CHECK: addu_s.qb $3, $4, $5 # encoding: [0x00,0xa4,0x1c,0xcd]
15 adduh.qb $3, $4, $5 # CHECK: adduh.qb $3, $4, $5 # encoding: [0x00,0xa4,0x19,0x4d]
16 adduh_r.qb $3, $4, $5 # CHECK: adduh_r.qb $3, $4, $5 # encoding: [0x00,0xa4,0x1d,0x4d]
51 pick.qb $3, $4, $5 # CHECK: pick.qb $3, $4, $5 # encoding: [0x00,0xa4,0x19,0xed]
62 …precr.qb.ph $1, $2, $3 # CHECK: precr.qb.ph $1, $2, $3 # encoding: [0x00,0x62,0x08,0…
66 …precrq.qb.ph $11, $12, $13 # CHECK: precrq.qb.ph $11, $12, $13 # encoding: [0x01,0xac,0x58,0…
67 …precrqu_s.qb.ph $14, $15, $16 # CHECK: precrqu_s.qb.ph $14, $15, $16 # encoding: [0x02,0x0f,0x71,0…
73 shll.qb $3, $4, 5 # CHECK: shll.qb $3, $4, 5 # encoding: [0x00,0x64,0xa8,0x7c]
[all …]
Dinvalid.s6 shra.qb $3, $4, 8 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
7 shra.qb $3, $4, -1 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
8 shra_r.qb $3, $4, 8 # CHECK: :[[@LINE]]:21: error: expected 3-bit unsigned immediate
9 shra_r.qb $3, $4, -1 # CHECK: :[[@LINE]]:21: error: expected 3-bit unsigned immediate
/external/llvm/test/MC/Mips/dspr2/
Dvalid.s6 …absq_s.qb $3, $4 # CHECK: absq_s.qb $3, $4 # encoding: [0x7c,0x04,0…
18 …addu.qb $6, $7, $8 # CHECK: addu.qb $6, $7, $8 # encoding: [0x7c,0xe8,0…
19 …addu_s.qb $9, $10, $11 # CHECK: addu_s.qb $9, $10, $11 # encoding: [0x7d,0x4b,0…
21 …adduh.qb $15, $16, $17 # CHECK: adduh.qb $15, $16, $17 # encoding: [0x7e,0x11,0…
22 …adduh_r.qb $18, $19, $20 # CHECK: adduh_r.qb $18, $19, $20 # encoding: [0x7e,0x74,0…
30 …cmpgdu.eq.qb $2, $3, $4 # CHECK: cmpgdu.eq.qb $2, $3, $4 # encoding: [0x7c,0x64,0…
31 …cmpgdu.lt.qb $5, $6, $7 # CHECK: cmpgdu.lt.qb $5, $6, $7 # encoding: [0x7c,0xc7,0…
32 …cmpgdu.le.qb $8, $9, $10 # CHECK: cmpgdu.le.qb $8, $9, $10 # encoding: [0x7d,0x2a,0…
33 …cmpgu.eq.qb $11, $12, $13 # CHECK: cmpgu.eq.qb $11, $12, $13 # encoding: [0x7d,0x8d,0…
34 …cmpgu.lt.qb $14, $15, $16 # CHECK: cmpgu.lt.qb $14, $15, $16 # encoding: [0x7d,0xf0,0…
[all …]
Dinvalid.s15 shra.qb $3, $4, 8 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
16 shra.qb $3, $4, -1 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
17 shra_r.qb $3, $4, 8 # CHECK: :[[@LINE]]:21: error: expected 3-bit unsigned immediate
18 shra_r.qb $3, $4, -1 # CHECK: :[[@LINE]]:21: error: expected 3-bit unsigned immediate
/external/llvm/test/MC/Mips/micromips-dsp/
Dvalid.s6 addu.qb $3, $4, $5 # CHECK: addu.qb $3, $4, $5 # encoding: [0x00,0xa4,0x18,0xcd]
7 addu_s.qb $3, $4, $5 # CHECK: addu_s.qb $3, $4, $5 # encoding: [0x00,0xa4,0x1c,0xcd]
38 pick.qb $3, $4, $5 # CHECK: pick.qb $3, $4, $5 # encoding: [0x00,0xa4,0x19,0xed]
50 …precrq.qb.ph $11, $12, $13 # CHECK: precrq.qb.ph $11, $12, $13 # encoding: [0x01,0xac,0x58,0…
51 …precrqu_s.qb.ph $14, $15, $16 # CHECK: precrqu_s.qb.ph $14, $15, $16 # encoding: [0x02,0x0f,0x71,0…
57 shll.qb $3, $4, 5 # CHECK: shll.qb $3, $4, 5 # encoding: [0x00,0x64,0xa8,0x7c]
60 shllv.qb $3, $4, $5 # CHECK: shllv.qb $3, $4, $5 # encoding: [0x00,0x85,0x1b,0x95]
69 shrl.qb $3, $4, 5 # CHECK: shrl.qb $3, $4, 5 # encoding: [0x00,0x64,0xb8,0x7c]
70 shrlv.qb $3, $4, $5 # CHECK: shrlv.qb $3, $4, $5 # encoding: [0x00,0x85,0x1b,0x55]
74 subu.qb $3, $4, $5 # CHECK: subu.qb $3, $4, $5 # encoding: [0x00,0xa4,0x1a,0xcd]
[all …]
Dinvalid.s8 shll.qb $3, $4, 8 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
9 shll.qb $3, $4, -1 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
20 shrl.qb $3, $4, 8 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
21 shrl.qb $3, $4, -1 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
/external/llvm/test/MC/Mips/dsp/
Dvalid.s11 …addu.qb $6, $7, $8 # CHECK: addu.qb $6, $7, $8 # encoding: [0x7c,0x…
12 …addu_s.qb $9, $10, $11 # CHECK: addu_s.qb $9, $10, $11 # encoding: [0x7d,0x…
19 …cmpgu.eq.qb $11, $12, $13 # CHECK: cmpgu.eq.qb $11, $12, $13 # encoding: [0x7d,0x…
20 …cmpgu.lt.qb $14, $15, $16 # CHECK: cmpgu.lt.qb $14, $15, $16 # encoding: [0x7d,0x…
21 …cmpgu.le.qb $17, $18, $19 # CHECK: cmpgu.le.qb $17, $18, $19 # encoding: [0x7e,0x…
22 …cmpu.eq.qb $20, $21 # CHECK: cmpu.eq.qb $20, $21 # encoding: [0x7e,0x…
23 …cmpu.lt.qb $22, $23 # CHECK: cmpu.lt.qb $22, $23 # encoding: [0x7e,0x…
24 …cmpu.le.qb $24, $25 # CHECK: cmpu.le.qb $24, $25 # encoding: [0x7f,0x…
83 …pick.qb $2, $4, $8 # CHECK: pick.qb $2, $4, $8 # encoding: [0x7c,0x…
95 …precrq.qb.ph $16, $17, $18 # CHECK: precrq.qb.ph $16, $17, $18 # encoding: [0x7e,0x…
[all …]
Dinvalid.s18 shll.qb $3, $4, 8 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
19 shll.qb $3, $4, -1 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
28 shrl.qb $3, $4, 8 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
29 shrl.qb $3, $4, -1 # CHECK: :[[@LINE]]:19: error: expected 3-bit unsigned immediate
32 repl.qb $2, -1 # CHECK: :[[@LINE]]:15: error: expected 8-bit unsigned immediate
33 repl.qb $2, 256 # CHECK: :[[@LINE]]:15: error: expected 8-bit unsigned immediate
/external/pytorch/aten/src/ATen/native/quantized/cpu/
Dqmatmul.cpp15 inline void check_inputs(const Tensor& qa, const Tensor& qb) { in check_inputs() argument
20 qa.scalar_type() == qb.scalar_type(), in check_inputs()
26 qa.qscheme() == qb.qscheme(), in check_inputs()
34 const Tensor& qb, in qmatmul() argument
37 check_inputs(qa, qb); in qmatmul()
40 const int64_t b_num_dims = qb.dim(); in qmatmul()
53 const int64_t b_k = qb.size(num_dims - 2); in qmatmul()
54 const int64_t n = qb.size(num_dims - 1); in qmatmul()
66 const int64_t qb_dim = qb.size(i); in qmatmul()
90 const Tensor& qb_contig = qb.contiguous(); in qmatmul()
[all …]
DBinaryOps.cpp38 inline void check_inputs(const Tensor& qa, const Tensor& qb) { in check_inputs() argument
43 qa.qscheme() == qb.qscheme(), in check_inputs()
46 qa.scalar_type() == qb.scalar_type(), in check_inputs()
139 Tensor qnnpack_add(Tensor qa, Tensor qb, double scale, int64_t zero_point) { in qnnpack_add() argument
141 TORCH_CHECK(qa.scalar_type() == c10::kQUInt8 && qb.scalar_type() == c10::kQUInt8, in qnnpack_add()
147 toString(qb.scalar_type())); in qnnpack_add()
154 Tensor qb_contig = qb.contiguous(qa.suggest_memory_format()); in qnnpack_add()
292 Tensor xnnp_add(Tensor qa, Tensor qb, double scale, int64_t zero_point) { in xnnp_add() argument
302 Tensor qb_contig = qb.contiguous(qa_mem_format); in xnnp_add()
394 Tensor qadd(Tensor qa, Tensor qb, double scale, int64_t zero_point) { in qadd() argument
[all …]
Dqmul.cpp37 inline void check_inputs(const Tensor& qa, const Tensor& qb) { in check_inputs() argument
40 TORCH_CHECK(qa.scalar_type() == qb.scalar_type(), in check_inputs()
42 TORCH_CHECK(qa.qscheme() == qb.qscheme(), in check_inputs()
257 static Tensor run(Tensor qa, Tensor qb, double scale, int64_t zero_point) { in run() argument
258 check_inputs(qa, qb); in run()
262 return _mul_out_xnnpack<c10::qint8, ReLUFused>(qa, qb, scale, zero_point); in run()
267 infer_size_dimvector(qa.sizes(), qb.sizes()), in run()
273 return _mul_out<ReLUFused>(qc, qa, qb); in run()
280 static Tensor run(at::Tensor qa, at::Tensor qb, Tensor out) { in run() argument
281 check_inputs(qa, qb); in run()
[all …]
/external/llvm/test/MC/Disassembler/Mips/micromips-dspr2/
Dvalid.txt4 0x00 0x64 0x01 0x3c # CHECK: absq_s.qb $3, $4
7 0x00 0xa4 0x18 0xcd # CHECK: addu.qb $3, $4, $5
9 0x00 0xa4 0x1c 0xcd # CHECK: addu_s.qb $3, $4, $5
10 0x00 0xa4 0x19 0x4d # CHECK: adduh.qb $3, $4, $5
11 0x00 0xa4 0x1d 0x4d # CHECK: adduh_r.qb $3, $4, $5
50 0x00 0xa4 0x19 0xed # CHECK: pick.qb $3, $4, $5
61 0x00 0x62 0x08 0x6d # CHECK: precr.qb.ph $1, $2, $3
65 0x01 0xac 0x58 0xad # CHECK: precrq.qb.ph $11, $12, $13
66 0x02 0x0f 0x71 0x6d # CHECK: precrqu_s.qb.ph $14, $15, $16
72 0x00 0x64 0xa8 0x7c # CHECK: shll.qb $3, $4, 5
[all …]
/external/llvm/test/MC/Disassembler/Mips/dspr2/
Dvalid.txt4 0x7c 0x04 0x18 0x52 # CHECK: absq_s.qb $3, $4
16 0x7c 0xe8 0x30 0x10 # CHECK: addu.qb $6, $7, $8
17 0x7d 0x4b 0x49 0x10 # CHECK: addu_s.qb $9, $10, $11
19 0x7e 0x11 0x78 0x18 # CHECK: adduh.qb $15, $16, $17
20 0x7e 0x74 0x90 0x98 # CHECK: adduh_r.qb $18, $19, $20
28 0x7c 0x64 0x16 0x11 # CHECK: cmpgdu.eq.qb $2, $3, $4
29 0x7c 0xc7 0x2e 0x51 # CHECK: cmpgdu.lt.qb $5, $6, $7
30 0x7d 0x2a 0x46 0x91 # CHECK: cmpgdu.le.qb $8, $9, $10
31 0x7d 0x8d 0x59 0x11 # CHECK: cmpgu.eq.qb $11, $12, $13
32 0x7d 0xf0 0x71 0x51 # CHECK: cmpgu.lt.qb $14, $15, $16
[all …]
/external/pytorch/aten/src/ATen/native/quantized/cudnn/
DBinaryOps.cpp69 inline void check_inputs(const Tensor& qa, const Tensor& qb) { in check_inputs() argument
74 qa.qscheme() == qb.qscheme(), in check_inputs()
77 qa.scalar_type() == qb.scalar_type(), in check_inputs()
88 Tensor add(Tensor qa, Tensor qb, double output_scale, int64_t output_zero_point) { in add() argument
93 …TORCH_CHECK(qa.sizes() == qb.sizes(), "Quantized cudnn add currently expects both input tensors to… in add()
95 check_inputs(qa, qb); in add()
107 qb = qb.view(new_sizes); in add()
110 qb = qb.contiguous(c10::MemoryFormat::ChannelsLast); in add()
120 rhs_multiplier_tensor.fill_(qb.q_scale() / qa.q_scale()); in add()
131 setAddParams(&key.params, qa, qb, deterministic, allow_tf32); in add()
[all …]
/external/llvm/test/MC/Disassembler/Mips/micromips-dsp/
Dvalid.txt5 0x00 0xa4 0x18 0xcd # CHECK: addu.qb $3, $4, $5
6 0x00 0xa4 0x1c 0xcd # CHECK: addu_s.qb $3, $4, $5
37 0x00 0xa4 0x19 0xed # CHECK: pick.qb $3, $4, $5
49 0x01 0xac 0x58 0xad # CHECK: precrq.qb.ph $11, $12, $13
50 0x02 0x0f 0x71 0x6d # CHECK: precrqu_s.qb.ph $14, $15, $16
56 0x00 0x64 0xa8 0x7c # CHECK: shll.qb $3, $4, 5
59 0x00 0x85 0x1b 0x95 # CHECK: shllv.qb $3, $4, $5
68 0x00 0x64 0xb8 0x7c # CHECK: shrl.qb $3, $4, 5
69 0x00 0x85 0x1b 0x55 # CHECK: shrlv.qb $3, $4, $5
73 0x00 0xa4 0x1a 0xcd # CHECK: subu.qb $3, $4, $5
[all …]
/external/llvm/test/MC/Disassembler/Mips/dsp/
Dvalid.txt9 0x7c 0xe8 0x30 0x10 # CHECK: addu.qb $6, $7, $8
10 0x7d 0x4b 0x49 0x10 # CHECK: addu_s.qb $9, $10, $11
17 0x7d 0x8d 0x59 0x11 # CHECK: cmpgu.eq.qb $11, $12, $13
18 0x7d 0xf0 0x71 0x51 # CHECK: cmpgu.lt.qb $14, $15, $16
19 0x7e 0x53 0x89 0x91 # CHECK: cmpgu.le.qb $17, $18, $19
20 0x7e 0x95 0x00 0x11 # CHECK: cmpu.eq.qb $20, $21
21 0x7e 0xd7 0x00 0x51 # CHECK: cmpu.lt.qb $22, $23
22 0x7f 0x19 0x00 0x91 # CHECK: cmpu.le.qb $24, $25
81 0x7c 0x88 0x10 0xd1 # CHECK: pick.qb $2, $4, $8
93 0x7e 0x32 0x83 0x11 # CHECK: precrq.qb.ph $16, $17, $18
[all …]
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/
DMicroMipsDSPInstrInfo.td23 class ADDU_QB_MM_ENC : POOL32A_3R_FMT<"addu.qb", 0b00011001101>;
24 class ADDU_S_QB_MM_ENC : POOL32A_3R_FMT<"addu_s.qb", 0b10011001101>;
25 class ADDUH_QB_MMR2_ENC : POOL32A_3R_FMT<"adduh.qb", 0b00101001101>;
26 class ADDUH_R_QB_MMR2_ENC : POOL32A_3R_FMT<"adduh_r.qb", 0b10101001101>;
39 class ABSQ_S_QB_MMR2_ENC : POOL32A_2R_FMT<"absq_s.qb", 0b0000000100>;
49 class SHLL_QB_MM_ENC : POOL32A_2RSA3_FMT<"shll.qb", 0b0100001>;
52 class SHLLV_QB_MM_ENC : POOL32A_3RB0_FMT<"shllv.qb", 0b1110010101>;
55 class SHRA_QB_MMR2_ENC : POOL32A_2RSA3_FMT<"shra.qb", 0b0000111>;
56 class SHRA_R_QB_MMR2_ENC : POOL32A_2RSA3_FMT<"shra_r.qb", 0b1000111>;
61 class SHRAV_QB_MMR2_ENC : POOL32A_3R_FMT<"shrav.qb", 0b00111001101>;
[all …]
/external/llvm/lib/Target/Mips/
DMicroMipsDSPInstrInfo.td24 class ADDU_QB_MM_ENC : POOL32A_3R_FMT<"addu.qb", 0b00011001101>;
25 class ADDU_S_QB_MM_ENC : POOL32A_3R_FMT<"addu_s.qb", 0b10011001101>;
26 class ADDUH_QB_MMR2_ENC : POOL32A_3R_FMT<"adduh.qb", 0b00101001101>;
27 class ADDUH_R_QB_MMR2_ENC : POOL32A_3R_FMT<"adduh_r.qb", 0b10101001101>;
40 class ABSQ_S_QB_MMR2_ENC : POOL32A_2R_FMT<"absq_s.qb", 0b0000000100>;
50 class SHLL_QB_MM_ENC : POOL32A_2RSA3_FMT<"shll.qb", 0b0100001>;
53 class SHLLV_QB_MM_ENC : POOL32A_3RB0_FMT<"shllv.qb", 0b1110010101>;
56 class SHRA_QB_MMR2_ENC : POOL32A_2RSA3_FMT<"shra.qb", 0b0000111>;
57 class SHRA_R_QB_MMR2_ENC : POOL32A_2RSA3_FMT<"shra_r.qb", 0b1000111>;
62 class SHRAV_QB_MMR2_ENC : POOL32A_3R_FMT<"shrav.qb", 0b00111001101>;
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMicroMipsDSPInstrInfo.td23 class ADDU_QB_MM_ENC : POOL32A_3R_FMT<"addu.qb", 0b00011001101>;
24 class ADDU_S_QB_MM_ENC : POOL32A_3R_FMT<"addu_s.qb", 0b10011001101>;
25 class ADDUH_QB_MMR2_ENC : POOL32A_3R_FMT<"adduh.qb", 0b00101001101>;
26 class ADDUH_R_QB_MMR2_ENC : POOL32A_3R_FMT<"adduh_r.qb", 0b10101001101>;
39 class ABSQ_S_QB_MMR2_ENC : POOL32A_2R_FMT<"absq_s.qb", 0b0000000100>;
49 class SHLL_QB_MM_ENC : POOL32A_2RSA3_FMT<"shll.qb", 0b0100001>;
52 class SHLLV_QB_MM_ENC : POOL32A_3RB0_FMT<"shllv.qb", 0b1110010101>;
55 class SHRA_QB_MMR2_ENC : POOL32A_2RSA3_FMT<"shra.qb", 0b0000111>;
56 class SHRA_R_QB_MMR2_ENC : POOL32A_2RSA3_FMT<"shra_r.qb", 0b1000111>;
61 class SHRAV_QB_MMR2_ENC : POOL32A_3R_FMT<"shrav.qb", 0b00111001101>;
[all …]
/external/llvm/test/CodeGen/Mips/
Ddsp-r2.ll183 ; CHECK: cmpgdu.eq.qb
187 %2 = tail call i32 @llvm.mips.cmpgdu.eq.qb(<4 x i8> %0, <4 x i8> %1)
191 declare i32 @llvm.mips.cmpgdu.eq.qb(<4 x i8>, <4 x i8>) nounwind
195 ; CHECK: cmpgdu.lt.qb
199 %2 = tail call i32 @llvm.mips.cmpgdu.lt.qb(<4 x i8> %0, <4 x i8> %1)
203 declare i32 @llvm.mips.cmpgdu.lt.qb(<4 x i8>, <4 x i8>) nounwind
207 ; CHECK: cmpgdu.le.qb
211 %2 = tail call i32 @llvm.mips.cmpgdu.le.qb(<4 x i8> %0, <4 x i8> %1)
215 declare i32 @llvm.mips.cmpgdu.le.qb(<4 x i8>, <4 x i8>) nounwind
219 ; CHECK: precr.qb.ph
[all …]
Ddsp-r1.ll402 ; CHECK: addu.qb
406 %2 = tail call <4 x i8> @llvm.mips.addu.qb(<4 x i8> %0, <4 x i8> %1)
412 declare <4 x i8> @llvm.mips.addu.qb(<4 x i8>, <4 x i8>) nounwind
416 ; CHECK: addu_s.qb
420 %2 = tail call <4 x i8> @llvm.mips.addu.s.qb(<4 x i8> %0, <4 x i8> %1)
426 declare <4 x i8> @llvm.mips.addu.s.qb(<4 x i8>, <4 x i8>) nounwind
468 ; CHECK: subu.qb
472 %2 = tail call <4 x i8> @llvm.mips.subu.qb(<4 x i8> %0, <4 x i8> %1)
478 declare <4 x i8> @llvm.mips.subu.qb(<4 x i8>, <4 x i8>) nounwind
482 ; CHECK: subu_s.qb
[all …]
/external/llvm/test/MC/Mips/mips32r2/
Dinvalid-dspr2.s9 …absq_s.qb $15,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
18 …addu.qb $s6,$v1,$v1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
20 …addu_s.qb $s4,$s8,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
21 …adduh.qb $a1,$a1,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
22 …adduh_r.qb $a0,$9,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
28 …cmpgdu.eq.qb $s3,$zero,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
29 …cmpgdu.le.qb $v1,$15,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
30 …cmpgdu.lt.qb $s0,$gp,$sp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
31 …cmpgu.eq.qb $14,$s6,$s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
32 …cmpgu.le.qb $9,$a3,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU f…
[all …]
Dinvalid-dsp.s14 …addu.qb $s6,$v1,$v1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
15 …addu_s.qb $s4,$s8,$s1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
21 …cmpgu.eq.qb $14,$s6,$s8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
22 …cmpgu.le.qb $9,$a3,$s4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
23 …cmpgu.lt.qb $sp,$at,$8 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
24 …cmpu.eq.qb $v0,$24 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
25 …cmpu.le.qb $s1,$a1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
26 …cmpu.lt.qb $at,$a3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
66 …pick.qb $11,$a0,$gp # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
76 …precrq.qb.ph $a2,$12,$12 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
[all …]
/external/pytorch/aten/src/ATen/native/quantized/
DREADME.md20 Tensor quantized_xand(Tensor qa, Tensor qb) {
21 // Some type checks for qa and qb should be here...
26 auto iter = TensorIterator::binary_op(qc, qa, qb);
40 It takes two quantized tensors `qa` and `qb`, and uses `binary_kernel` to produce a quantized tenso…
66 m.def("quantized::xand(Tensor qa, Tensor qb) -> Tensor");
71 In the example above the schema is `"quantized::xand(Tensor qa, Tensor qb) -> Tensor"`.
92 - func: quantized_xand(Tensor qa, Tensor qb) -> Tensor
125 Tensor quantized_xand(Tensor qa, Tensor qb) {
169 def quantized_xand(qa, qb):
171 return ops.quantized.xand(qa, qb)
[all …]
/external/compiler-rt/lib/builtins/
Ddivtf3.c166 rep_t qb; in __divtf3() local
169 wideMultiply(quotient, bSignificand, &dummy, &qb); in __divtf3()
170 residual = (aSignificand << 113) - qb; in __divtf3()
174 wideMultiply(quotient, bSignificand, &dummy, &qb); in __divtf3()
175 residual = (aSignificand << 112) - qb; in __divtf3()

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