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Searched refs:reg_code (Results 1 – 3 of 3) sorted by relevance

/external/vixl/src/aarch64/
Dinstructions-aarch64.cc558 int reg_code = GetRmLow16(); in GetSVEMulZmAndIndex() local
572 reg_code &= 7; // Three bits used for the register. in GetSVEMulZmAndIndex()
578 return std::make_pair(reg_code, index); in GetSVEMulZmAndIndex()
586 int reg_code = GetRmLow16(); in GetSVEMulLongZmAndIndex() local
593 reg_code &= 7; in GetSVEMulLongZmAndIndex()
603 return std::make_pair(reg_code, index); in GetSVEMulLongZmAndIndex()
608 int reg_code = GetRm(); in GetNEONMulRmAndIndex() local
614 reg_code &= 0xf; in GetNEONMulRmAndIndex()
625 return std::make_pair(reg_code, index); in GetNEONMulRmAndIndex()
Ddebugger-aarch64.cc180 auto reg_code = ParseUint64String(str_code, 10); in ParseRegString() local
181 if (!reg_code) { in ParseRegString()
185 if (*reg_code > max_reg_num) { in ParseRegString()
189 return {{reg_prefix, static_cast<unsigned int>(*reg_code)}}; in ParseRegString()
Dsimulator-aarch64.cc5518 unsigned reg_code = instr->GetRd(); in VisitMoveWideImmediate() local
5520 is_64_bits ? ReadXRegister(reg_code) : ReadWRegister(reg_code); in VisitMoveWideImmediate()