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Searched refs:rt_code (Results 1 – 4 of 4) sorted by relevance

/external/vixl/src/aarch64/
Dsimulator-aarch64.h2554 void PrintRead(int rt_code, PrintRegisterFormat format, uintptr_t address);
2555 void PrintExtendingRead(int rt_code,
2559 void PrintWrite(int rt_code, PrintRegisterFormat format, uintptr_t address);
2560 void PrintVRead(int rt_code, PrintRegisterFormat format, uintptr_t address);
2561 void PrintVWrite(int rt_code, PrintRegisterFormat format, uintptr_t address);
2564 void PrintZRead(int rt_code, uintptr_t address) {
2565 vregisters_[rt_code].NotifyRegisterLogged();
2566 PrintZAccess(rt_code, "<-", address);
2568 void PrintZWrite(int rt_code, uintptr_t address) {
2569 PrintZAccess(rt_code, "->", address);
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Dsimulator-aarch64.cc1628 void Simulator::PrintVRegistersForStructuredAccess(int rt_code, in PrintVRegistersForStructuredAccess() argument
1638 int code = (rt_code + r) % kNumberOfVRegisters; in PrintVRegistersForStructuredAccess()
1647 void Simulator::PrintZRegistersForStructuredAccess(int rt_code, in PrintZRegistersForStructuredAccess() argument
1661 const uint8_t* value = vregisters_[rt_code].GetBytes() + byte_index; in PrintZRegistersForStructuredAccess()
1662 VIXL_ASSERT((byte_index + size) <= vregisters_[rt_code].GetSizeInBytes()); in PrintZRegistersForStructuredAccess()
1665 int code = (rt_code + r) % kNumberOfZRegisters; in PrintZRegistersForStructuredAccess()
1952 void Simulator::PrintVStructAccess(int rt_code, in PrintVStructAccess() argument
1966 PrintVRegistersForStructuredAccess(rt_code, reg_count, lane_mask, format); in PrintVStructAccess()
1982 void Simulator::PrintVSingleStructAccess(int rt_code, in PrintVSingleStructAccess() argument
1997 PrintVRegistersForStructuredAccess(rt_code, reg_count, lane_mask, format); in PrintVSingleStructAccess()
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/external/XNNPACK/src/jit/
Daarch64-assembler.cc712 void Assembler::ldr(uint32_t size, uint32_t opc, MemOperand xn, int32_t imm, uint8_t rt_code) { in ldr() argument
718 emit32(0x3C400400 | size << 30 | opc << 22 | imm9(imm) | rn(xn.base) | rt_code); in ldr()
721 void Assembler::str(uint32_t size, uint32_t opc, MemOperand xn, int32_t imm, uint8_t rt_code) { in str() argument
727 emit32(0x3C000400 | size << 30 | opc << 22 | imm9(imm) | rn(xn.base) | rt_code); in str()
/external/XNNPACK/src/xnnpack/
Daarch64-assembler.h401 void ldr(uint32_t size, uint32_t opc, MemOperand xn, int32_t imm, uint8_t rt_code);
402 void str(uint32_t size, uint32_t opc, MemOperand xn, int32_t imm, uint8_t rt_code);