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Searched refs:scalarize (Results 1 – 25 of 40) sorted by relevance

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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPULegalizerInfo.cpp268 .scalarize(0); in AMDGPULegalizerInfo()
273 .scalarize(0); in AMDGPULegalizerInfo()
281 .scalarize(0); in AMDGPULegalizerInfo()
286 .scalarize(0); in AMDGPULegalizerInfo()
296 .scalarize(0); in AMDGPULegalizerInfo()
302 .scalarize(0); // TODO: Implement. in AMDGPULegalizerInfo()
368 .scalarize(0); in AMDGPULegalizerInfo()
372 .scalarize(0); in AMDGPULegalizerInfo()
376 .scalarize(0); in AMDGPULegalizerInfo()
383 .scalarize(0) in AMDGPULegalizerInfo()
[all …]
/external/eigen/Eigen/src/Core/arch/SYCL/
DInteropHeaders.h134 EIGEN_DEVICE_FUNC static Scalar scalarize(Index, PacketReturnType &) { in scalarize() function
154 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE static Scalar scalarize(Index index, PacketReturnType &in) {
186 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE static Scalar scalarize(Index, PacketReturnType &in) {
203 EIGEN_DEVICE_FUNC EIGEN_STRONG_INLINE static Scalar scalarize(Index index, PacketReturnType &in) {
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/
DAMDGPULegalizerInfo.cpp528 .scalarize(0); in AMDGPULegalizerInfo()
535 .scalarize(0) in AMDGPULegalizerInfo()
543 .scalarize(0) in AMDGPULegalizerInfo()
553 .scalarize(0) in AMDGPULegalizerInfo()
562 .scalarize(0); in AMDGPULegalizerInfo()
566 .scalarize(0) in AMDGPULegalizerInfo()
577 .scalarize(0) in AMDGPULegalizerInfo()
585 .scalarize(0) in AMDGPULegalizerInfo()
592 .scalarize(0); in AMDGPULegalizerInfo()
596 .scalarize(0) in AMDGPULegalizerInfo()
[all …]
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64LegalizerInfo.cpp118 .scalarize(0); in AArch64LegalizerInfo()
178 .scalarize(0) in AArch64LegalizerInfo()
412 .scalarize(0); in AArch64LegalizerInfo()
494 scalarize(0)) in AArch64LegalizerInfo()
497 scalarize(1)) in AArch64LegalizerInfo()
538 .scalarize(0) in AArch64LegalizerInfo()
539 .scalarize(1); in AArch64LegalizerInfo()
580 .scalarize(1); in AArch64LegalizerInfo()
/external/llvm/test/CodeGen/X86/
Dlegalizedag_vec.ll7 ; legalizing the divide in LegalizeDAG, we scalarize the vector divide and make
Dvec_shift6.ll6 ; Verify that we don't scalarize a packed vector shift left of 16-bit
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/
DLegalizeMutations.cpp67 LegalizeMutation LegalizeMutations::scalarize(unsigned TypeIdx) { in scalarize() function in LegalizeMutations
/external/llvm/test/Analysis/CostModel/AArch64/
Dstore.ll10 ; We scalarize the loads/stores because there is no vector register name for
/external/llvm/test/Transforms/Scalarizer/
Dstore-bug.ll1 ; RUN: opt -scalarizer -scalarize-load-store -S < %s | FileCheck %s
Ddbginfo.ll1 ; RUN: opt %s -scalarizer -scalarize-load-store -S | FileCheck %s
/external/llvm/test/Transforms/LoopVectorize/X86/
Dfp32_to_uint32-cost-model.ll9 ; If we need to scalarize the fptoui and then use inserts to build up the
Dfp64_to_uint32-cost-model.ll10 ; If we need to scalarize the fptoui and then use inserts to build up the
/external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/GlobalISel/
DLegalizeMutations.cpp108 LegalizeMutation LegalizeMutations::scalarize(unsigned TypeIdx) { in scalarize() function in LegalizeMutations
/external/llvm/test/CodeGen/AArch64/
Daarch64-neon-v1i1-setcc.ll5 ; is illegal in AArch64 backend, the legalizer tries to scalarize this node.
/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/GlobalISel/
DLegalizerInfo.h386 LegalizeMutation scalarize(unsigned TypeIdx);
911 LegalizeRuleSet &scalarize(unsigned TypeIdx) { in scalarize() function
914 LegalizeMutations::scalarize(TypeIdx)); in scalarize()
921 LegalizeMutations::scalarize(TypeIdx)); in scalarizeIf()
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/
DLegalizerInfo.h286 LegalizeMutation scalarize(unsigned TypeIdx);
735 LegalizeRuleSet &scalarize(unsigned TypeIdx) { in scalarize() function
738 LegalizeMutations::scalarize(TypeIdx)); in scalarize()
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/GISel/
DAArch64LegalizerInfo.cpp170 .scalarize(0); in AArch64LegalizerInfo()
250 .scalarize(0) in AArch64LegalizerInfo()
669 .scalarize(1); in AArch64LegalizerInfo()
794 .scalarize(1) in AArch64LegalizerInfo()
/external/mesa3d/docs/relnotes/
D22.1.2.rst145 - zink: scalarize when rewriting explicit 64bit io
/external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/
DMachinePassRegistry.def51 FUNCTION_PASS("scalarize-masked-mem-intrin", ScalarizeMaskedMemIntrinPass, ())
/external/llvm/test/CodeGen/PowerPC/
Dvsx.ll1011 ; This should scalarize, and the current code quality is not good.
1025 ; This should scalarize, and the current code quality is not good.
1039 ; This should scalarize, and the current code quality is not good.
1129 ; This should scalarize, and the current code quality is not good.
/external/llvm/test/Transforms/LoopVectorize/
Dinduction.ll129 ; Make sure we scalarize the step vectors used for the pointer arithmetic. We
207 ; Make sure we scalarize the step vectors used for the pointer arithmetic. We
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/
DX86LegalizerInfo.cpp75 .scalarize(0) in X86LegalizerInfo()
/external/mesa3d/src/compiler/nir/
Dnir_lower_io.c2088 bool scalarize = vec_stride > scalar_size || in nir_lower_explicit_io_instr() local
2094 if (scalarize) { in nir_lower_explicit_io_instr()
2123 if (scalarize) { in nir_lower_explicit_io_instr()
/external/eigen/unsupported/Eigen/CXX11/src/Tensor/
DTensorContractionSycl.h224 *ptr = PacketWrapper<PacketType, PacketSize>::scalarize(i, packet_data); in write()
695 …igen::TensorSycl::internal::PacketWrapper<PacketReturnType, PacketSize>::scalarize(mId, privetOut);
/external/swiftshader/third_party/llvm-16.0/llvm/lib/Passes/
DPassRegistry.def379 FUNCTION_PASS("scalarize-masked-mem-intrin", ScalarizeMaskedMemIntrinPass())

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