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Searched refs:src_gpr (Results 1 – 20 of 20) sorted by relevance

/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/
DCaymanInstructions.td110 : VTX_READ_cm <"VTX_READ_8 $dst_gpr, $src_gpr",
121 : VTX_READ_cm <"VTX_READ_16 $dst_gpr, $src_gpr",
132 : VTX_READ_cm <"VTX_READ_32 $dst_gpr, $src_gpr",
143 // to the $src_gpr registers of the VTX_READ.
148 let Constraints = "$src_gpr.ptr = $dst_gpr";
152 : VTX_READ_cm <"VTX_READ_64 $dst_gpr.XY, $src_gpr",
163 : VTX_READ_cm <"VTX_READ_128 $dst_gpr.XYZW, $src_gpr",
174 // the same constraint as VTX_READ_32_eg, because the $src_gpr.ptr and $dst
181 def : R600Pat<(i32:$dst_gpr (vtx_id3_az_extloadi8 ADDRVTX_READ:$src_gpr)),
182 (VTX_READ_8_cm MEMxi:$src_gpr, 3)>;
[all …]
DEvergreenInstructions.td184 : VTX_READ_eg <"VTX_READ_8 $dst_gpr, $src_gpr",
196 : VTX_READ_eg <"VTX_READ_16 $dst_gpr, $src_gpr",
208 : VTX_READ_eg <"VTX_READ_32 $dst_gpr, $src_gpr",
220 // to the $src_gpr registers of the VTX_READ.
225 let Constraints = "$src_gpr.ptr = $dst_gpr";
229 : VTX_READ_eg <"VTX_READ_64 $dst_gpr.XY, $src_gpr",
241 : VTX_READ_eg <"VTX_READ_128 $dst_gpr.XYZW, $src_gpr",
253 // the same constraint as VTX_READ_32_eg, because the $src_gpr.ptr and $dst
260 def : EGPat<(i32:$dst_gpr (vtx_id3_az_extloadi8 ADDRVTX_READ:$src_gpr)),
261 (VTX_READ_8_eg MEMxi:$src_gpr, 3)>;
[all …]
DR600InstrFormats.td218 bits<7> src_gpr;
230 let Word0{22-16} = src_gpr;
DR600Instructions.td243 …: InstR600ISA <outs, (ins MEMxi:$src_gpr, i8imm:$buffer_id), !strconcat(" ", name, ", #$buffer_id…
1455 …InstR600ISA <(outs R600_Reg128:$dst_gpr), (ins (MEMxi $src_gpr, $src_index):$src, i32imm:$buffer_i…
1509 …InstR600ISA <(outs R600_Reg128:$dst_gpr), (ins (MEMxi $src_gpr, $src_index):$src, i32imm:$buffer_i…
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DCaymanInstructions.td111 : VTX_READ_cm <"VTX_READ_8 $dst_gpr, $src_gpr",
122 : VTX_READ_cm <"VTX_READ_16 $dst_gpr, $src_gpr",
133 : VTX_READ_cm <"VTX_READ_32 $dst_gpr, $src_gpr",
144 // to the $src_gpr registers of the VTX_READ.
149 let Constraints = "$src_gpr.ptr = $dst_gpr";
153 : VTX_READ_cm <"VTX_READ_64 $dst_gpr.XY, $src_gpr",
164 : VTX_READ_cm <"VTX_READ_128 $dst_gpr.XYZW, $src_gpr",
175 // the same constraint as VTX_READ_32_eg, because the $src_gpr.ptr and $dst
182 def : R600Pat<(i32:$dst_gpr (vtx_id3_az_extloadi8 ADDRVTX_READ:$src_gpr)),
183 (VTX_READ_8_cm MEMxi:$src_gpr, 3)>;
[all …]
DEvergreenInstructions.td176 : VTX_READ_eg <"VTX_READ_8 $dst_gpr, $src_gpr",
188 : VTX_READ_eg <"VTX_READ_16 $dst_gpr, $src_gpr",
200 : VTX_READ_eg <"VTX_READ_32 $dst_gpr, $src_gpr",
212 // to the $src_gpr registers of the VTX_READ.
217 let Constraints = "$src_gpr.ptr = $dst_gpr";
221 : VTX_READ_eg <"VTX_READ_64 $dst_gpr.XY, $src_gpr",
233 : VTX_READ_eg <"VTX_READ_128 $dst_gpr.XYZW, $src_gpr",
245 // the same constraint as VTX_READ_32_eg, because the $src_gpr.ptr and $dst
252 def : EGPat<(i32:$dst_gpr (vtx_id3_az_extloadi8 ADDRVTX_READ:$src_gpr)),
253 (VTX_READ_8_eg MEMxi:$src_gpr, 3)>;
[all …]
DR600InstrFormats.td218 bits<7> src_gpr;
230 let Word0{22-16} = src_gpr;
DR600Instructions.td255 …: InstR600ISA <outs, (ins MEMxi:$src_gpr, i8imm:$buffer_id), !strconcat(" ", name, ", #$buffer_id…
/external/llvm/lib/Target/AMDGPU/
DCaymanInstructions.td109 : VTX_READ_cm <"VTX_READ_8 $dst_gpr, $src_gpr", buffer_id,
120 : VTX_READ_cm <"VTX_READ_16 $dst_gpr, $src_gpr", buffer_id,
131 : VTX_READ_cm <"VTX_READ_32 $dst_gpr, $src_gpr", buffer_id,
142 // to the $src_gpr registers of the VTX_READ.
147 let Constraints = "$src_gpr.ptr = $dst_gpr";
151 : VTX_READ_cm <"VTX_READ_64 $dst_gpr, $src_gpr", buffer_id,
162 : VTX_READ_cm <"VTX_READ_128 $dst_gpr.XYZW, $src_gpr", buffer_id,
173 // the same constraint as VTX_READ_32_eg, because the $src_gpr.ptr and $dst
181 [(set i32:$dst_gpr, (load_param_exti8 ADDRVTX_READ:$src_gpr))]
185 [(set i32:$dst_gpr, (load_param_exti16 ADDRVTX_READ:$src_gpr))]
[all …]
DEvergreenInstructions.td136 : VTX_READ_eg <"VTX_READ_8 $dst_gpr, $src_gpr", buffer_id,
148 : VTX_READ_eg <"VTX_READ_16 $dst_gpr, $src_gpr", buffer_id,
160 : VTX_READ_eg <"VTX_READ_32 $dst_gpr, $src_gpr", buffer_id,
172 // to the $src_gpr registers of the VTX_READ.
177 let Constraints = "$src_gpr.ptr = $dst_gpr";
181 : VTX_READ_eg <"VTX_READ_64 $dst_gpr.XY, $src_gpr", buffer_id,
193 : VTX_READ_eg <"VTX_READ_128 $dst_gpr.XYZW, $src_gpr", buffer_id,
205 // the same constraint as VTX_READ_32_eg, because the $src_gpr.ptr and $dst
214 [(set i32:$dst_gpr, (load_param_exti8 ADDRVTX_READ:$src_gpr))]
218 [(set i32:$dst_gpr, (load_param_exti16 ADDRVTX_READ:$src_gpr))]
[all …]
DR600InstrFormats.td209 bits<7> src_gpr;
221 let Word0{22-16} = src_gpr;
DR600Instructions.td287 : InstR600ISA <outs, (ins MEMxi:$src_gpr), !strconcat(" ", name), pattern>,
/external/mesa3d/src/gallium/drivers/r600/
Dr600_asm.h67 unsigned src_gpr; member
98 unsigned src_gpr; member
130 unsigned src_gpr; member
Dr600_asm.c1483 bc->ngpr = MAX2(bc->ngpr, vtx->src_gpr + 1); in r600_bytecode_add_vtx_internal()
1525 if (ttex->dst_gpr == ntex->src_gpr) { in r600_bytecode_add_tex()
1558 if (ntex->src_gpr >= bc->ngpr) { in r600_bytecode_add_tex()
1559 bc->ngpr = ntex->src_gpr + 1; in r600_bytecode_add_tex()
1635 S_SQ_VTX_WORD0_SRC_GPR(vtx->src_gpr) | in r600_bytecode_vtx_build()
1668 S_SQ_TEX_WORD0_SRC_GPR(tex->src_gpr) | in r600_bytecode_tex_build()
2492 o += fprintf(stderr, ", R%d.", tex->src_gpr); in r600_bytecode_disasm()
2545 o += fprintf(stderr, ", R%d.", vtx->src_gpr); in r600_bytecode_disasm()
2602 o += fprintf(stderr, ", R%d.", gds->src_gpr); in r600_bytecode_disasm()
Dr700_asm.c122 S_SQ_MEM_RD_WORD0_SRC_GPR(mem->src_gpr) | in r700_bytecode_fetch_mem_build()
Deg_asm.c171 S_SQ_MEM_GDS_WORD0_SRC_GPR(gds->src_gpr) | in eg_bytecode_gds_build()
Dr600_shader.c423 vtx.src_gpr = elements[i].instance_divisor > 1 ? i + 1 : 0; in r600_create_vertex_fetch_shader()
770 vtx.src_gpr = 0; in generate_gs_copy_shader()
/external/mesa3d/src/freedreno/ir3/
Dir3_parser.y765 %type <reg> dst const src_gpr src_a0 src_a1 src_p0 cat0_src1 cat0_src2
1193 cat5_samp_tex: src_gpr
1201 | src_gpr ',' cat5_a1
1203 cat5_instr: cat5_opc_dsxypp cat5_flags dst_reg ',' src_gpr
1204 | cat5_opc cat5_flags cat5_type dst_reg ',' src_gpr ',' src_gpr ',' cat5_samp_tex_…
1205 | cat5_opc cat5_flags cat5_type dst_reg ',' src_gpr ',' cat5_samp_tex_all
1208 | cat5_opc_isam cat5_flags cat5_type dst_reg ',' src_gpr ',' src_gpr ',' cat5_samp…
1209 | cat5_opc_isam cat5_flags cat5_type dst_reg ',' src_gpr ',' cat5_samp_tex_all
1210 | cat5_opc_isam '.' 'v' cat5_flags cat5_type dst_reg ',' src_gpr src_uoffset ',' c…
1533 src_gpr: T_REGISTER { $$ = new_src($1, 0); }
[all …]
/external/mesa3d/src/gallium/drivers/r600/sfn/
Dsfn_assembler.cpp507 tex.src_gpr = tex_instr.src().sel(); in visit()
725 vtx.src_gpr = fetch_instr.src().sel(); in visit()
773 gds.src_gpr = value.sel(); in visit()
790 gds.src_gpr = value.sel(); in visit()
989 gds.src_gpr = instr.src().sel(); in visit()
/external/mesa3d/src/gallium/auxiliary/translate/
Dtranslate_sse.c350 struct x86_reg dst_xmm, struct x86_reg src_gpr, in emit_mov64() argument
354 x64_mov64(p->func, dst_gpr, src_gpr); in emit_mov64()
375 struct x86_reg src_gpr, struct x86_reg src_xmm) in emit_store64() argument
377 emit_mov64(p, dst, dst, src_gpr, src_xmm); in emit_store64()