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Searched refs:test_enable (Results 1 – 19 of 19) sorted by relevance

/external/mesa3d/src/intel/vulkan_hasvk/
Dgfx8_cmd_buffer.c152 if (!ds->depth.test_enable) in want_depth_pma_fix()
306 ds.DepthTestEnable = opt_ds.depth.test_enable; in genX()
309 ds.StencilTestEnable = opt_ds.stencil.test_enable; in genX()
Dgfx7_cmd_buffer.c173 .DepthTestEnable = opt_ds.depth.test_enable, in genX()
176 .StencilTestEnable = opt_ds.stencil.test_enable, in genX()
/external/mesa3d/src/vulkan/runtime/
Dvk_graphics_state.h534 bool test_enable; member
568 bool test_enable; member
Dvk_graphics_state.c857 ds->depth.test_enable = ds_info->depthTestEnable; in vk_depth_stencil_state_init()
863 ds->stencil.test_enable = ds_info->stencilTestEnable; in vk_depth_stencil_state_init()
929 ds->depth.test_enable = false; in vk_optimize_depth_stencil_state()
937 ds->stencil.test_enable = false; in vk_optimize_depth_stencil_state()
942 if (!ds->depth.test_enable) { in vk_optimize_depth_stencil_state()
950 if (!ds->stencil.test_enable) { in vk_optimize_depth_stencil_state()
959 if (ds->stencil.test_enable && in vk_optimize_depth_stencil_state()
962 ds->depth.test_enable = false; in vk_optimize_depth_stencil_state()
986 ds->depth.test_enable = false; in vk_optimize_depth_stencil_state()
994 ds->stencil.test_enable = false; in vk_optimize_depth_stencil_state()
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/external/mesa3d/src/panfrost/vulkan/jm/
Dpanvk_vX_cmd_draw.c97 return has_depth_att(cmdbuf) && ds->depth.test_enable && in writes_depth()
107 return has_stencil_att(cmdbuf) && ds->stencil.test_enable && in writes_stencil()
127 if (ds->depth.test_enable && ds->depth.compare_op != VK_COMPARE_OP_ALWAYS) in ds_test_always_passes()
130 if (ds->stencil.test_enable && in ds_test_always_passes()
225 bool test_s = has_stencil_att(cmdbuf) && ds->stencil.test_enable; in panvk_draw_prepare_fs_rsd()
226 bool test_z = has_depth_att(cmdbuf) && ds->depth.test_enable; in panvk_draw_prepare_fs_rsd()
/external/mesa3d/src/freedreno/vulkan/
Dtu_lrz.cc695 bool z_test_enable = cmd->vk.dynamic_graphics_state.ds.depth.test_enable; in tu6_calculate_lrz_state()
841 bool stencil_test_enable = cmd->vk.dynamic_graphics_state.ds.stencil.test_enable; in tu6_calculate_lrz_state()
Dtu_pipeline.cc3205 ds->stencil.test_enable && rp->attachments & MESA_VK_RP_ATTACHMENT_STENCIL_BIT; in tu6_emit_ds()
3263 bool depth_test = ds->depth.test_enable; in tu6_emit_rb_depth_cntl()
3273 !ds->depth.test_enable && in tu6_emit_rb_depth_cntl()
3281 .z_write_enable = ds->depth.test_enable && ds->depth.write_enable, in tu6_emit_rb_depth_cntl()
3286 .z_read_enable = ds->depth.test_enable || ds->depth.bounds_test.enable, in tu6_emit_rb_depth_cntl()
Dtu_cmd_buffer.cc5399 bool stencil_test_enable = ds->stencil.test_enable; in tu6_update_simplified_stencil_state()
5469 bool depth_test_enable = cmd->vk.dynamic_graphics_state.ds.depth.test_enable; in tu6_build_depth_plane_z_mode()
5760 if (cmd->vk.dynamic_graphics_state.ds.depth.test_enable) in tu6_draw_common()
5766 if (cmd->vk.dynamic_graphics_state.ds.stencil.test_enable) in tu6_draw_common()
/external/mesa3d/src/panfrost/vulkan/csf/
Dpanvk_vX_cmd_draw.c217 return has_depth_att(cmdbuf) && ds->depth.test_enable && in writes_depth()
227 return has_stencil_att(cmdbuf) && ds->stencil.test_enable && in writes_stencil()
247 if (ds->depth.test_enable && ds->depth.compare_op != VK_COMPARE_OP_ALWAYS) in ds_test_always_passes()
250 if (ds->stencil.test_enable && in ds_test_always_passes()
1268 bool test_s = has_stencil_att(cmdbuf) && ds->stencil.test_enable; in prepare_ds()
1269 bool test_z = has_depth_att(cmdbuf) && ds->depth.test_enable; in prepare_ds()
/external/mesa3d/src/amd/vulkan/
Dradv_pipeline_graphics.c452 (!state->ds || !state->ds->stencil.test_enable)) in radv_pipeline_needed_dynamic_state()
901 dynamic->vk.ds.depth.test_enable = state->ds->depth.test_enable; in radv_pipeline_init_dynamic_state()
917 dynamic->vk.ds.stencil.test_enable = state->ds->stencil.test_enable; in radv_pipeline_init_dynamic_state()
Dradv_cmd_buffer.c226 RADV_CMP_COPY(vk.ds.depth.test_enable, RADV_DYNAMIC_DEPTH_TEST_ENABLE); in radv_bind_dynamic_state()
230 RADV_CMP_COPY(vk.ds.stencil.test_enable, RADV_DYNAMIC_STENCIL_TEST_ENABLE); in radv_bind_dynamic_state()
8246 state->dynamic.vk.ds.depth.test_enable = depthTestEnable; in radv_CmdSetDepthTestEnable()
8290 state->dynamic.vk.ds.stencil.test_enable = stencilTestEnable; in radv_CmdSetStencilTestEnable()
10664 d->vk.ds.stencil.test_enable && (render->ds_att_aspects & VK_IMAGE_ASPECT_STENCIL_BIT); in radv_emit_depth_stencil_state()
10667 S_028800_Z_ENABLE(d->vk.ds.depth.test_enable ? 1 : 0) | in radv_emit_depth_stencil_state()
/external/deqp-deps/amber/docs/
Damber_script.md673 TEST {test_enable}
693 # |test_enable| is either on or off and affects both faces. |fail_op|, |pass_op|,
698 TEST {test_enable}
/external/mesa3d/src/broadcom/vulkan/
Dv3dvx_cmd_buffer.c1441 if (!(dyn->ds.stencil.test_enable && has_stencil)) in v3dX()
2013 if (dyn->ds.depth.test_enable && has_depth) { in v3dX()
2020 config.stencil_enable = dyn->ds.stencil.test_enable && has_stencil; in v3dX()
Dv3dv_pipeline.c2645 if (!dyn->ds.depth.test_enable) { in v3dv_compute_ez_state()
2670 if (dyn->ds.stencil.test_enable && in v3dv_compute_ez_state()
/external/mesa3d/src/intel/vulkan/
DgenX_gfx_state.c326 const bool stc_test_en = ds->stencil.test_enable; in want_stencil_pma_fix()
1228 SET(WM_DEPTH_STENCIL, ds.DepthTestEnable, opt_ds.depth.test_enable); in update_wm_depth_stencil()
1232 SET(WM_DEPTH_STENCIL, ds.StencilTestEnable, opt_ds.stencil.test_enable); in update_wm_depth_stencil()
/external/mesa3d/src/asahi/vulkan/
Dhk_cmd_draw.c1921 return dyn->ds.stencil.test_enable && in hk_stencil_test_enabled()
2315 bool z_test = has_z && dyn->ds.depth.test_enable; in hk_flush_ppp_state()
2530 bool z_test = has_z && dyn->ds.depth.test_enable; in hk_flush_dynamic_state()
/external/mesa3d/src/nouveau/vulkan/
Dnvk_cmd_draw.c2912 bool enable = dyn->ds.depth.test_enable && in nvk_flush_ds_state()
2941 bool enable = dyn->ds.stencil.test_enable && in nvk_flush_ds_state()
/external/mesa3d/src/gallium/frontends/lavapipe/
Dlvp_execute.c884 state->dsa_state.depth_enabled = ps->ds->depth.test_enable; in handle_graphics_pipeline()
898 state->dsa_state.stencil[0].enabled = ps->ds->stencil.test_enable; in handle_graphics_pipeline()
899 state->dsa_state.stencil[1].enabled = ps->ds->stencil.test_enable; in handle_graphics_pipeline()
/external/mesa3d/src/imagination/vulkan/
Dpvr_cmd_buffer.c4983 if (ds_state.stencil.test_enable) { in pvr_setup_isp_faces_and_control()
5063 if (ds_state.stencil.test_enable && front_b != ispb_stencil_off) in pvr_setup_isp_faces_and_control()