Searched refs:v8h (Results 1 – 10 of 10) sorted by relevance
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedKryoDetails.td | 1017 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)$")>;
1035 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)_POST$")>;
1047 (instregex "LD1Three(v16b|v8h|v4s|v2d)$")>;
1059 (instregex "LD1Four(v16b|v8h|v4s|v2d)_POST$")>;
1065 (instregex "LD1Three(v16b|v8h|v4s|v2d)_POST$")>;
1077 (instregex "LD1Four(v16b|v8h|v4s|v2d)$")>;
1101 (instregex "LD(1|2)Two(v16b|v8h|v4s|v2d)$")>;
1113 (instregex "LD(1|2)Two(v16b|v8h|v4s|v2d)_POST$")>;
1125 (instregex "LD1R(v16b|v8h|v4s|v2d)$")>;
1137 (instregex "LD1R(v16b|v8h|v4s|v2d)_POST$")>;
[all …]
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| D | AArch64SchedFalkorDetails.td | 993 …(instregex "^ST1(One(v8b|v4h|v2s|v1d)|(i8|i16|i32|i64)|One(v16b|v8h|v4s|v2d)|Two(v8b|v4h|v2s|v1d))…
999 … (instregex "^ST1(One(v16b|v8h|v4s|v2d)|Two(v8b|v4h|v2s|v1d))_POST$")>;
1004 … (instregex "^ST1(Two(v16b|v8h|v4s|v2d)|(Three|Four)(v8b|v4h|v2s|v1d))$")>;
1006 (instregex "^ST2Two(v16b|v8h|v4s|v2d)$")>;
1013 … (instregex "^ST1(Two(v16b|v8h|v4s|v2d)|(Three|Four)(v8b|v4h|v2s|v1d))_POST$")>;
1016 (instregex "^ST2Two(v16b|v8h|v4s|v2d)_POST$")>;
1031 (instregex "^ST1Three(v16b|v8h|v4s|v2d)$")>;
1036 (instregex "^ST1Three(v16b|v8h|v4s|v2d)_POST$")>;
1048 (instregex "^ST1Four(v16b|v8h|v4s|v2d)$")>;
1053 (instregex "^ST1Four(v16b|v8h|v4s|v2d)_POST$")>;
[all …]
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| D | AArch64InstrFormats.td | 9223 def v8h : BaseSIMDLdSt<1, 1, opcode, 0b01, asm,
9296 def v8h : BaseSIMDLdSt<1, 0, opcode, 0b01, asm, (outs),
9551 def v8h : BaseSIMDLdR<1, R, opcode, S, 0b01, asm,
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
| D | AArch64SchedKryoDetails.td | 1017 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)$")>;
1035 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)_POST$")>;
1047 (instregex "LD1Three(v16b|v8h|v4s|v2d)$")>;
1059 (instregex "LD1Four(v16b|v8h|v4s|v2d)_POST$")>;
1065 (instregex "LD1Three(v16b|v8h|v4s|v2d)_POST$")>;
1077 (instregex "LD1Four(v16b|v8h|v4s|v2d)$")>;
1101 (instregex "LD(1|2)Two(v16b|v8h|v4s|v2d)$")>;
1113 (instregex "LD(1|2)Two(v16b|v8h|v4s|v2d)_POST$")>;
1125 (instregex "LD1R(v16b|v8h|v4s|v2d)$")>;
1137 (instregex "LD1R(v16b|v8h|v4s|v2d)_POST$")>;
[all …]
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| D | AArch64SchedFalkorDetails.td | 993 …(instregex "^ST1(One(v8b|v4h|v2s|v1d)|(i8|i16|i32|i64)|One(v16b|v8h|v4s|v2d)|Two(v8b|v4h|v2s|v1d))…
999 … (instregex "^ST1(One(v16b|v8h|v4s|v2d)|Two(v8b|v4h|v2s|v1d))_POST$")>;
1004 … (instregex "^ST1(Two(v16b|v8h|v4s|v2d)|(Three|Four)(v8b|v4h|v2s|v1d))$")>;
1006 (instregex "^ST2Two(v16b|v8h|v4s|v2d)$")>;
1013 … (instregex "^ST1(Two(v16b|v8h|v4s|v2d)|(Three|Four)(v8b|v4h|v2s|v1d))_POST$")>;
1016 (instregex "^ST2Two(v16b|v8h|v4s|v2d)_POST$")>;
1031 (instregex "^ST1Three(v16b|v8h|v4s|v2d)$")>;
1036 (instregex "^ST1Three(v16b|v8h|v4s|v2d)_POST$")>;
1048 (instregex "^ST1Four(v16b|v8h|v4s|v2d)$")>;
1053 (instregex "^ST1Four(v16b|v8h|v4s|v2d)_POST$")>;
[all …]
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| D | AArch64InstrFormats.td | 10026 def v8h : BaseSIMDLdSt<1, 1, opcode, 0b01, asm,
10099 def v8h : BaseSIMDLdSt<1, 0, opcode, 0b01, asm, (outs),
10354 def v8h : BaseSIMDLdR<1, R, opcode, S, 0b01, asm,
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64SchedKryoDetails.td | 1000 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)$")>;
1018 (instregex "LD1(One(v16b|v8h|v4s|v2d)|i64)_POST$")>;
1030 (instregex "LD1Three(v16b|v8h|v4s|v2d)$")>;
1042 (instregex "LD1Four(v16b|v8h|v4s|v2d)_POST$")>;
1048 (instregex "LD1Three(v16b|v8h|v4s|v2d)_POST$")>;
1060 (instregex "LD1Four(v16b|v8h|v4s|v2d)$")>;
1084 (instregex "LD(1|2)Two(v16b|v8h|v4s|v2d)$")>;
1096 (instregex "LD(1|2)Two(v16b|v8h|v4s|v2d)_POST$")>;
1108 (instregex "LD1R(v16b|v8h|v4s|v2d)$")>;
1120 (instregex "LD1R(v16b|v8h|v4s|v2d)_POST$")>;
[all …]
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| D | AArch64InstrFormats.td | 8302 def v8h : BaseSIMDLdSt<1, 1, opcode, 0b01, asm,
8375 def v8h : BaseSIMDLdSt<1, 0, opcode, 0b01, asm, (outs),
8630 def v8h : BaseSIMDLdR<1, R, opcode, S, 0b01, asm,
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| /external/XNNPACK/test/ |
| D | aarch64-assembler.cc | 131 EXPECT_ERROR(Error::kInvalidOperand, a.fmax(v3.v8h(), v31.v4s(), v16.v4s())); in TEST()
203 CHECK_ENCODING(0x4F008405, a.movi(v5.v8h(), 0)); in TEST()
207 CHECK_ENCODING(0x4C82746F, a.st1({v15.v8h()}, mem[x3], x2)); in TEST()
211 EXPECT_ERROR(Error::kInvalidOperand, a.st1({v15.v4s(), v16.v8h()}, mem[x20], x21)); in TEST()
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| /external/XNNPACK/src/xnnpack/ |
| D | aarch64-assembler.h | 78 VRegister v8h() const { return {code, 1, 1}; } in v8h() function
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