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Searched refs:vs_output_param_offset (Results 1 – 11 of 11) sorted by relevance

/external/mesa3d/src/amd/common/nir/
Dac_nir.h159 const uint8_t *vs_output_param_offset; /* GFX11+ */ member
197 const uint8_t *vs_output_param_offset,
Dac_nir_lower_ngg_mesh.c119 const uint8_t *vs_output_param_offset; member
331 unsigned param_offset = s->vs_output_param_offset[io_sem.location]; in ms_store_arrayed_output()
748 if (s->vs_output_param_offset[slot] > AC_EXP_PARAM_OFFSET_31) in ms_emit_attribute_ring_output_stores()
751 nir_def *soffset = nir_iadd_imm(b, off, s->vs_output_param_offset[slot] * 16 * 32); in ms_emit_attribute_ring_output_stores()
905 ac_nir_export_parameters(b, s->vs_output_param_offset, per_vertex_outputs, 0, &s->out); in emit_ms_vertex()
943 ac_nir_export_parameters(b, s->vs_output_param_offset, per_primitive_outputs, 0, &s->out); in emit_ms_primitive()
1357 const uint8_t *vs_output_param_offset, in ac_nir_lower_ngg_mesh() argument
1416 .vs_output_param_offset = vs_output_param_offset, in ac_nir_lower_ngg_mesh()
Dac_nir_lower_ngg.c498 const uint8_t offset = s->options->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID]; in emit_ngg_nogs_prim_export()
554 const uint8_t offset = s->options->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID]; in emit_ngg_nogs_prim_id_store_per_prim_to_attr_ring()
2454 ac_nir_store_parameters_to_attr_ring(b, s->options->vs_output_param_offset, in nogs_export_vertex_params()
2459 ac_nir_export_parameters(b, s->options->vs_output_param_offset, in nogs_export_vertex_params()
3163 ac_nir_export_parameters(b, s->options->vs_output_param_offset, in ngg_gs_export_vertices()
3176 ac_nir_store_parameters_to_attr_ring(b, s->options->vs_output_param_offset, in ngg_gs_export_vertices()
/external/mesa3d/src/gallium/drivers/radeonsi/
Dsi_shader.c1930 .vs_output_param_offset = shader->info.vs_output_param_offset, in si_lower_ngg()
2038 info->vs_output_param_offset[sem.location] == AC_EXP_PARAM_DEFAULT_VAL_0000) { in si_nir_assign_param_offsets()
2044 info->vs_output_param_offset[sem.location] = info->nr_param_exports++; in si_nir_assign_param_offsets()
2052 info->vs_output_param_offset[i] = info->vs_output_param_offset[slot_remap[i]]; in si_nir_assign_param_offsets()
2056 info->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = info->nr_param_exports++; in si_nir_assign_param_offsets()
2069 STATIC_ASSERT(sizeof(shader->info.vs_output_param_offset[0]) == 1); in si_assign_param_offsets()
2070 memset(shader->info.vs_output_param_offset, AC_EXP_PARAM_DEFAULT_VAL_0000, in si_assign_param_offsets()
2071 sizeof(shader->info.vs_output_param_offset)); in si_assign_param_offsets()
2082 shader->info.vs_output_param_offset); in si_assign_param_offsets()
2491 shader->info.vs_output_param_offset, in si_get_nir_shader()
[all …]
Dsi_shader.h859 uint8_t vs_output_param_offset[NUM_TOTAL_VARYING_SLOTS]; member
/external/mesa3d/src/amd/vulkan/
Dradv_shader_info.c393 if (outinfo->vs_output_param_offset[idx] == AC_EXP_PARAM_UNDEFINED) in assign_outinfo_param()
394 outinfo->vs_output_param_offset[idx] = extra_offset + (*total_param_exports)++; in assign_outinfo_param()
436 …memset(outinfo->vs_output_param_offset, AC_EXP_PARAM_UNDEFINED, sizeof(outinfo->vs_output_param_of… in radv_set_vs_output_param()
454 if (outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] == AC_EXP_PARAM_UNDEFINED) in radv_set_vs_output_param()
455 outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = total_param_exports++; in radv_set_vs_output_param()
462 outinfo->vs_output_param_offset[VARYING_SLOT_CLIP_DIST0] = total_param_exports++; in radv_set_vs_output_param()
464 outinfo->vs_output_param_offset[VARYING_SLOT_CLIP_DIST1] = total_param_exports++; in radv_set_vs_output_param()
476 if (outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] == AC_EXP_PARAM_UNDEFINED) in radv_set_vs_output_param()
477 … outinfo->vs_output_param_offset[VARYING_SLOT_PRIMITIVE_ID] = extra_offset + total_param_exports++; in radv_set_vs_output_param()
Dradv_shader_info.h36 uint8_t vs_output_param_offset[VARYING_SLOT_MAX]; member
Dradv_pipeline.c453 stage->info.outinfo.vs_output_param_offset, stage->info.outinfo.param_exports, in radv_postprocess_nir()
Dradv_shader.c768 options.vs_output_param_offset = info->outinfo.vs_output_param_offset; in radv_lower_ngg()
807 … options.vs_output_param_offset, options.has_param_exports, &scratch_ring, info->wave_size, in radv_lower_ngg()
Dradv_cmd_buffer.c2512 const unsigned vs_offset = outinfo->vs_output_param_offset[VARYING_SLOT_VAR0 + i]; in input_mask_to_ps_inputs()
2551 …offset_to_ps_input(outinfo->vs_output_param_offset[VARYING_SLOT_CLIP_DIST0], radv_ps_in_interpolat… in radv_emit_ps_inputs()
2555 …offset_to_ps_input(outinfo->vs_output_param_offset[VARYING_SLOT_CLIP_DIST1], radv_ps_in_interpolat… in radv_emit_ps_inputs()
2563 …ps_input_cntl[ps_offset++] = offset_to_ps_input(outinfo->vs_output_param_offset[VARYING_SLOT_VIEWP… in radv_emit_ps_inputs()
2568 …ps_input_cntl[ps_offset++] = offset_to_ps_input(outinfo->vs_output_param_offset[VARYING_SLOT_PRIMI… in radv_emit_ps_inputs()
Dradv_pipeline_graphics.c2249 gs_info->outinfo.vs_output_param_offset, gs_info->outinfo.param_exports, false, false, false, in radv_create_gs_copy_shader()