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/external/curl/docs/
DCURL-DISABLE.md1 <!--
4 SPDX-License-Identifier: curl
5 -->
7 # Code defines to disable features and protocols
11 Disable support for Alt-Svc: HTTP headers.
15 Disable support for binding the local end of connections.
19 Disable support for HTTP cookies.
23 Disable support for the Basic authentication methods.
27 Disable support for the Bearer authentication methods.
31 Disable support for the Digest authentication methods.
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/external/coreboot/src/vendorcode/intel/fsp/fsp2_0/geminilake/2.2.3.1/
DFspsUpd.h45 /** Offset 0x0020 - ActiveProcessorCores
46 Number of active cores. 0:Disable(Default), 1:Enable.
50 /** Offset 0x0021 - Disable Core1
51 Disable/Enable Core1. 0:Disable, 1:Enable(Default).
56 /** Offset 0x0022 - Disable Core2
57 Disable/Enable Core2. 0:Disable, 1:Enable(Default).
62 /** Offset 0x0023 - Disable Core3
63 Disable/Enable Core3. 0:Disable, 1:Enable(Default).
68 /** Offset 0x0024 - VMX Enable
69 Enable or Disable VMX. 0:Disable, 1:Enable(Default).
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/external/coreboot/src/vendorcode/intel/fsp/fsp2_0/geminilake/2.2.0.0/
DFspsUpd.h45 /** Offset 0x0020 - ActiveProcessorCores
46 Number of active cores. 0:Disable(Default), 1:Enable.
50 /** Offset 0x0021 - Disable Core1
51 Disable/Enable Core1. 0:Disable, 1:Enable(Default).
56 /** Offset 0x0022 - Disable Core2
57 Disable/Enable Core2. 0:Disable, 1:Enable(Default).
62 /** Offset 0x0023 - Disable Core3
63 Disable/Enable Core3. 0:Disable, 1:Enable(Default).
68 /** Offset 0x0024 - VMX Enable
69 Enable or Disable VMX. 0:Disable, 1:Enable(Default).
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/external/coreboot/src/vendorcode/intel/fsp/fsp2_0/graniterapids/sp/
DFspmUpd.h41 /** FSP-M Configuration
45 /** Offset 0x0040 - Customer Revision
50 /** Offset 0x0060 - Bus Ratio
55 /** Offset 0x0068 - D2K Credit Config
56 Set the D2K Credit Config - 1: Min, <b>2: Med(Default)</b>, 3: Max.
61 /** Offset 0x0069 - Snoop Throttle Config
62 Set the Snoop Throttle Config - <b>0: DIS(Default)</b>, 1: Min, 2: Med, 3: Max.
67 /** Offset 0x006A - Legacy VGA Soc
72 /** Offset 0x006B - Legacy VGA Stack
77 /** Offset 0x006C - Pcie P2P Performance Mode
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/external/coreboot/src/vendorcode/intel/fsp/fsp2_0/graniterapids/ap/
DFspmUpd.h41 /** FSP-M Configuration
45 /** Offset 0x0040 - Customer Revision
50 /** Offset 0x0060 - Bus Ratio
55 /** Offset 0x0068 - D2K Credit Config
56 Set the D2K Credit Config - 1: Min, <b>2: Med(Default)</b>, 3: Max.
61 /** Offset 0x0069 - Snoop Throttle Config
62 Set the Snoop Throttle Config - <b>0: DIS(Default)</b>, 1: Min, 2: Med, 3: Max.
67 /** Offset 0x006A - Legacy VGA Soc
72 /** Offset 0x006B - Legacy VGA Stack
77 /** Offset 0x006C - Pcie P2P Performance Mode
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/external/coreboot/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/
DFspmUpd.h42 /** FSP-M Configuration
46 /** Offset 0x0040 - Customer Revision
51 /** Offset 0x0060 - Bus Ratio
56 /** Offset 0x0068 - D2K Credit Config
57 Set the D2K Credit Config - 1: Min, <b>2: Med(Default)</b>, 3: Max.
62 /** Offset 0x0069 - Snoop Throttle Config
63 Set the Snoop Throttle Config - <b>0: DIS(Default)</b>, 1: Min, 2: Med, 3: Max.
68 /** Offset 0x006A - Legacy VGA Soc
73 /** Offset 0x006B - Legacy VGA Stack
78 /** Offset 0x006C - Pcie P2P Performance Mode
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/external/cronet/stable/build/toolchain/
Dclang_code_coverage_wrapper.py3 # Use of this source code is governed by a BSD-style license that can be
12 --files-to-instrument is passed, this script will remove flags from all files
13 except the ones listed in --files-to-instrument.
15 This script also contains hard-coded exclusion lists of files to never
17 flags removed in both modes. The OS can be selected with --target-os.
19 This script also contains hard-coded force lists of files to always instrument,
21 removed in either mode. The OS can be selected with --target-os.
23 The order of precedence is: force list, exclusion list, --files-to-instrument.
29 directory 'out/Release'. The paths should be written using OS-native path
46 --files-to-instrument=coverage_instrumentation_input.txt
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/external/angle/build/toolchain/
Dclang_code_coverage_wrapper.py3 # Use of this source code is governed by a BSD-style license that can be
12 --files-to-instrument is passed, this script will remove flags from all files
13 except the ones listed in --files-to-instrument.
15 This script also contains hard-coded exclusion lists of files to never
17 flags removed in both modes. The OS can be selected with --target-os.
19 This script also contains hard-coded force lists of files to always instrument,
21 removed in either mode. The OS can be selected with --target-os.
23 The order of precedence is: force list, exclusion list, --files-to-instrument.
29 directory 'out/Release'. The paths should be written using OS-native path
46 --files-to-instrument=coverage_instrumentation_input.txt
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/external/cronet/tot/build/toolchain/
Dclang_code_coverage_wrapper.py3 # Use of this source code is governed by a BSD-style license that can be
12 --files-to-instrument is passed, this script will remove flags from all files
13 except the ones listed in --files-to-instrument.
15 This script also contains hard-coded exclusion lists of files to never
17 flags removed in both modes. The OS can be selected with --target-os.
19 This script also contains hard-coded force lists of files to always instrument,
21 removed in either mode. The OS can be selected with --target-os.
23 The order of precedence is: force list, exclusion list, --files-to-instrument.
29 directory 'out/Release'. The paths should be written using OS-native path
46 --files-to-instrument=coverage_instrumentation_input.txt
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/external/coreboot/src/mainboard/google/brya/variants/baseboard/trulo/
Ddevicetree.cb3 # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
6 # EC memory map range is 0x900-0x9ff
9 register "usb2_ports[0]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 0
10 register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 1
11 register "usb2_ports[2]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 2
12 register "usb2_ports[3]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 3
13 register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 4
14 register "usb2_ports[5]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 5
15 register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 6
16 register "usb2_ports[7]" = "USB2_PORT_EMPTY" # Disable USB2.0 Port 7
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/external/tensorflow/tensorflow/python/ops/risc/
Drisc_grad.py7 # http://www.apache.org/licenses/LICENSE-2.0
22 # pylint: disable=unused-argument
29 # pylint: disable=unused-argument
36 # pylint: disable=unused-argument
43 # pylint: disable=unused-argument
50 # pylint: disable=unused-argument
57 # pylint: disable=unused-argument
64 # pylint: disable=unused-argument
71 # pylint: disable=unused-argument
78 # pylint: disable=unused-argument
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/external/chromium-crossbench/crossbench/flags/
Dknown_chrome_flags.py2 # Use of this source code is governed by a BSD-style license that can be
11 # https://peter.sh/experiments/chromium-command-line-switches/
36 "--accept-empty-variations-seed-signature",
37 "--accept-lang",
38 "--accept-resource-provider",
39 "--adaboost",
40 "--add-gpu-appcontainer-caps",
41 "--add-xr-appcontainer-caps",
42 "--additional-private-state-token-key-commitments",
43 "--aggressive-cache-discard",
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/external/llvm/test/Bitcode/
Dinvalid.test1 RUN: not llvm-dis -disable-output %p/Inputs/invalid-pr20485.bc 2>&1 | \
2 RUN: FileCheck --check-prefix=INVALID-ENCODING %s
3 RUN: not llvm-dis -disable-output %p/Inputs/invalid-abbrev.bc 2>&1 | \
4 RUN: FileCheck --check-prefix=BAD-ABBREV %s
5 RUN: not llvm-dis -disable-output %p/Inputs/invalid-unexpected-eof.bc 2>&1 | \
6 RUN: FileCheck --check-prefix=UNEXPECTED-EOF %s
7 RUN: not llvm-dis -disable-output %p/Inputs/invalid-bad-abbrev-number.bc 2>&1 | \
8 RUN: FileCheck --check-prefix=BAD-ABBREV-NUMBER %s
9 RUN: not llvm-dis -disable-output %p/Inputs/invalid-type-table-forward-ref.bc 2>&1 | \
10 RUN: FileCheck --check-prefix=BAD-TYPE-TABLE-FORWARD-REF %s
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/external/sdv/vsomeip/third_party/boost/container/include/boost/container/detail/
Dconfig_begin.hpp3 // (C) Copyright Ion Gaztanaga 2005-2013. Distributed under the Boost
20 #pragma warning (disable : 4127) // conditional expression is constant
21 …#pragma warning (disable : 4146) // unary minus operator applied to unsigned type, result still un…
22 #pragma warning (disable : 4197) // top-level volatile in cast is ignored
23 …#pragma warning (disable : 4251) // "identifier" : class "type" needs to have dll-interface to be …
24 …#pragma warning (disable : 4275) // non DLL-interface classkey "identifier" used as base for DLL-i…
25 #pragma warning (disable : 4284) // odd return type for operator->
26 …#pragma warning (disable : 4290) // C++ exception specification ignored except to indicate a funct…
27 #pragma warning (disable : 4324) // structure was padded due to __declspec(align(
28 …pragma warning (disable : 4345) // behavior change: an object of POD type constructed with an init…
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/external/coreboot/src/vendorcode/intel/fsp/fsp2_0/twinlake/
DFspmUpd.h3 Copyright (c) 2022 - 2024, Intel Corporation. All rights reserved.<BR>
58 /** Offset 0x0040 - Platform Reserved Memory Size
63 /** Offset 0x0048 - SPD Data Length
69 /** Offset 0x004A - Enable above 4GB MMIO resource support
70 Enable/disable above 4GB MMIO resource support
75 /** Offset 0x004B - Enable/Disable CrashLog Device 10
76 Enable(Default): Enable CPU CrashLog Device 10, Disable: Disable CPU CrashLog
81 /** Offset 0x004C - Memory SPD Pointer Controller 0 Channel 0 Dimm 0
86 /** Offset 0x0050 - Memory SPD Pointer Controller 0 Channel 0 Dimm 1
91 /** Offset 0x0054 - Memory SPD Pointer Controller 0 Channel 1 Dimm 0
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/external/coreboot/src/vendorcode/intel/fsp/fsp2_0/alderlake_n/
DFspmUpd.h58 /** Offset 0x0040 - Platform Reserved Memory Size
63 /** Offset 0x0048 - SPD Data Length
69 /** Offset 0x004A - Enable above 4GB MMIO resource support
70 Enable/disable above 4GB MMIO resource support
75 /** Offset 0x004B - Enable/Disable CrashLog Device 10
76 Enable(Default): Enable CPU CrashLog Device 10, Disable: Disable CPU CrashLog
81 /** Offset 0x004C - Memory SPD Pointer Controller 0 Channel 0 Dimm 0
86 /** Offset 0x0050 - Memory SPD Pointer Controller 0 Channel 0 Dimm 1
91 /** Offset 0x0054 - Memory SPD Pointer Controller 0 Channel 1 Dimm 0
96 /** Offset 0x0058 - Memory SPD Pointer Controller 0 Channel 1 Dimm 1
[all …]
/external/coreboot/src/vendorcode/intel/fsp/fsp2_0/alderlake/
DFspmUpd.h58 /** Offset 0x0040 - Platform Reserved Memory Size
63 /** Offset 0x0048 - SPD Data Length
69 /** Offset 0x004A - Enable above 4GB MMIO resource support
70 Enable/disable above 4GB MMIO resource support
75 /** Offset 0x004B - Enable/Disable CrashLog Device 10
76 Enable(Default): Enable CPU CrashLog Device 10, Disable: Disable CPU CrashLog
81 /** Offset 0x004C - Memory SPD Pointer Controller 0 Channel 0 Dimm 0
86 /** Offset 0x0050 - Memory SPD Pointer Controller 0 Channel 0 Dimm 1
91 /** Offset 0x0054 - Memory SPD Pointer Controller 0 Channel 1 Dimm 0
96 /** Offset 0x0058 - Memory SPD Pointer Controller 0 Channel 1 Dimm 1
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/external/tensorflow/tensorflow/lite/tools/cmake/modules/
Deigen.cmake8 # https://www.apache.org/licenses/LICENSE-2.0
30 # https://gitlab.kitware.com/cmake/cmake/-/issues/17770
42 # Patch Eigen to disable Fortran compiler check for BLAS and LAPACK tests.
50 # Patch Eigen to disable benchmark suite.
55 # Patch Eigen to disable doc generation, as it builds C++ standalone apps with
67 set(BUILD_TESTING OFF CACHE BOOL "Disable tests.")
68 set(EIGEN_TEST_CXX11 OFF CACHE BOOL "Disable tests of C++11 features.")
69 set(EIGEN_BUILD_BTL OFF CACHE BOOL "Disable benchmark suite.")
70 set(EIGEN_BUILD_PKGCONFIG OFF CACHE BOOL "Disable pkg-config.")
71 set(EIGEN_SPLIT_LARGE_TESTS OFF CACHE BOOL "Disable test splitting.")
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/external/pcre/maint/
DManyConfigTests13 # -noasan skip the test that uses -fsanitize=address
14 # -nousan skip the test that uses -fsanitize=undefined
15 # -nodebug skip the test that uses --enable-debug
16 # -nojit skip all JIT tests
17 # -nojitmain skip non-valgrind JIT tests
18 # -nojitvalgrind skip JIT tests with valgrind
19 # -nomain skip all the main (non-JIT) set of tests
20 # -nomainvalgrind skip the main (non-JIT) valgrind tests
21 # -notmp skip the tests in a temporary directory
22 # -notmpjit skip the JIT test in a temporary directory
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/external/coreboot/src/vendorcode/intel/fsp/fsp2_0/jasperlake/
DFspmUpd.h58 /** Offset 0x0040 - Platform Reserved Memory Size
63 /** Offset 0x0048 - SPD Data Length
69 /** Offset 0x004A - Enable above 4GB MMIO resource support
70 Enable/disable above 4GB MMIO resource support
75 /** Offset 0x004B - Reserved
79 /** Offset 0x004C - Memory SPD Pointer Channel 0 Dimm 0
84 /** Offset 0x0050 - Memory SPD Pointer Channel 0 Dimm 1
89 /** Offset 0x0054 - Memory SPD Pointer Channel 1 Dimm 0
94 /** Offset 0x0058 - Memory SPD Pointer Channel 1 Dimm 1
99 /** Offset 0x005C - Dq Byte Map CH0
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DFspsUpd.h77 UINT8 IntX; ///< Interrupt pin: INTA-INTD (see SI_PCH_INT_PIN)
88 /** Offset 0x0040 - Logo Pointer
93 /** Offset 0x0044 - Logo Size
98 /** Offset 0x0048 - Blt Buffer Address
103 /** Offset 0x004C - Blt Buffer Size
109 /** Offset 0x0050 - Graphics Configuration Ptr
114 /** Offset 0x0054 - Enable Device 4
115 Enable/disable Device 4
120 /** Offset 0x0055 - Enable eMMC Controller
121 Enable/disable eMMC Controller.
[all …]
/external/coreboot/src/vendorcode/intel/fsp/fsp2_0/raptorlake/
DFspmUpd.h58 /** Offset 0x0040 - Platform Reserved Memory Size
63 /** Offset 0x0048 - SPD Data Length
69 /** Offset 0x004A - Enable above 4GB MMIO resource support
70 Enable/disable above 4GB MMIO resource support
75 /** Offset 0x004B - Enable/Disable CrashLog Device 10
76 Enable(Default): Enable CPU CrashLog Device 10, Disable: Disable CPU CrashLog
81 /** Offset 0x004C - Memory SPD Pointer Controller 0 Channel 0 Dimm 0
86 /** Offset 0x0050 - Memory SPD Pointer Controller 0 Channel 0 Dimm 1
91 /** Offset 0x0054 - Memory SPD Pointer Controller 0 Channel 1 Dimm 0
96 /** Offset 0x0058 - Memory SPD Pointer Controller 0 Channel 1 Dimm 1
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/external/deqp/external/openglcts/data/gl_cts/data/mustpass/gl/khronos_mustpass/4.6.1.x/
Dmustpass.xml1 <?xml version="1.0" encoding="utf-8"?>
3 <!--/* Copyright (C) 2016-2017 The Khronos Group Inc
9 * http://www.apache.org/licenses/LICENSE-2.0
16 */-->
17 <!--/* WARNING: This is auto-generated file. Do not modify, since changes will
19 */-->
21 …6-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=64 --deqp-surface
22 …6-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=113 --deqp-surfac…
23-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=64 --deqp-surface-
24-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=-1 --deqp-surface-
[all …]
/external/deqp/external/openglcts/data/gl_cts/data/mustpass/gl/khronos_mustpass/main/
Dmustpass.xml1 <?xml version="1.0" encoding="utf-8"?>
3 <!--/* Copyright (C) 2016-2017 The Khronos Group Inc
9 * http://www.apache.org/licenses/LICENSE-2.0
16 */-->
17 <!--/* WARNING: This is auto-generated file. Do not modify, since changes will
19 */-->
21 …6-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=64 --deqp-surface
22 …6-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=113 --deqp-surfac…
23-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=64 --deqp-surface-
24-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=-1 --deqp-surface-
[all …]
/external/deqp/external/openglcts/data/gl_cts/data/mustpass/gl/khronos_mustpass/4.6.0.x/
Dmustpass.xml1 <?xml version="1.0" encoding="utf-8"?>
3 <!--/* Copyright (C) 2016-2017 The Khronos Group Inc
9 * http://www.apache.org/licenses/LICENSE-2.0
16 */-->
17 <!--/* WARNING: This is auto-generated file. Do not modify, since changes will
19 */-->
21 …6-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=64 --deqp-surface
22 …6-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=113 --deqp-surfac…
23-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=64 --deqp-surface-
24-main.txt" commandLine="--deqp-screen-rotation=unspecified --deqp-surface-width=-1 --deqp-surface-
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