| /external/curl/winbuild/ |
| D | README.md | 1 <!--
4 SPDX-License-Identifier: curl
5 -->
19 archive](https://developer.microsoft.com/en-us/windows/downloads/sdk-archive)
23 If you wish to support zlib, OpenSSL, c-ares, ssh2, you have to download them
27 |_curl-src
45 exist in all Visual Studio versions. For example, to build a 64-bit curl open
50 …Enable a 64-Bit, x64 hosted MSVC toolset on the command line](https://docs.microsoft.com/en-us/cpp…
52 …nd Environment Variables for Command-Line Builds](https://docs.microsoft.com/en-us/cpp/build/build…
54 …for Visual Studio](https://docs.microsoft.com/en-us/dotnet/framework/tools/developer-command-promp…
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| /external/coreboot/src/mainboard/prodrive/hermes/ |
| D | mainboard.c | 1 /* SPDX-License-Identifier: GPL-2.0-only */
30 if (bmc_cfg && bmc_cfg->efp3_displayport) in mainboard_vbt_filename()
31 return "vbt-avalanche.bin"; in mainboard_vbt_filename()
38 static void mb_configure_dp1_pwr(bool enable) in mb_configure_dp1_pwr() argument
40 gpio_output(GPP_K3, enable); in mb_configure_dp1_pwr()
43 static void mb_configure_dp2_pwr(bool enable) in mb_configure_dp2_pwr() argument
45 gpio_output(GPP_K4, enable); in mb_configure_dp2_pwr()
48 static void mb_configure_dp3_pwr(bool enable) in mb_configure_dp3_pwr() argument
50 gpio_output(GPP_K5, enable); in mb_configure_dp3_pwr()
53 static void mb_hda_amp_enable(bool enable) in mb_hda_amp_enable() argument
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| /external/webrtc/modules/audio_device/android/java/src/org/webrtc/voiceengine/ |
| D | WebRtcAudioEffects.java | 4 * Use of this source code is governed by a BSD-style license
25 // Calling enable() will active all effects that are
28 private static final boolean DEBUG = false;
30 private static final String TAG = "WebRtcAudioEffects";
34 private static final UUID AOSP_ACOUSTIC_ECHO_CANCELER =
35 UUID.fromString("bb392ec0-8d4d-11e0-a896-0002a5d5c51b");
36 private static final UUID AOSP_NOISE_SUPPRESSOR =
37 UUID.fromString("c06c8400-8e06-11e0-9cb6-0002a5d5c51b");
42 private static @Nullable Descriptor[] cachedEffects;
44 // Contains the audio effect objects. Created in enable() and destroyed
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| /external/trusty/arm-trusted-firmware/plat/mediatek/mt8195/drivers/apusys/ |
| D | apupll.c | 4 * SPDX-License-Identifier: BSD-3-Clause
68 static spinlock_t apupll_lock;
69 static spinlock_t npupll_lock;
70 static spinlock_t apupll_1_lock;
71 static spinlock_t apupll_2_lock;
72 static uint32_t pll_cnt[APUPLL_MAX];
74 * vd2pllidx() - voltage domain to pll idx.
78 * pll_idx[0] --> APUPLL (MDLA0/1)
79 * pll_idx[1] --> NPUPLL (VPU0/1)
80 * pll_idx[2] --> APUPLL1(CONN)
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| /external/iptables/ |
| D | INSTALL | 4 iptables uses the well-known configure(autotools) infrastructure.
14 * no kernel-source required
16 * but obviously a compiler, glibc-devel and linux-kernel-headers
25 --prefix=
31 --with-xtlibdir=
36 --enable-devel (or --disable-devel)
40 such as Xtables-addons or other 3rd-party extensions.
44 --enable-static
46 Produce additional binaries, iptables-static/ip6tables-static,
49 --disable-shared
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64TargetMachine.cpp | 1 //===-- AArch64TargetMachine.cpp - Define TargetMachine for AArch64 -------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
50 static cl::opt<bool> EnableCCMP("aarch64-enable-ccmp",
51 cl::desc("Enable the CCMP formation pass"),
54 static cl::opt<bool>
55 EnableCondBrTuning("aarch64-enable-cond-br-tune",
56 cl::desc("Enable the conditional branch tuning pass"),
59 static cl::opt<bool> EnableMCR("aarch64-enable-mcr",
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
| D | AArch64TargetMachine.cpp | 1 //===-- AArch64TargetMachine.cpp - Define TargetMachine for AArch64 -------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
58 static cl::opt<bool> EnableCCMP("aarch64-enable-ccmp",
59 cl::desc("Enable the CCMP formation pass"),
62 static cl::opt<bool>
63 EnableCondBrTuning("aarch64-enable-cond-br-tune",
64 cl::desc("Enable the conditional branch tuning pass"),
67 static cl::opt<bool> EnableAArch64CopyPropagation(
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| /external/webrtc/sdk/android/src/java/org/webrtc/audio/ |
| D | WebRtcAudioEffects.java | 4 * Use of this source code is governed by a BSD-style license
24 // Calling enable() will active all effects that are
27 private static final boolean DEBUG = false;
29 private static final String TAG = "WebRtcAudioEffectsExternal";
33 private static final UUID AOSP_ACOUSTIC_ECHO_CANCELER =
34 UUID.fromString("bb392ec0-8d4d-11e0-a896-0002a5d5c51b");
35 private static final UUID AOSP_NOISE_SUPPRESSOR =
36 UUID.fromString("c06c8400-8e06-11e0-9cb6-0002a5d5c51b");
41 private static @Nullable Descriptor[] cachedEffects;
43 // Contains the audio effect objects. Created in enable() and destroyed
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| /external/ltp/testcases/kernel/syscalls/statx/ |
| D | statx09.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * The statx() system call sets STATX_ATTR_VERITY if the file has fs-verity
35 static int mount_flag;
37 static const uint32_t hash_algorithms[] = {
41 static void test_flagged(void) in test_flagged()
55 static void test_unflagged(void) in test_unflagged()
68 static struct test_cases {
75 static void run(unsigned int i) in run()
80 static void flag_setup(void) in flag_setup()
83 struct fsverity_enable_arg enable; in flag_setup() local
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| /external/coreboot/src/vendorcode/cavium/include/bdk/libbdk-arch/ |
| D | bdk-csrs-dap.h | 3 /* This file is auto-generated. Do not edit */
6 * Copyright (c) 2003-2017 Cavium Inc. (support@cavium.com). All rights
79 #if __BYTE_ORDER == __BIG_ENDIAN /* Word 0 - Big Endian */
81 #else /* Word 0 - Little Endian */
83 #endif /* Word 0 - End */
90 static inline uint64_t BDK_DAP_CONST_FUNC(void) __attribute__ ((pure, always_inline));
91 static inline uint64_t BDK_DAP_CONST_FUNC(void) in BDK_DAP_CONST_FUNC()
103 #define arguments_BDK_DAP_CONST -1,-1,-1,-1
115 #if __BYTE_ORDER == __BIG_ENDIAN /* Word 0 - Big Endian */
119 #else /* Word 0 - Little Endian */
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| /external/libaom/av1/ |
| D | arg_defs.c | 14 static const struct arg_enum_list test_decode_enum[] = {
21 static const struct arg_enum_list bitdepth_enum[] = {
26 static const struct arg_enum_list stereo_mode_enum[] = {
28 { "left-right", STEREO_FORMAT_LEFT_RIGHT },
29 { "bottom-top", STEREO_FORMAT_BOTTOM_TOP },
30 { "top-bottom", STEREO_FORMAT_TOP_BOTTOM },
31 { "right-left", STEREO_FORMAT_RIGHT_LEFT },
36 static const struct arg_enum_list end_usage_enum[] = { { "vbr", AOM_VBR },
42 static const struct arg_enum_list tuning_enum[] = {
55 static const struct arg_enum_list dist_metric_enum[] = {
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| /external/coreboot/src/cpu/intel/model_1067x/ |
| D | model_1067x_init.c | 1 /* SPDX-License-Identifier: GPL-2.0-only */
14 static void configure_c_states(const int quad) in configure_c_states()
26 const int cst_range = (c6 ? 6 : (c5 ? 5 : 4)) - 2; /* zero means lvl2 */ in configure_c_states()
36 msr.lo |= (1 << 3); /* Enable dynamic L2. */ in configure_c_states()
37 msr.lo |= (1 << 14); /* Enable deeper sleep */ in configure_c_states()
41 msr.lo |= (1 << 10); /* Enable IO MWAIT redirection. */ in configure_c_states()
67 static void configure_p_states(const char stepping, const char cores) in configure_p_states()
74 msr.lo |= (1 << 28); /* Enable Super LFM. */ in configure_p_states()
77 if (rdmsr(MSR_FSB_CLOCK_VCC).hi & (1 << (63 - 32))) { in configure_p_states()
81 msr.lo |= (1 << 3); /* Enable hysteresis. */ in configure_p_states()
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| /external/arm-trusted-firmware/plat/hisilicon/hikey960/ |
| D | hikey960_bl_common.c | 4 * SPDX-License-Identifier: BSD-3-Clause
29 static void hikey960_enable_ppll3(void) in hikey960_enable_ppll3()
31 /* enable ppll3 */ in hikey960_enable_ppll3()
37 static void bus_idle_clear(unsigned int value) in bus_idle_clear()
52 timeout--; in bus_idle_clear()
60 static void set_vivobus_power_up(void) in set_vivobus_power_up()
62 /* clk enable */ in set_vivobus_power_up()
67 static void set_dss_power_up(void) in set_dss_power_up()
80 /* clk enable */ in set_dss_power_up()
95 /* clk enable */ in set_dss_power_up()
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| /external/trusty/arm-trusted-firmware/plat/hisilicon/hikey960/ |
| D | hikey960_bl_common.c | 4 * SPDX-License-Identifier: BSD-3-Clause
29 static void hikey960_enable_ppll3(void) in hikey960_enable_ppll3()
31 /* enable ppll3 */ in hikey960_enable_ppll3()
37 static void bus_idle_clear(unsigned int value) in bus_idle_clear()
52 timeout--; in bus_idle_clear()
60 static void set_vivobus_power_up(void) in set_vivobus_power_up()
62 /* clk enable */ in set_vivobus_power_up()
67 static void set_dss_power_up(void) in set_dss_power_up()
80 /* clk enable */ in set_dss_power_up()
95 /* clk enable */ in set_dss_power_up()
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| /external/coreboot/src/soc/rockchip/rk3288/ |
| D | hdmi.c | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Designware High-Definition Multimedia Interface (HDMI) driveG
33 static const struct tmds_n_cts n_cts_table[] = {
86 static const struct hdmi_phy_config rockchip_phy_config[] = {
102 static const struct hdmi_mpll_config rockchip_mpll_cfg[] = {
127 static const u32 csc_coeff_default[3][4] = {
133 static void hdmi_set_clock_regenerator(u32 n, u32 cts) in hdmi_set_clock_regenerator()
140 write32(&hdmi_regs->aud_n3, n3); in hdmi_set_clock_regenerator()
149 write32(&hdmi_regs->aud_cts3, cts3); in hdmi_set_clock_regenerator()
150 write32(&hdmi_regs->aud_cts2, (cts >> 8) & 0xff); in hdmi_set_clock_regenerator()
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| /external/coreboot/src/southbridge/intel/i82801dx/ |
| D | lpc.c | 1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <pc80/isa-dma.h>
26 * Set miscellaneous static southbridge features.
30 static void i82801dx_enable_ioapic(struct device *dev) in i82801dx_enable_ioapic()
35 reg32 |= (1 << 13); /* Coprocessor error enable (COPR_ERR_EN) */ in i82801dx_enable_ioapic()
36 reg32 |= (3 << 7); /* IOAPIC enable (APIC_EN) */ in i82801dx_enable_ioapic()
37 reg32 |= (1 << 2); /* DMA collection buffer enable (DCB_EN) */ in i82801dx_enable_ioapic()
38 reg32 |= (1 << 1); /* Delayed transaction enable (DTE) */ in i82801dx_enable_ioapic()
47 static void i82801dx_enable_serial_irqs(struct device *dev) in i82801dx_enable_serial_irqs()
51 (1 << 7) | (1 << 6) | ((21 - 17) << 2) | (0 << 0)); in i82801dx_enable_serial_irqs()
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| /external/coreboot/src/southbridge/intel/i82371eb/ |
| D | ide.c | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
18 * enable or disable the primary and secondary IDE interface, respectively.
20 * Depending on the configuration variable 'ide_legacy_enable' enable or
26 static void ide_init_enable(struct device *dev) in ide_init_enable()
29 struct southbridge_intel_i82371eb_config *conf = dev->chip_info; in ide_init_enable()
31 /* Enable/disable the primary IDE interface. */ in ide_init_enable()
33 reg16 = ONOFF(conf->ide0_enable, reg16, IDE_DECODE_ENABLE); in ide_init_enable()
36 conf->ide0_enable ? "on" : "off"); in ide_init_enable()
38 /* Enable/disable the secondary IDE interface. */ in ide_init_enable()
40 reg16 = ONOFF(conf->ide1_enable, reg16, IDE_DECODE_ENABLE); in ide_init_enable()
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| /external/coreboot/src/arch/arm/include/armv7/arch/ |
| D | cache.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
13 #define SCTLR_M (1 << 0) /* MMU enable */
14 #define SCTLR_A (1 << 1) /* Alignment check enable */
15 #define SCTLR_C (1 << 2) /* Data/unified cache enable */
17 #define SCTLR_CP15BEN (1 << 5) /* CP15 barrier enable */
21 #define SCTLR_SW (1 << 10) /* SWP and SWPB enable */
22 #define SCTLR_Z (1 << 11) /* Branch prediction enable */
23 #define SCTLR_I (1 << 12) /* Instruction cache enable */
27 #define SCTLR_HA (1 << 17) /* Hardware Access flag enable */
33 #define SCTLR_FI (1 << 21) /* Fast interrupt config enable */
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| /external/coreboot/src/cpu/intel/model_6fx/ |
| D | model_6fx_init.c | 1 /* SPDX-License-Identifier: GPL-2.0-only */
12 static void configure_c_states(void) in configure_c_states()
19 msr.lo |= (1 << 10); // Enable I/O MWAIT redirection for C-States in configure_c_states()
23 /* Number of supported C-States */ in configure_c_states()
37 // -2 because LVL0+1 aren't counted in configure_c_states()
38 msr.lo = (PMB0_BASE + 4) | ((HIGHEST_CLEVEL - 2) << 16); in configure_c_states()
44 static void configure_misc(void) in configure_misc()
49 msr.lo |= (1 << 3); /* TM1 enable */ in configure_misc()
50 msr.lo |= (1 << 13); /* TM2 enable */ in configure_misc()
56 msr.lo |= (1 << 16); /* Enhanced SpeedStep Enable */ in configure_misc()
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| /external/arm-trusted-firmware/plat/socionext/uniphier/ |
| D | uniphier_cci.c | 4 * SPDX-License-Identifier: BSD-3-Clause
17 static const int uniphier_cci_map[] = {1, 0};
19 static void __uniphier_cci_init(void) in __uniphier_cci_init()
25 static void __uniphier_cci_enable(void) in __uniphier_cci_enable()
30 static void __uniphier_cci_disable(void) in __uniphier_cci_disable()
37 void (*enable)(void); member
41 static const struct uniphier_cci_ops uniphier_cci_ops_table[] = {
44 .enable = NULL,
49 .enable = __uniphier_cci_enable,
54 .enable = NULL,
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| /external/trusty/arm-trusted-firmware/plat/socionext/uniphier/ |
| D | uniphier_cci.c | 4 * SPDX-License-Identifier: BSD-3-Clause
17 static const int uniphier_cci_map[] = {1, 0};
19 static void __uniphier_cci_init(void) in __uniphier_cci_init()
25 static void __uniphier_cci_enable(void) in __uniphier_cci_enable()
30 static void __uniphier_cci_disable(void) in __uniphier_cci_disable()
37 void (*enable)(void); member
41 static const struct uniphier_cci_ops uniphier_cci_ops_table[] = {
44 .enable = NULL,
49 .enable = __uniphier_cci_enable,
54 .enable = NULL,
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| /external/curl/docs/ |
| D | INSTALL-CMAKE.md | 1 <!--
4 SPDX-License-Identifier: curl
5 -->
29 - Build in the source tree.
31 $ cmake -B .
33 - Build in a separate directory (parallel to the curl source tree in this
36 $ cmake -B ../curl-build
40 CMake before version 3.13 does not support the `-B` option. In that case,
44 $ mkdir ../curl-build
45 $ cd ../curl-build
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSubtarget.cpp | 1 //===-- HexagonSubtarget.cpp - Hexagon Subtarget Information --------------===//
8 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
23 #define DEBUG_TYPE "hexagon-subtarget"
29 static cl::opt<bool> EnableMemOps("enable-hexagon-memops",
33 static cl::opt<bool> DisableMemOps("disable-hexagon-memops",
37 static cl::opt<bool> EnableIEEERndNear("enable-hexagon-ieee-rnd-near",
39 cl::desc("Generate non-chopped conversion from fp to int."));
41 static cl::opt<bool> EnableBSBSched("enable-bsb-sched",
44 static cl::opt<bool> EnableHexagonHVXDouble("enable-hexagon-hvx-double",
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| /external/coreboot/src/cpu/intel/haswell/ |
| D | haswell_init.c | 1 /* SPDX-License-Identifier: GPL-2.0-only */
23 static const u8 power_limit_time_sec_to_msr[] = {
52 static const u8 power_limit_time_msr_to_sec[] = {
80 /* The core 100MHz BCLK is disabled in deeper c-states. One needs to calibrate
83 static int pcode_ready(void) in pcode_ready()
96 return -1; in pcode_ready()
99 static void calibrate_24mhz_bclk(void) in calibrate_24mhz_bclk()
108 /* A non-zero value initiates the PCODE calibration. */ in calibrate_24mhz_bclk()
136 static u32 pcode_mailbox_read(u32 command) in pcode_mailbox_read()
155 static int pcode_mailbox_write(u32 command, u32 data) in pcode_mailbox_write()
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| /external/coreboot/src/drivers/wifi/generic/ |
| D | acpi.c | 1 /* SPDX-License-Identifier: GPL-2.0-only */
34 #define ACPI_DSM_OEM_WIFI_UUID "F21202BF-8F78-4DC6-A5B3-1F738E285ADE"
37 #define ACPI_DSM_RFIM_WIFI_UUID "7266172C-220B-4B29-814F-75E4DD26B5FD"
41 return -1; in get_wifi_sar_limits()
47 * 0 - ETSI 5.8GHz SRD active scan
48 * 1 - ETSI 5.8GHz SRD passive scan
49 * 2 - ETSI 5.8GHz SRD disabled
51 static void wifi_dsm_srd_active_channels(void *args) in wifi_dsm_srd_active_channels()
55 acpigen_write_return_integer(dsm_config->disable_active_sdr_channels); in wifi_dsm_srd_active_channels()
59 * Function 2 : Supported Indonesia 5.15-5.35 GHz Band
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