1# SPDX-License-Identifier: GPL-2.0-only 2 3if BOARD_AMD_MAYAN_PHOENIX 4 5config BOARD_SPECIFIC_OPTIONS 6 def_bool y 7 select BOARD_ROMSIZE_KB_16384 # Mayan actually has a 32MiB ROM 8 select EC_ACPI 9 select SOC_AMD_COMMON_BLOCK_USE_ESPI 10 select AMD_SOC_CONSOLE_UART 11 select MAINBOARD_HAS_CHROMEOS 12 select PCIEXP_ASPM 13 select PCIEXP_CLK_PM 14 select PCIEXP_COMMON_CLOCK 15 select PCIEXP_L1_SUB_STATE 16 select SOC_AMD_COMMON_BLOCK_ESPI_RETAIN_PORT80_EN 17 select SOC_AMD_PHOENIX_FSP 18 19config FMDFILE 20 default "src/mainboard/amd/mayan/chromeos.fmd" if CHROMEOS 21 default "src/mainboard/amd/mayan/board.fmd" 22 23config MAINBOARD_DIR 24 default "amd/mayan" 25 26config MAINBOARD_PART_NUMBER 27 default "Mayan_Phoenix" 28 29config DEVICETREE 30 default "devicetree_phoenix.cb" 31 32config MAYAN_HAVE_MCHP_FW 33 bool "Have Microchip EC firmware?" 34 default n 35 36config MAYAN_MCHP_SIG_FILE 37 string "Microchip EC signature file" 38 depends on MAYAN_HAVE_MCHP_FW 39 default "3rdparty/blobs/mainboard/amd/mayan/EC_mayan_sig.bin" 40 help 41 The EC sig blob is the first 4kBytes of the firmware image. 42 The first 4 bytes form a pointer (with CRC) to where the EC firmware 43 is located 44 45config MAYAN_MCHP_FW_FILE 46 string "Microchip EC firmware file" 47 depends on MAYAN_HAVE_MCHP_FW 48 default "3rdparty/blobs/mainboard/amd/mayan/EC_mayan.bin" 49 help 50 The EC firmware blob is at the MAYAN_MCHP_FW_OFFSET offset of the 51 firmware image. 52 53config MAYAN_MCHP_FW_OFFSET 54 hex 55 depends on MAYAN_HAVE_MCHP_FW 56 default 0x81000 57 help 58 The EC firmware blob defaults to the 4MByte offset of the firmware 59 image. If this offset needs to change, a new signature block must be 60 generated with the updated offset. 61 62config VBOOT 63 select VBOOT_NO_BOARD_SUPPORT 64 select VBOOT_SEPARATE_VERSTAGE 65 select VBOOT_STARTS_IN_BOOTBLOCK 66 67config VBOOT_VBNV_OFFSET 68 hex 69 default 0x2A 70 71config RO_REGION_ONLY 72 string 73 depends on VBOOT_SLOTS_RW_AB || VBOOT_SLOTS_RW_A 74 # Add the EFS and EC to the RO region only 75 # This is a mayan-specific override of soc/amd/phoenix/Kconfig 76 default "apu/amdfw ec/ecfw" 77 78config CHROMEOS 79 # Use default libpayload config 80 select LP_DEFCONFIG_OVERRIDE if PAYLOAD_DEPTHCHARGE 81 # We don't have recovery buttons, so we can't manually enable devmode. 82 select GBB_FLAG_FORCE_DEV_SWITCH_ON 83 84choice 85 prompt "DT SLOT/M.2 SSD1 ENABLE" 86 default ENABLE_DT_SLOT_MAYAN 87 help 88 Either DT slot or M.2 SSD1 can be used to boot on Mayan, 89 as they are sharing IO lanes. 90 91config ENABLE_DT_SLOT_MAYAN 92 bool "Enable DT slot" 93 94config ENABLE_M2_SSD1_MAYAN 95 bool "Enable M.2 SSD1" 96 97config DISABLE_DT_M2_MAYAN 98 bool "Disable both DT and M.2 slot" 99 100endchoice 101 102if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig 103config EFS_SPI_READ_MODE 104 default 3 # Quad IO (1-1-4) 105 106config EFS_SPI_SPEED 107 default 0 # 66MHz 108 109config EFS_SPI_MICRON_FLAG 110 default 0 111 112config NORMAL_READ_SPI_SPEED 113 default 1 # 33MHz 114 115config ALT_SPI_SPEED 116 default 1 # 33MHz 117 118config TPM_SPI_SPEED 119 default 1 # 33MHz 120 121endif # !EM100 122 123endif # BOARD_AMD_MAYAN_PHOENIX 124