1## SPDX-License-Identifier: GPL-2.0-only 2ifeq ($(CONFIG_SOC_INTEL_ELKHARTLAKE),y) 3 4subdirs-y += romstage 5subdirs-y += ../../../cpu/intel/microcode 6subdirs-y += ../../../cpu/intel/turbo 7 8# all (bootblock, verstage, romstage, postcar, ramstage) 9all-y += gspi.c 10all-y += i2c.c 11all-y += pmutil.c 12all-y += spi.c 13all-y += uart.c 14 15bootblock-y += bootblock/bootblock.c 16bootblock-y += bootblock/pch.c 17bootblock-y += bootblock/report_platform.c 18bootblock-y += espi.c 19bootblock-y += gpio.c 20bootblock-y += p2sb.c 21 22romstage-y += espi.c 23romstage-y += gpio.c 24romstage-y += meminit.c 25romstage-y += pcie_rp.c 26romstage-y += reset.c 27 28ramstage-y += acpi.c 29ramstage-y += chip.c 30ramstage-y += cpu.c 31ramstage-y += espi.c 32ramstage-y += finalize.c 33ramstage-y += fsp_params.c 34ramstage-y += gpio.c 35ramstage-y += lockdown.c 36ramstage-y += p2sb.c 37ramstage-y += pcie_rp.c 38ramstage-y += pmc.c 39ramstage-y += reset.c 40ramstage-y += systemagent.c 41ramstage-y += sd.c 42ramstage-$(CONFIG_EHL_TSN_DRIVER) += tsn_gbe.c 43 44smm-y += gpio.c 45smm-y += p2sb.c 46smm-y += pmutil.c 47smm-y += smihandler.c 48smm-y += uart.c 49 50verstage-y += gpio.c 51 52CPPFLAGS_common += -I$(src)/soc/intel/elkhartlake 53CPPFLAGS_common += -I$(src)/soc/intel/elkhartlake/include 54 55# B0 stepping 56cpu_microcode_bins += 3rdparty/intel-microcode/intel-ucode/06-96-01 57cbfs-files-$(CONFIG_ADD_PSE_IMAGE_TO_CBFS) += pse.bin 58pse.bin-file := $(CONFIG_PSE_IMAGE_FILE) 59pse.bin-type := raw 60pse.bin-compression := lzma 61 62# Add a build time check if the PSE file size fits 63ifeq ($(CONFIG_ADD_PSE_IMAGE_TO_CBFS),y) 64ifeq ($(call int-gt,\ 65 $(call file-size,$(CONFIG_PSE_IMAGE_FILE))\ 66 $(shell printf "%d" $(call int-shift-left, $(CONFIG_PSE_FW_FILE_SIZE_KIB) 10))), 1) 67$(error PSE binary larger than CONFIG_PSE_FW_FILE_SIZE_KIB.) 68endif 69endif # CONFIG_ADD_PSE_IMAGE_TO_CBFS 70 71endif 72