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1 // Copyright 2017, VIXL authors
2 // All rights reserved.
3 //
4 // Redistribution and use in source and binary forms, with or without
5 // modification, are permitted provided that the following conditions are met:
6 //
7 //   * Redistributions of source code must retain the above copyright notice,
8 //     this list of conditions and the following disclaimer.
9 //   * Redistributions in binary form must reproduce the above copyright
10 //     notice, this list of conditions and the following disclaimer in the
11 //     documentation and/or other materials provided with the distribution.
12 //   * Neither the name of ARM Limited nor the names of its contributors may
13 //     be used to endorse or promote products derived from this software
14 //     without specific prior written permission.
15 //
16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 // IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 // ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 // LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 // CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 // SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 // INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 // CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 // POSSIBILITY OF SUCH DAMAGE.
27 
28 #ifndef VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
29 #define VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
30 
31 #include "code-generation-scopes-vixl.h"
32 #include "macro-assembler-interface.h"
33 #include "pool-manager-impl.h"
34 #include "pool-manager.h"
35 #include "utils-vixl.h"
36 
37 #include "aarch32/assembler-aarch32.h"
38 #include "aarch32/instructions-aarch32.h"
39 #include "aarch32/operands-aarch32.h"
40 
41 namespace vixl {
42 
43 namespace aarch32 {
44 
45 class UseScratchRegisterScope;
46 
47 enum FlagsUpdate { LeaveFlags = 0, SetFlags = 1, DontCare = 2 };
48 
49 // We use a subclass to access the protected `ExactAssemblyScope` constructor
50 // giving us control over the pools, and make the constructor private to limit
51 // usage to code paths emitting pools.
52 class ExactAssemblyScopeWithoutPoolsCheck : public ExactAssemblyScope {
53  private:
54   ExactAssemblyScopeWithoutPoolsCheck(MacroAssembler* masm,
55                                       size_t size,
56                                       SizePolicy size_policy = kExactSize);
57 
58   friend class MacroAssembler;
59   friend class Label;
60 };
61 // Macro assembler for aarch32 instruction set.
62 class MacroAssembler : public Assembler, public MacroAssemblerInterface {
63  public:
64   enum FinalizeOption {
65     kFallThrough,  // There may be more code to execute after calling Finalize.
66     kUnreachable   // Anything generated after calling Finalize is unreachable.
67   };
68 
AsAssemblerBase()69   virtual internal::AssemblerBase* AsAssemblerBase() VIXL_OVERRIDE {
70     return this;
71   }
72 
ArePoolsBlocked()73   virtual bool ArePoolsBlocked() const VIXL_OVERRIDE {
74     return pool_manager_.IsBlocked();
75   }
76 
EmitPoolHeader()77   virtual void EmitPoolHeader() VIXL_OVERRIDE {
78     // Check that we have the correct alignment.
79     if (IsUsingT32()) {
80       VIXL_ASSERT(GetBuffer()->Is16bitAligned());
81     } else {
82       VIXL_ASSERT(GetBuffer()->Is32bitAligned());
83     }
84     VIXL_ASSERT(pool_end_ == NULL);
85     pool_end_ = new Label();
86     ExactAssemblyScopeWithoutPoolsCheck guard(this,
87                                               kMaxInstructionSizeInBytes,
88                                               ExactAssemblyScope::kMaximumSize);
89     b(pool_end_);
90   }
EmitPoolFooter()91   virtual void EmitPoolFooter() VIXL_OVERRIDE {
92     // Align buffer to 4 bytes.
93     GetBuffer()->Align();
94     if (pool_end_ != NULL) {
95       Bind(pool_end_);
96       delete pool_end_;
97       pool_end_ = NULL;
98     }
99   }
EmitPaddingBytes(int n)100   virtual void EmitPaddingBytes(int n) VIXL_OVERRIDE {
101     GetBuffer()->EmitZeroedBytes(n);
102   }
EmitNopBytes(int n)103   virtual void EmitNopBytes(int n) VIXL_OVERRIDE {
104     int nops = 0;
105     int nop_size = IsUsingT32() ? k16BitT32InstructionSizeInBytes
106                                 : kA32InstructionSizeInBytes;
107     VIXL_ASSERT(n % nop_size == 0);
108     nops = n / nop_size;
109     ExactAssemblyScopeWithoutPoolsCheck guard(this,
110                                               n,
111                                               ExactAssemblyScope::kExactSize);
112     for (int i = 0; i < nops; ++i) {
113       nop();
114     }
115   }
116 
117 
118  private:
119   class MacroEmissionCheckScope : public EmissionCheckScope {
120    public:
121     explicit MacroEmissionCheckScope(MacroAssemblerInterface* masm,
122                                      PoolPolicy pool_policy = kBlockPools)
EmissionCheckScope(masm,kTypicalMacroInstructionMaxSize,kMaximumSize,pool_policy)123         : EmissionCheckScope(masm,
124                              kTypicalMacroInstructionMaxSize,
125                              kMaximumSize,
126                              pool_policy) {}
127 
128    private:
129     static const size_t kTypicalMacroInstructionMaxSize =
130         8 * kMaxInstructionSizeInBytes;
131   };
132 
133   class MacroAssemblerContext {
134    public:
MacroAssemblerContext()135     MacroAssemblerContext() : count_(0) {}
~MacroAssemblerContext()136     ~MacroAssemblerContext() {}
GetRecursiveCount()137     unsigned GetRecursiveCount() const { return count_; }
Up(const char * loc)138     void Up(const char* loc) {
139       location_stack_[count_] = loc;
140       count_++;
141       if (count_ >= kMaxRecursion) {
142         printf(
143             "Recursion limit reached; unable to resolve macro assembler "
144             "call.\n");
145         printf("Macro assembler context stack:\n");
146         for (unsigned i = 0; i < kMaxRecursion; i++) {
147           printf("%10s %s\n", (i == 0) ? "oldest -> " : "", location_stack_[i]);
148         }
149         VIXL_ABORT();
150       }
151     }
Down()152     void Down() {
153       VIXL_ASSERT((count_ > 0) && (count_ < kMaxRecursion));
154       count_--;
155     }
156 
157    private:
158     unsigned count_;
159     static const uint32_t kMaxRecursion = 6;
160     const char* location_stack_[kMaxRecursion];
161   };
162 
163   // This scope is used at each Delegate entry to avoid infinite recursion of
164   // Delegate calls. The limit is defined by
165   // MacroAssemblerContext::kMaxRecursion.
166   class ContextScope {
167    public:
ContextScope(MacroAssembler * const masm,const char * loc)168     explicit ContextScope(MacroAssembler* const masm, const char* loc)
169         : masm_(masm) {
170       VIXL_ASSERT(masm_->AllowMacroInstructions());
171       masm_->GetContext()->Up(loc);
172     }
~ContextScope()173     ~ContextScope() { masm_->GetContext()->Down(); }
174 
175    private:
176     MacroAssembler* const masm_;
177   };
178 
GetContext()179   MacroAssemblerContext* GetContext() { return &context_; }
180 
181   class ITScope {
182    public:
183     ITScope(MacroAssembler* masm,
184             Condition* cond,
185             const MacroEmissionCheckScope& scope,
186             bool can_use_it = false)
masm_(masm)187         : masm_(masm), cond_(*cond), can_use_it_(can_use_it) {
188       // The 'scope' argument is used to remind us to only use this scope inside
189       // a MacroEmissionCheckScope. This way, we do not need to check whether
190       // we need to emit the pools or grow the code buffer when emitting the
191       // IT or B instructions.
192       USE(scope);
193       if (!cond_.Is(al) && masm->IsUsingT32()) {
194         if (can_use_it_) {
195           // IT is not deprecated (that implies a 16 bit T32 instruction).
196           // We generate an IT instruction and a conditional instruction.
197           masm->it(cond_);
198         } else {
199           // The usage of IT is deprecated for the instruction.
200           // We generate a conditional branch and an unconditional instruction.
201           // Generate the branch.
202           masm_->b(cond_.Negate(), Narrow, &label_);
203           // Tell the macro-assembler to generate unconditional instructions.
204           *cond = al;
205         }
206       }
207 #ifdef VIXL_DEBUG
208       initial_cursor_offset_ = masm->GetCursorOffset();
209 #else
210       USE(initial_cursor_offset_);
211 #endif
212     }
~ITScope()213     ~ITScope() {
214       if (label_.IsReferenced()) {
215         // We only use the label for conditional T32 instructions for which we
216         // cannot use IT.
217         VIXL_ASSERT(!cond_.Is(al));
218         VIXL_ASSERT(masm_->IsUsingT32());
219         VIXL_ASSERT(!can_use_it_);
220         VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
221                     kMaxT32MacroInstructionSizeInBytes);
222         masm_->BindHelper(&label_);
223       } else if (masm_->IsUsingT32() && !cond_.Is(al)) {
224         // If we've generated a conditional T32 instruction but haven't used the
225         // label, we must have used IT. Check that we did not generate a
226         // deprecated sequence.
227         VIXL_ASSERT(can_use_it_);
228         VIXL_ASSERT(masm_->GetCursorOffset() - initial_cursor_offset_ <=
229                     k16BitT32InstructionSizeInBytes);
230       }
231     }
232 
233    private:
234     MacroAssembler* masm_;
235     Condition cond_;
236     Label label_;
237     bool can_use_it_;
238     uint32_t initial_cursor_offset_;
239   };
240 
241  protected:
BlockPools()242   virtual void BlockPools() VIXL_OVERRIDE { pool_manager_.Block(); }
ReleasePools()243   virtual void ReleasePools() VIXL_OVERRIDE {
244     pool_manager_.Release(GetCursorOffset());
245   }
246   virtual void EnsureEmitPoolsFor(size_t size) VIXL_OVERRIDE;
247 
248   // Tell whether any of the macro instruction can be used. When false the
249   // MacroAssembler will assert if a method which can emit a variable number
250   // of instructions is called.
SetAllowMacroInstructions(bool value)251   virtual void SetAllowMacroInstructions(bool value) VIXL_OVERRIDE {
252     allow_macro_instructions_ = value;
253   }
254 
255   void HandleOutOfBoundsImmediate(Condition cond, Register tmp, uint32_t imm);
256 
257  public:
258   // TODO: If we change the MacroAssembler to disallow setting a different ISA,
259   // we can change the alignment of the pool in the pool manager constructor to
260   // be 2 bytes for T32.
261   explicit MacroAssembler(InstructionSet isa = kDefaultISA)
Assembler(isa)262       : Assembler(isa),
263         available_(r12),
264         current_scratch_scope_(NULL),
265         pool_manager_(4 /*header_size*/,
266                       4 /*alignment*/,
267                       4 /*buffer_alignment*/),
268         generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
269         pool_end_(NULL) {
270 #ifdef VIXL_DEBUG
271     SetAllowMacroInstructions(  // NOLINT(clang-analyzer-optin.cplusplus.VirtualCall)
272         true);
273 #else
274     USE(allow_macro_instructions_);
275 #endif
276   }
277   explicit MacroAssembler(size_t size, InstructionSet isa = kDefaultISA)
Assembler(size,isa)278       : Assembler(size, isa),
279         available_(r12),
280         current_scratch_scope_(NULL),
281         pool_manager_(4 /*header_size*/,
282                       4 /*alignment*/,
283                       4 /*buffer_alignment*/),
284         generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
285         pool_end_(NULL) {
286 #ifdef VIXL_DEBUG
287     SetAllowMacroInstructions(  // NOLINT(clang-analyzer-optin.cplusplus.VirtualCall)
288         true);
289 #endif
290   }
291   MacroAssembler(byte* buffer, size_t size, InstructionSet isa = kDefaultISA)
Assembler(buffer,size,isa)292       : Assembler(buffer, size, isa),
293         available_(r12),
294         current_scratch_scope_(NULL),
295         pool_manager_(4 /*header_size*/,
296                       4 /*alignment*/,
297                       4 /*buffer_alignment*/),
298         generate_simulator_code_(VIXL_AARCH32_GENERATE_SIMULATOR_CODE),
299         pool_end_(NULL) {
300 #ifdef VIXL_DEBUG
301     SetAllowMacroInstructions(  // NOLINT(clang-analyzer-optin.cplusplus.VirtualCall)
302         true);
303 #endif
304   }
305 
GenerateSimulatorCode()306   bool GenerateSimulatorCode() const { return generate_simulator_code_; }
307 
AllowMacroInstructions()308   virtual bool AllowMacroInstructions() const VIXL_OVERRIDE {
309     return allow_macro_instructions_;
310   }
311 
312   void FinalizeCode(FinalizeOption option = kUnreachable) {
313     EmitLiteralPool(option == kUnreachable
314                         ? PoolManager<int32_t>::kNoBranchRequired
315                         : PoolManager<int32_t>::kBranchRequired);
316     Assembler::FinalizeCode();
317   }
318 
GetScratchRegisterList()319   RegisterList* GetScratchRegisterList() { return &available_; }
GetScratchVRegisterList()320   VRegisterList* GetScratchVRegisterList() { return &available_vfp_; }
321 
322   // Get or set the current (most-deeply-nested) UseScratchRegisterScope.
SetCurrentScratchRegisterScope(UseScratchRegisterScope * scope)323   void SetCurrentScratchRegisterScope(UseScratchRegisterScope* scope) {
324     current_scratch_scope_ = scope;
325   }
GetCurrentScratchRegisterScope()326   UseScratchRegisterScope* GetCurrentScratchRegisterScope() {
327     return current_scratch_scope_;
328   }
329 
330   // Given an address calculation (Register + immediate), generate code to
331   // partially compute the address. The returned MemOperand will perform any
332   // remaining computation in a subsequent load or store instruction.
333   //
334   // The offset provided should be the offset that would be used in a load or
335   // store instruction (if it had sufficient range). This only matters where
336   // base.Is(pc), since load and store instructions align the pc before
337   // dereferencing it.
338   //
339   // TODO: Improve the handling of negative offsets. They are not implemented
340   // precisely for now because they only have a marginal benefit for the
341   // existing uses (in delegates).
342   MemOperand MemOperandComputationHelper(Condition cond,
343                                          Register scratch,
344                                          Register base,
345                                          uint32_t offset,
346                                          uint32_t extra_offset_mask = 0);
347 
348   MemOperand MemOperandComputationHelper(Register scratch,
349                                          Register base,
350                                          uint32_t offset,
351                                          uint32_t extra_offset_mask = 0) {
352     return MemOperandComputationHelper(al,
353                                        scratch,
354                                        base,
355                                        offset,
356                                        extra_offset_mask);
357   }
358   MemOperand MemOperandComputationHelper(Condition cond,
359                                          Register scratch,
360                                          Location* location,
361                                          uint32_t extra_offset_mask = 0) {
362     // Check for buffer space _before_ calculating the offset, in case we
363     // generate a pool that affects the offset calculation.
364     CodeBufferCheckScope scope(this, 4 * kMaxInstructionSizeInBytes);
365     Label::Offset offset =
366         location->GetLocation() -
367         AlignDown(GetCursorOffset() + GetArchitectureStatePCOffset(), 4);
368     return MemOperandComputationHelper(cond,
369                                        scratch,
370                                        pc,
371                                        offset,
372                                        extra_offset_mask);
373   }
374   MemOperand MemOperandComputationHelper(Register scratch,
375                                          Location* location,
376                                          uint32_t extra_offset_mask = 0) {
377     return MemOperandComputationHelper(al,
378                                        scratch,
379                                        location,
380                                        extra_offset_mask);
381   }
382 
383   // Determine the appropriate mask to pass into MemOperandComputationHelper.
384   uint32_t GetOffsetMask(InstructionType type, AddrMode addrmode);
385 
386   // State and type helpers.
IsModifiedImmediate(uint32_t imm)387   bool IsModifiedImmediate(uint32_t imm) {
388     return IsUsingT32() ? ImmediateT32::IsImmediateT32(imm)
389                         : ImmediateA32::IsImmediateA32(imm);
390   }
391 
Bind(Label * label)392   void Bind(Label* label) {
393     VIXL_ASSERT(allow_macro_instructions_);
394     BindHelper(label);
395   }
396 
BindHelper(Label * label)397   virtual void BindHelper(Label* label) VIXL_OVERRIDE {
398     // Assert that we have the correct buffer alignment.
399     if (IsUsingT32()) {
400       VIXL_ASSERT(GetBuffer()->Is16bitAligned());
401     } else {
402       VIXL_ASSERT(GetBuffer()->Is32bitAligned());
403     }
404     // If we need to add padding, check if we have to emit the pool.
405     const int32_t cursor = GetCursorOffset();
406     if (label->Needs16BitPadding(cursor)) {
407       const int kPaddingBytes = 2;
408       if (pool_manager_.MustEmit(cursor, kPaddingBytes)) {
409         int32_t new_cursor = pool_manager_.Emit(this, cursor, kPaddingBytes);
410         USE(new_cursor);
411         VIXL_ASSERT(new_cursor == GetCursorOffset());
412       }
413     }
414     pool_manager_.Bind(this, label, GetCursorOffset());
415   }
416 
RegisterLiteralReference(RawLiteral * literal)417   void RegisterLiteralReference(RawLiteral* literal) {
418     if (literal->IsManuallyPlaced()) return;
419     RegisterForwardReference(literal);
420   }
421 
RegisterForwardReference(Location * location)422   void RegisterForwardReference(Location* location) {
423     if (location->IsBound()) return;
424     VIXL_ASSERT(location->HasForwardReferences());
425     const Location::ForwardRef& reference = location->GetLastForwardReference();
426     pool_manager_.AddObjectReference(&reference, location);
427   }
428 
429   void CheckEmitPoolForInstruction(const ReferenceInfo* info,
430                                    Location* location,
431                                    Condition* cond = NULL) {
432     int size = info->size;
433     int32_t cursor = GetCursorOffset();
434     // If we need to emit a branch over the instruction, take this into account.
435     if ((cond != NULL) && NeedBranch(cond)) {
436       size += kBranchSize;
437       cursor += kBranchSize;
438     }
439     int32_t from = cursor;
440     from += IsUsingT32() ? kT32PcDelta : kA32PcDelta;
441     if (info->pc_needs_aligning) from = AlignDown(from, 4);
442     int32_t min = from + info->min_offset;
443     int32_t max = from + info->max_offset;
444     ForwardReference<int32_t> temp_ref(cursor,
445                                        info->size,
446                                        min,
447                                        max,
448                                        info->alignment);
449     if (pool_manager_.MustEmit(GetCursorOffset(), size, &temp_ref, location)) {
450       int32_t new_cursor = pool_manager_.Emit(this,
451                                               GetCursorOffset(),
452                                               info->size,
453                                               &temp_ref,
454                                               location);
455       USE(new_cursor);
456       VIXL_ASSERT(new_cursor == GetCursorOffset());
457     }
458   }
459 
Place(RawLiteral * literal)460   void Place(RawLiteral* literal) {
461     VIXL_ASSERT(allow_macro_instructions_);
462     VIXL_ASSERT(literal->IsManuallyPlaced());
463     // Check if we need to emit the pools. Take the alignment of the literal
464     // into account, as well as potential 16-bit padding needed to reach the
465     // minimum accessible location.
466     int alignment = literal->GetMaxAlignment();
467     int32_t cursor = GetCursorOffset();
468     int total_size = AlignUp(cursor, alignment) - cursor + literal->GetSize();
469     if (literal->Needs16BitPadding(cursor)) total_size += 2;
470     if (pool_manager_.MustEmit(cursor, total_size)) {
471       int32_t new_cursor = pool_manager_.Emit(this, cursor, total_size);
472       USE(new_cursor);
473       VIXL_ASSERT(new_cursor == GetCursorOffset());
474     }
475     pool_manager_.Bind(this, literal, GetCursorOffset());
476     literal->EmitPoolObject(this);
477     // Align the buffer, to be ready to generate instructions right after
478     // this.
479     GetBuffer()->Align();
480   }
481 
482   void EmitLiteralPool(PoolManager<int32_t>::EmitOption option =
483                            PoolManager<int32_t>::kBranchRequired) {
484     VIXL_ASSERT(!ArePoolsBlocked());
485     int32_t new_pc =
486         pool_manager_.Emit(this, GetCursorOffset(), 0, NULL, NULL, option);
487     VIXL_ASSERT(new_pc == GetCursorOffset());
488     USE(new_pc);
489   }
490 
EnsureEmitFor(uint32_t size)491   void EnsureEmitFor(uint32_t size) {
492     EnsureEmitPoolsFor(size);
493     VIXL_ASSERT(GetBuffer()->HasSpaceFor(size) || GetBuffer()->IsManaged());
494     GetBuffer()->EnsureSpaceFor(size);
495   }
496 
AliasesAvailableScratchRegister(Register reg)497   bool AliasesAvailableScratchRegister(Register reg) {
498     return GetScratchRegisterList()->Includes(reg);
499   }
500 
AliasesAvailableScratchRegister(RegisterOrAPSR_nzcv reg)501   bool AliasesAvailableScratchRegister(RegisterOrAPSR_nzcv reg) {
502     if (reg.IsAPSR_nzcv()) return false;
503     return GetScratchRegisterList()->Includes(reg.AsRegister());
504   }
505 
AliasesAvailableScratchRegister(VRegister reg)506   bool AliasesAvailableScratchRegister(VRegister reg) {
507     return GetScratchVRegisterList()->IncludesAliasOf(reg);
508   }
509 
AliasesAvailableScratchRegister(const Operand & operand)510   bool AliasesAvailableScratchRegister(const Operand& operand) {
511     if (operand.IsImmediate()) return false;
512     return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
513            (operand.IsRegisterShiftedRegister() &&
514             AliasesAvailableScratchRegister(operand.GetShiftRegister()));
515   }
516 
AliasesAvailableScratchRegister(const NeonOperand & operand)517   bool AliasesAvailableScratchRegister(const NeonOperand& operand) {
518     if (operand.IsImmediate()) return false;
519     return AliasesAvailableScratchRegister(operand.GetRegister());
520   }
521 
AliasesAvailableScratchRegister(SRegisterList list)522   bool AliasesAvailableScratchRegister(SRegisterList list) {
523     for (int n = 0; n < list.GetLength(); n++) {
524       if (AliasesAvailableScratchRegister(list.GetSRegister(n))) return true;
525     }
526     return false;
527   }
528 
AliasesAvailableScratchRegister(DRegisterList list)529   bool AliasesAvailableScratchRegister(DRegisterList list) {
530     for (int n = 0; n < list.GetLength(); n++) {
531       if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
532     }
533     return false;
534   }
535 
AliasesAvailableScratchRegister(NeonRegisterList list)536   bool AliasesAvailableScratchRegister(NeonRegisterList list) {
537     for (int n = 0; n < list.GetLength(); n++) {
538       if (AliasesAvailableScratchRegister(list.GetDRegister(n))) return true;
539     }
540     return false;
541   }
542 
AliasesAvailableScratchRegister(RegisterList list)543   bool AliasesAvailableScratchRegister(RegisterList list) {
544     return GetScratchRegisterList()->Overlaps(list);
545   }
546 
AliasesAvailableScratchRegister(const MemOperand & operand)547   bool AliasesAvailableScratchRegister(const MemOperand& operand) {
548     return AliasesAvailableScratchRegister(operand.GetBaseRegister()) ||
549            (operand.IsShiftedRegister() &&
550             AliasesAvailableScratchRegister(operand.GetOffsetRegister()));
551   }
552 
553   // Adr with a literal already constructed. Add the literal to the pool if it
554   // is not already done.
Adr(Condition cond,Register rd,RawLiteral * literal)555   void Adr(Condition cond, Register rd, RawLiteral* literal) {
556     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
557     VIXL_ASSERT(allow_macro_instructions_);
558     VIXL_ASSERT(OutsideITBlock());
559     MacroEmissionCheckScope::PoolPolicy pool_policy =
560         MacroEmissionCheckScope::kBlockPools;
561     if (!literal->IsBound()) {
562       const ReferenceInfo* info;
563       bool can_encode = adr_info(cond, Best, rd, literal, &info);
564       VIXL_CHECK(can_encode);
565       CheckEmitPoolForInstruction(info, literal, &cond);
566       // We have already checked for pool emission.
567       pool_policy = MacroEmissionCheckScope::kIgnorePools;
568     }
569     MacroEmissionCheckScope guard(this, pool_policy);
570     ITScope it_scope(this, &cond, guard);
571     adr(cond, Best, rd, literal);
572     RegisterLiteralReference(literal);
573   }
Adr(Register rd,RawLiteral * literal)574   void Adr(Register rd, RawLiteral* literal) { Adr(al, rd, literal); }
575 
576   // Loads with literals already constructed. Add the literal to the pool
577   // if it is not already done.
Ldr(Condition cond,Register rt,RawLiteral * literal)578   void Ldr(Condition cond, Register rt, RawLiteral* literal) {
579     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
580     VIXL_ASSERT(allow_macro_instructions_);
581     VIXL_ASSERT(OutsideITBlock());
582     MacroEmissionCheckScope::PoolPolicy pool_policy =
583         MacroEmissionCheckScope::kBlockPools;
584     if (!literal->IsBound()) {
585       const ReferenceInfo* info;
586       bool can_encode = ldr_info(cond, Best, rt, literal, &info);
587       VIXL_CHECK(can_encode);
588       CheckEmitPoolForInstruction(info, literal, &cond);
589       // We have already checked for pool emission.
590       pool_policy = MacroEmissionCheckScope::kIgnorePools;
591     }
592     MacroEmissionCheckScope guard(this, pool_policy);
593     ITScope it_scope(this, &cond, guard);
594     ldr(cond, rt, literal);
595     RegisterLiteralReference(literal);
596   }
Ldr(Register rt,RawLiteral * literal)597   void Ldr(Register rt, RawLiteral* literal) { Ldr(al, rt, literal); }
598 
Ldrb(Condition cond,Register rt,RawLiteral * literal)599   void Ldrb(Condition cond, Register rt, RawLiteral* literal) {
600     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
601     VIXL_ASSERT(allow_macro_instructions_);
602     VIXL_ASSERT(OutsideITBlock());
603     MacroEmissionCheckScope::PoolPolicy pool_policy =
604         MacroEmissionCheckScope::kBlockPools;
605     if (!literal->IsBound()) {
606       const ReferenceInfo* info;
607       bool can_encode = ldrb_info(cond, rt, literal, &info);
608       VIXL_CHECK(can_encode);
609       CheckEmitPoolForInstruction(info, literal, &cond);
610       // We have already checked for pool emission.
611       pool_policy = MacroEmissionCheckScope::kIgnorePools;
612     }
613     MacroEmissionCheckScope guard(this, pool_policy);
614     ITScope it_scope(this, &cond, guard);
615     ldrb(cond, rt, literal);
616     RegisterLiteralReference(literal);
617   }
Ldrb(Register rt,RawLiteral * literal)618   void Ldrb(Register rt, RawLiteral* literal) { Ldrb(al, rt, literal); }
619 
Ldrd(Condition cond,Register rt,Register rt2,RawLiteral * literal)620   void Ldrd(Condition cond, Register rt, Register rt2, RawLiteral* literal) {
621     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
622     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
623     VIXL_ASSERT(allow_macro_instructions_);
624     VIXL_ASSERT(OutsideITBlock());
625     MacroEmissionCheckScope::PoolPolicy pool_policy =
626         MacroEmissionCheckScope::kBlockPools;
627     if (!literal->IsBound()) {
628       const ReferenceInfo* info;
629       bool can_encode = ldrd_info(cond, rt, rt2, literal, &info);
630       VIXL_CHECK(can_encode);
631       CheckEmitPoolForInstruction(info, literal, &cond);
632       // We have already checked for pool emission.
633       pool_policy = MacroEmissionCheckScope::kIgnorePools;
634     }
635     MacroEmissionCheckScope guard(this, pool_policy);
636     ITScope it_scope(this, &cond, guard);
637     ldrd(cond, rt, rt2, literal);
638     RegisterLiteralReference(literal);
639   }
Ldrd(Register rt,Register rt2,RawLiteral * literal)640   void Ldrd(Register rt, Register rt2, RawLiteral* literal) {
641     Ldrd(al, rt, rt2, literal);
642   }
643 
Ldrh(Condition cond,Register rt,RawLiteral * literal)644   void Ldrh(Condition cond, Register rt, RawLiteral* literal) {
645     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
646     VIXL_ASSERT(allow_macro_instructions_);
647     VIXL_ASSERT(OutsideITBlock());
648     MacroEmissionCheckScope::PoolPolicy pool_policy =
649         MacroEmissionCheckScope::kBlockPools;
650     if (!literal->IsBound()) {
651       const ReferenceInfo* info;
652       bool can_encode = ldrh_info(cond, rt, literal, &info);
653       VIXL_CHECK(can_encode);
654       CheckEmitPoolForInstruction(info, literal, &cond);
655       // We have already checked for pool emission.
656       pool_policy = MacroEmissionCheckScope::kIgnorePools;
657     }
658     MacroEmissionCheckScope guard(this, pool_policy);
659     ITScope it_scope(this, &cond, guard);
660     ldrh(cond, rt, literal);
661     RegisterLiteralReference(literal);
662   }
Ldrh(Register rt,RawLiteral * literal)663   void Ldrh(Register rt, RawLiteral* literal) { Ldrh(al, rt, literal); }
664 
Ldrsb(Condition cond,Register rt,RawLiteral * literal)665   void Ldrsb(Condition cond, Register rt, RawLiteral* literal) {
666     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
667     VIXL_ASSERT(allow_macro_instructions_);
668     VIXL_ASSERT(OutsideITBlock());
669     MacroEmissionCheckScope::PoolPolicy pool_policy =
670         MacroEmissionCheckScope::kBlockPools;
671     if (!literal->IsBound()) {
672       const ReferenceInfo* info;
673       bool can_encode = ldrsb_info(cond, rt, literal, &info);
674       VIXL_CHECK(can_encode);
675       CheckEmitPoolForInstruction(info, literal, &cond);
676       // We have already checked for pool emission.
677       pool_policy = MacroEmissionCheckScope::kIgnorePools;
678     }
679     MacroEmissionCheckScope guard(this, pool_policy);
680     ITScope it_scope(this, &cond, guard);
681     ldrsb(cond, rt, literal);
682     RegisterLiteralReference(literal);
683   }
Ldrsb(Register rt,RawLiteral * literal)684   void Ldrsb(Register rt, RawLiteral* literal) { Ldrsb(al, rt, literal); }
685 
Ldrsh(Condition cond,Register rt,RawLiteral * literal)686   void Ldrsh(Condition cond, Register rt, RawLiteral* literal) {
687     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
688     VIXL_ASSERT(allow_macro_instructions_);
689     VIXL_ASSERT(OutsideITBlock());
690     MacroEmissionCheckScope::PoolPolicy pool_policy =
691         MacroEmissionCheckScope::kBlockPools;
692     if (!literal->IsBound()) {
693       const ReferenceInfo* info;
694       bool can_encode = ldrsh_info(cond, rt, literal, &info);
695       VIXL_CHECK(can_encode);
696       CheckEmitPoolForInstruction(info, literal, &cond);
697       // We have already checked for pool emission.
698       pool_policy = MacroEmissionCheckScope::kIgnorePools;
699     }
700     MacroEmissionCheckScope guard(this, pool_policy);
701     ITScope it_scope(this, &cond, guard);
702     ldrsh(cond, rt, literal);
703     RegisterLiteralReference(literal);
704   }
Ldrsh(Register rt,RawLiteral * literal)705   void Ldrsh(Register rt, RawLiteral* literal) { Ldrsh(al, rt, literal); }
706 
Vldr(Condition cond,DataType dt,DRegister rd,RawLiteral * literal)707   void Vldr(Condition cond, DataType dt, DRegister rd, RawLiteral* literal) {
708     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
709     VIXL_ASSERT(allow_macro_instructions_);
710     VIXL_ASSERT(OutsideITBlock());
711     MacroEmissionCheckScope::PoolPolicy pool_policy =
712         MacroEmissionCheckScope::kBlockPools;
713     if (!literal->IsBound()) {
714       const ReferenceInfo* info;
715       bool can_encode = vldr_info(cond, dt, rd, literal, &info);
716       VIXL_CHECK(can_encode);
717       CheckEmitPoolForInstruction(info, literal, &cond);
718       // We have already checked for pool emission.
719       pool_policy = MacroEmissionCheckScope::kIgnorePools;
720     }
721     MacroEmissionCheckScope guard(this, pool_policy);
722     ITScope it_scope(this, &cond, guard);
723     vldr(cond, dt, rd, literal);
724     RegisterLiteralReference(literal);
725   }
Vldr(DataType dt,DRegister rd,RawLiteral * literal)726   void Vldr(DataType dt, DRegister rd, RawLiteral* literal) {
727     Vldr(al, dt, rd, literal);
728   }
Vldr(Condition cond,DRegister rd,RawLiteral * literal)729   void Vldr(Condition cond, DRegister rd, RawLiteral* literal) {
730     Vldr(cond, Untyped64, rd, literal);
731   }
Vldr(DRegister rd,RawLiteral * literal)732   void Vldr(DRegister rd, RawLiteral* literal) {
733     Vldr(al, Untyped64, rd, literal);
734   }
735 
Vldr(Condition cond,DataType dt,SRegister rd,RawLiteral * literal)736   void Vldr(Condition cond, DataType dt, SRegister rd, RawLiteral* literal) {
737     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
738     VIXL_ASSERT(allow_macro_instructions_);
739     VIXL_ASSERT(OutsideITBlock());
740     MacroEmissionCheckScope::PoolPolicy pool_policy =
741         MacroEmissionCheckScope::kBlockPools;
742     if (!literal->IsBound()) {
743       const ReferenceInfo* info;
744       bool can_encode = vldr_info(cond, dt, rd, literal, &info);
745       VIXL_CHECK(can_encode);
746       CheckEmitPoolForInstruction(info, literal, &cond);
747       // We have already checked for pool emission.
748       pool_policy = MacroEmissionCheckScope::kIgnorePools;
749     }
750     MacroEmissionCheckScope guard(this, pool_policy);
751     ITScope it_scope(this, &cond, guard);
752     vldr(cond, dt, rd, literal);
753     RegisterLiteralReference(literal);
754   }
Vldr(DataType dt,SRegister rd,RawLiteral * literal)755   void Vldr(DataType dt, SRegister rd, RawLiteral* literal) {
756     Vldr(al, dt, rd, literal);
757   }
Vldr(Condition cond,SRegister rd,RawLiteral * literal)758   void Vldr(Condition cond, SRegister rd, RawLiteral* literal) {
759     Vldr(cond, Untyped32, rd, literal);
760   }
Vldr(SRegister rd,RawLiteral * literal)761   void Vldr(SRegister rd, RawLiteral* literal) {
762     Vldr(al, Untyped32, rd, literal);
763   }
764 
765   // Generic Ldr(register, data)
Ldr(Condition cond,Register rt,uint32_t v)766   void Ldr(Condition cond, Register rt, uint32_t v) {
767     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
768     VIXL_ASSERT(allow_macro_instructions_);
769     VIXL_ASSERT(OutsideITBlock());
770     RawLiteral* literal =
771         new Literal<uint32_t>(v, RawLiteral::kDeletedOnPlacementByPool);
772     Ldr(cond, rt, literal);
773   }
774   template <typename T>
Ldr(Register rt,T v)775   void Ldr(Register rt, T v) {
776     Ldr(al, rt, v);
777   }
778 
779   // Generic Ldrd(rt, rt2, data)
Ldrd(Condition cond,Register rt,Register rt2,uint64_t v)780   void Ldrd(Condition cond, Register rt, Register rt2, uint64_t v) {
781     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
782     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
783     VIXL_ASSERT(allow_macro_instructions_);
784     VIXL_ASSERT(OutsideITBlock());
785     RawLiteral* literal =
786         new Literal<uint64_t>(v, RawLiteral::kDeletedOnPlacementByPool);
787     Ldrd(cond, rt, rt2, literal);
788   }
789   template <typename T>
Ldrd(Register rt,Register rt2,T v)790   void Ldrd(Register rt, Register rt2, T v) {
791     Ldrd(al, rt, rt2, v);
792   }
793 
Vldr(Condition cond,SRegister rd,float v)794   void Vldr(Condition cond, SRegister rd, float v) {
795     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
796     VIXL_ASSERT(allow_macro_instructions_);
797     VIXL_ASSERT(OutsideITBlock());
798     RawLiteral* literal =
799         new Literal<float>(v, RawLiteral::kDeletedOnPlacementByPool);
800     Vldr(cond, rd, literal);
801   }
Vldr(SRegister rd,float v)802   void Vldr(SRegister rd, float v) { Vldr(al, rd, v); }
803 
Vldr(Condition cond,DRegister rd,double v)804   void Vldr(Condition cond, DRegister rd, double v) {
805     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
806     VIXL_ASSERT(allow_macro_instructions_);
807     VIXL_ASSERT(OutsideITBlock());
808     RawLiteral* literal =
809         new Literal<double>(v, RawLiteral::kDeletedOnPlacementByPool);
810     Vldr(cond, rd, literal);
811   }
Vldr(DRegister rd,double v)812   void Vldr(DRegister rd, double v) { Vldr(al, rd, v); }
813 
Vmov(Condition cond,DRegister rt,double v)814   void Vmov(Condition cond, DRegister rt, double v) { Vmov(cond, F64, rt, v); }
Vmov(DRegister rt,double v)815   void Vmov(DRegister rt, double v) { Vmov(al, F64, rt, v); }
Vmov(Condition cond,SRegister rt,float v)816   void Vmov(Condition cond, SRegister rt, float v) { Vmov(cond, F32, rt, v); }
Vmov(SRegister rt,float v)817   void Vmov(SRegister rt, float v) { Vmov(al, F32, rt, v); }
818 
819   // Claim memory on the stack.
820   // Note that the Claim, Drop, and Peek helpers below ensure that offsets used
821   // are multiples of 32 bits to help maintain 32-bit SP alignment.
822   // We could `Align{Up,Down}(size, 4)`, but that's potentially problematic:
823   //     Claim(3)
824   //     Claim(1)
825   //     Drop(4)
826   // would seem correct, when in fact:
827   //    Claim(3) -> sp = sp - 4
828   //    Claim(1) -> sp = sp - 4
829   //    Drop(4)  -> sp = sp + 4
830   //
Claim(int32_t size)831   void Claim(int32_t size) {
832     if (size == 0) return;
833     // The stack must be kept 32bit aligned.
834     VIXL_ASSERT((size > 0) && ((size % 4) == 0));
835     Sub(sp, sp, size);
836   }
837   // Release memory on the stack
Drop(int32_t size)838   void Drop(int32_t size) {
839     if (size == 0) return;
840     // The stack must be kept 32bit aligned.
841     VIXL_ASSERT((size > 0) && ((size % 4) == 0));
842     Add(sp, sp, size);
843   }
Peek(Register dst,int32_t offset)844   void Peek(Register dst, int32_t offset) {
845     VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
846     Ldr(dst, MemOperand(sp, offset));
847   }
Poke(Register src,int32_t offset)848   void Poke(Register src, int32_t offset) {
849     VIXL_ASSERT((offset >= 0) && ((offset % 4) == 0));
850     Str(src, MemOperand(sp, offset));
851   }
852   void Printf(const char* format,
853               CPURegister reg1 = NoReg,
854               CPURegister reg2 = NoReg,
855               CPURegister reg3 = NoReg,
856               CPURegister reg4 = NoReg);
857   // Functions used by Printf for generation.
858   void PushRegister(CPURegister reg);
859   void PreparePrintfArgument(CPURegister reg,
860                              int* core_count,
861                              int* vfp_count,
862                              uint32_t* printf_type);
863   // Handlers for cases not handled by the assembler.
864   // ADD, MOVT, MOVW, SUB, SXTB16, TEQ, UXTB16
865   virtual void Delegate(InstructionType type,
866                         InstructionCondROp instruction,
867                         Condition cond,
868                         Register rn,
869                         const Operand& operand) VIXL_OVERRIDE;
870   // CMN, CMP, MOV, MOVS, MVN, MVNS, SXTB, SXTH, TST, UXTB, UXTH
871   virtual void Delegate(InstructionType type,
872                         InstructionCondSizeROp instruction,
873                         Condition cond,
874                         EncodingSize size,
875                         Register rn,
876                         const Operand& operand) VIXL_OVERRIDE;
877   // ADDW, ORN, ORNS, PKHBT, PKHTB, RSC, RSCS, SUBW, SXTAB, SXTAB16, SXTAH,
878   // UXTAB, UXTAB16, UXTAH
879   virtual void Delegate(InstructionType type,
880                         InstructionCondRROp instruction,
881                         Condition cond,
882                         Register rd,
883                         Register rn,
884                         const Operand& operand) VIXL_OVERRIDE;
885   // ADC, ADCS, ADD, ADDS, AND, ANDS, ASR, ASRS, BIC, BICS, EOR, EORS, LSL,
886   // LSLS, LSR, LSRS, ORR, ORRS, ROR, RORS, RSB, RSBS, SBC, SBCS, SUB, SUBS
887   virtual void Delegate(InstructionType type,
888                         InstructionCondSizeRL instruction,
889                         Condition cond,
890                         EncodingSize size,
891                         Register rd,
892                         Location* location) VIXL_OVERRIDE;
893   bool GenerateSplitInstruction(InstructionCondSizeRROp instruction,
894                                 Condition cond,
895                                 Register rd,
896                                 Register rn,
897                                 uint32_t imm,
898                                 uint32_t mask);
899   virtual void Delegate(InstructionType type,
900                         InstructionCondSizeRROp instruction,
901                         Condition cond,
902                         EncodingSize size,
903                         Register rd,
904                         Register rn,
905                         const Operand& operand) VIXL_OVERRIDE;
906   // CBNZ, CBZ
907   virtual void Delegate(InstructionType type,
908                         InstructionRL instruction,
909                         Register rn,
910                         Location* location) VIXL_OVERRIDE;
911   // B
912   virtual void Delegate(InstructionType type,
913                         InstructionCondSizeL instruction,
914                         Condition cond,
915                         EncodingSize size,
916                         Location* location) VIXL_OVERRIDE;
917   // VMOV
918   virtual void Delegate(InstructionType type,
919                         InstructionCondDtSSop instruction,
920                         Condition cond,
921                         DataType dt,
922                         SRegister rd,
923                         const SOperand& operand) VIXL_OVERRIDE;
924   // VMOV, VMVN
925   virtual void Delegate(InstructionType type,
926                         InstructionCondDtDDop instruction,
927                         Condition cond,
928                         DataType dt,
929                         DRegister rd,
930                         const DOperand& operand) VIXL_OVERRIDE;
931   // VMOV, VMVN
932   virtual void Delegate(InstructionType type,
933                         InstructionCondDtQQop instruction,
934                         Condition cond,
935                         DataType dt,
936                         QRegister rd,
937                         const QOperand& operand) VIXL_OVERRIDE;
938   // LDR, LDRB, LDRH, LDRSB, LDRSH, STR, STRB, STRH
939   virtual void Delegate(InstructionType type,
940                         InstructionCondSizeRMop instruction,
941                         Condition cond,
942                         EncodingSize size,
943                         Register rd,
944                         const MemOperand& operand) VIXL_OVERRIDE;
945   // LDAEXD, LDRD, LDREXD, STLEX, STLEXB, STLEXH, STRD, STREX, STREXB, STREXH
946   virtual void Delegate(InstructionType type,
947                         InstructionCondRL instruction,
948                         Condition cond,
949                         Register rt,
950                         Location* location) VIXL_OVERRIDE;
951   virtual void Delegate(InstructionType type,
952                         InstructionCondRRL instruction,
953                         Condition cond,
954                         Register rt,
955                         Register rt2,
956                         Location* location) VIXL_OVERRIDE;
957   virtual void Delegate(InstructionType type,
958                         InstructionCondRRMop instruction,
959                         Condition cond,
960                         Register rt,
961                         Register rt2,
962                         const MemOperand& operand) VIXL_OVERRIDE;
963   // VLDR, VSTR
964   virtual void Delegate(InstructionType type,
965                         InstructionCondDtSMop instruction,
966                         Condition cond,
967                         DataType dt,
968                         SRegister rd,
969                         const MemOperand& operand) VIXL_OVERRIDE;
970   // VLDR, VSTR
971   virtual void Delegate(InstructionType type,
972                         InstructionCondDtDMop instruction,
973                         Condition cond,
974                         DataType dt,
975                         DRegister rd,
976                         const MemOperand& operand) VIXL_OVERRIDE;
977   // MSR
978   virtual void Delegate(InstructionType type,
979                         InstructionCondMsrOp instruction,
980                         Condition cond,
981                         MaskedSpecialRegister spec_reg,
982                         const Operand& operand) VIXL_OVERRIDE;
983   virtual void Delegate(InstructionType type,
984                         InstructionCondDtDL instruction,
985                         Condition cond,
986                         DataType dt,
987                         DRegister rd,
988                         Location* location) VIXL_OVERRIDE;
989   virtual void Delegate(InstructionType type,
990                         InstructionCondDtSL instruction,
991                         Condition cond,
992                         DataType dt,
993                         SRegister rd,
994                         Location* location) VIXL_OVERRIDE;
995 
996   // Start of generated code.
997 
Adc(Condition cond,Register rd,Register rn,const Operand & operand)998   void Adc(Condition cond, Register rd, Register rn, const Operand& operand) {
999     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1000     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1001     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1002     VIXL_ASSERT(allow_macro_instructions_);
1003     VIXL_ASSERT(OutsideITBlock());
1004     MacroEmissionCheckScope guard(this);
1005     bool can_use_it =
1006         // ADC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1007         operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
1008         operand.GetBaseRegister().IsLow();
1009     ITScope it_scope(this, &cond, guard, can_use_it);
1010     adc(cond, rd, rn, operand);
1011   }
Adc(Register rd,Register rn,const Operand & operand)1012   void Adc(Register rd, Register rn, const Operand& operand) {
1013     Adc(al, rd, rn, operand);
1014   }
Adc(FlagsUpdate flags,Condition cond,Register rd,Register rn,const Operand & operand)1015   void Adc(FlagsUpdate flags,
1016            Condition cond,
1017            Register rd,
1018            Register rn,
1019            const Operand& operand) {
1020     switch (flags) {
1021       case LeaveFlags:
1022         Adc(cond, rd, rn, operand);
1023         break;
1024       case SetFlags:
1025         Adcs(cond, rd, rn, operand);
1026         break;
1027       case DontCare:
1028         bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1029                                    rn.Is(rd) && operand.IsPlainRegister() &&
1030                                    operand.GetBaseRegister().IsLow();
1031         if (setflags_is_smaller) {
1032           Adcs(cond, rd, rn, operand);
1033         } else {
1034           Adc(cond, rd, rn, operand);
1035         }
1036         break;
1037     }
1038   }
Adc(FlagsUpdate flags,Register rd,Register rn,const Operand & operand)1039   void Adc(FlagsUpdate flags,
1040            Register rd,
1041            Register rn,
1042            const Operand& operand) {
1043     Adc(flags, al, rd, rn, operand);
1044   }
1045 
Adcs(Condition cond,Register rd,Register rn,const Operand & operand)1046   void Adcs(Condition cond, Register rd, Register rn, const Operand& operand) {
1047     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1048     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1049     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1050     VIXL_ASSERT(allow_macro_instructions_);
1051     VIXL_ASSERT(OutsideITBlock());
1052     MacroEmissionCheckScope guard(this);
1053     ITScope it_scope(this, &cond, guard);
1054     adcs(cond, rd, rn, operand);
1055   }
Adcs(Register rd,Register rn,const Operand & operand)1056   void Adcs(Register rd, Register rn, const Operand& operand) {
1057     Adcs(al, rd, rn, operand);
1058   }
1059 
Add(Condition cond,Register rd,Register rn,const Operand & operand)1060   void Add(Condition cond, Register rd, Register rn, const Operand& operand) {
1061     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1062     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1063     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1064     VIXL_ASSERT(allow_macro_instructions_);
1065     VIXL_ASSERT(OutsideITBlock());
1066     MacroEmissionCheckScope guard(this);
1067     if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1068       uint32_t immediate = operand.GetImmediate();
1069       if (immediate == 0) {
1070         return;
1071       }
1072     }
1073     bool can_use_it =
1074         // ADD<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
1075         (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
1076          rd.IsLow()) ||
1077         // ADD<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
1078         (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1079          rd.IsLow() && rn.Is(rd)) ||
1080         // ADD{<c>}{<q>} <Rd>, SP, #<imm8> ; T1
1081         (operand.IsImmediate() && (operand.GetImmediate() <= 1020) &&
1082          ((operand.GetImmediate() & 0x3) == 0) && rd.IsLow() && rn.IsSP()) ||
1083         // ADD<c>{<q>} <Rd>, <Rn>, <Rm>
1084         (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1085          operand.GetBaseRegister().IsLow()) ||
1086         // ADD<c>{<q>} <Rdn>, <Rm> ; T2
1087         (operand.IsPlainRegister() && !rd.IsPC() && rn.Is(rd) &&
1088          !operand.GetBaseRegister().IsSP() &&
1089          !operand.GetBaseRegister().IsPC()) ||
1090         // ADD{<c>}{<q>} {<Rdm>,} SP, <Rdm> ; T1
1091         (operand.IsPlainRegister() && !rd.IsPC() && rn.IsSP() &&
1092          operand.GetBaseRegister().Is(rd));
1093     ITScope it_scope(this, &cond, guard, can_use_it);
1094     add(cond, rd, rn, operand);
1095   }
Add(Register rd,Register rn,const Operand & operand)1096   void Add(Register rd, Register rn, const Operand& operand) {
1097     Add(al, rd, rn, operand);
1098   }
Add(FlagsUpdate flags,Condition cond,Register rd,Register rn,const Operand & operand)1099   void Add(FlagsUpdate flags,
1100            Condition cond,
1101            Register rd,
1102            Register rn,
1103            const Operand& operand) {
1104     switch (flags) {
1105       case LeaveFlags:
1106         Add(cond, rd, rn, operand);
1107         break;
1108       case SetFlags:
1109         Adds(cond, rd, rn, operand);
1110         break;
1111       case DontCare:
1112         bool setflags_is_smaller =
1113             IsUsingT32() && cond.Is(al) &&
1114             ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
1115               !rd.Is(rn) && operand.GetBaseRegister().IsLow()) ||
1116              (operand.IsImmediate() &&
1117               ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
1118                (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
1119         if (setflags_is_smaller) {
1120           Adds(cond, rd, rn, operand);
1121         } else {
1122           bool changed_op_is_smaller =
1123               operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
1124               ((rd.IsLow() && rn.IsLow() &&
1125                 (operand.GetSignedImmediate() >= -7)) ||
1126                (rd.IsLow() && rn.Is(rd) &&
1127                 (operand.GetSignedImmediate() >= -255)));
1128           if (changed_op_is_smaller) {
1129             Subs(cond, rd, rn, -operand.GetSignedImmediate());
1130           } else {
1131             Add(cond, rd, rn, operand);
1132           }
1133         }
1134         break;
1135     }
1136   }
Add(FlagsUpdate flags,Register rd,Register rn,const Operand & operand)1137   void Add(FlagsUpdate flags,
1138            Register rd,
1139            Register rn,
1140            const Operand& operand) {
1141     Add(flags, al, rd, rn, operand);
1142   }
1143 
Adds(Condition cond,Register rd,Register rn,const Operand & operand)1144   void Adds(Condition cond, Register rd, Register rn, const Operand& operand) {
1145     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1146     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1147     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1148     VIXL_ASSERT(allow_macro_instructions_);
1149     VIXL_ASSERT(OutsideITBlock());
1150     MacroEmissionCheckScope guard(this);
1151     ITScope it_scope(this, &cond, guard);
1152     adds(cond, rd, rn, operand);
1153   }
Adds(Register rd,Register rn,const Operand & operand)1154   void Adds(Register rd, Register rn, const Operand& operand) {
1155     Adds(al, rd, rn, operand);
1156   }
1157 
And(Condition cond,Register rd,Register rn,const Operand & operand)1158   void And(Condition cond, Register rd, Register rn, const Operand& operand) {
1159     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1160     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1161     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1162     VIXL_ASSERT(allow_macro_instructions_);
1163     VIXL_ASSERT(OutsideITBlock());
1164     MacroEmissionCheckScope guard(this);
1165     if (rd.Is(rn) && operand.IsPlainRegister() &&
1166         rd.Is(operand.GetBaseRegister())) {
1167       return;
1168     }
1169     if (cond.Is(al) && operand.IsImmediate()) {
1170       uint32_t immediate = operand.GetImmediate();
1171       if (immediate == 0) {
1172         mov(rd, 0);
1173         return;
1174       }
1175       if ((immediate == 0xffffffff) && rd.Is(rn)) {
1176         return;
1177       }
1178     }
1179     bool can_use_it =
1180         // AND<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1181         operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1182         operand.GetBaseRegister().IsLow();
1183     ITScope it_scope(this, &cond, guard, can_use_it);
1184     and_(cond, rd, rn, operand);
1185   }
And(Register rd,Register rn,const Operand & operand)1186   void And(Register rd, Register rn, const Operand& operand) {
1187     And(al, rd, rn, operand);
1188   }
And(FlagsUpdate flags,Condition cond,Register rd,Register rn,const Operand & operand)1189   void And(FlagsUpdate flags,
1190            Condition cond,
1191            Register rd,
1192            Register rn,
1193            const Operand& operand) {
1194     switch (flags) {
1195       case LeaveFlags:
1196         And(cond, rd, rn, operand);
1197         break;
1198       case SetFlags:
1199         Ands(cond, rd, rn, operand);
1200         break;
1201       case DontCare:
1202         if (operand.IsPlainRegister() && rd.Is(rn) &&
1203             rd.Is(operand.GetBaseRegister())) {
1204           return;
1205         }
1206         bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1207                                    rn.Is(rd) && operand.IsPlainRegister() &&
1208                                    operand.GetBaseRegister().IsLow();
1209         if (setflags_is_smaller) {
1210           Ands(cond, rd, rn, operand);
1211         } else {
1212           And(cond, rd, rn, operand);
1213         }
1214         break;
1215     }
1216   }
And(FlagsUpdate flags,Register rd,Register rn,const Operand & operand)1217   void And(FlagsUpdate flags,
1218            Register rd,
1219            Register rn,
1220            const Operand& operand) {
1221     And(flags, al, rd, rn, operand);
1222   }
1223 
Ands(Condition cond,Register rd,Register rn,const Operand & operand)1224   void Ands(Condition cond, Register rd, Register rn, const Operand& operand) {
1225     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1226     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1227     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1228     VIXL_ASSERT(allow_macro_instructions_);
1229     VIXL_ASSERT(OutsideITBlock());
1230     MacroEmissionCheckScope guard(this);
1231     ITScope it_scope(this, &cond, guard);
1232     ands(cond, rd, rn, operand);
1233   }
Ands(Register rd,Register rn,const Operand & operand)1234   void Ands(Register rd, Register rn, const Operand& operand) {
1235     Ands(al, rd, rn, operand);
1236   }
1237 
Asr(Condition cond,Register rd,Register rm,const Operand & operand)1238   void Asr(Condition cond, Register rd, Register rm, const Operand& operand) {
1239     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1240     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1241     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1242     VIXL_ASSERT(allow_macro_instructions_);
1243     VIXL_ASSERT(OutsideITBlock());
1244     MacroEmissionCheckScope guard(this);
1245     bool can_use_it =
1246         // ASR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
1247         (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1248          (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
1249         // ASR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
1250         (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
1251          operand.GetBaseRegister().IsLow());
1252     ITScope it_scope(this, &cond, guard, can_use_it);
1253     asr(cond, rd, rm, operand);
1254   }
Asr(Register rd,Register rm,const Operand & operand)1255   void Asr(Register rd, Register rm, const Operand& operand) {
1256     Asr(al, rd, rm, operand);
1257   }
Asr(FlagsUpdate flags,Condition cond,Register rd,Register rm,const Operand & operand)1258   void Asr(FlagsUpdate flags,
1259            Condition cond,
1260            Register rd,
1261            Register rm,
1262            const Operand& operand) {
1263     switch (flags) {
1264       case LeaveFlags:
1265         Asr(cond, rd, rm, operand);
1266         break;
1267       case SetFlags:
1268         Asrs(cond, rd, rm, operand);
1269         break;
1270       case DontCare:
1271         bool setflags_is_smaller =
1272             IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
1273             ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
1274               (operand.GetImmediate() <= 32)) ||
1275              (operand.IsPlainRegister() && rd.Is(rm)));
1276         if (setflags_is_smaller) {
1277           Asrs(cond, rd, rm, operand);
1278         } else {
1279           Asr(cond, rd, rm, operand);
1280         }
1281         break;
1282     }
1283   }
Asr(FlagsUpdate flags,Register rd,Register rm,const Operand & operand)1284   void Asr(FlagsUpdate flags,
1285            Register rd,
1286            Register rm,
1287            const Operand& operand) {
1288     Asr(flags, al, rd, rm, operand);
1289   }
1290 
Asrs(Condition cond,Register rd,Register rm,const Operand & operand)1291   void Asrs(Condition cond, Register rd, Register rm, const Operand& operand) {
1292     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1293     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1294     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1295     VIXL_ASSERT(allow_macro_instructions_);
1296     VIXL_ASSERT(OutsideITBlock());
1297     MacroEmissionCheckScope guard(this);
1298     ITScope it_scope(this, &cond, guard);
1299     asrs(cond, rd, rm, operand);
1300   }
Asrs(Register rd,Register rm,const Operand & operand)1301   void Asrs(Register rd, Register rm, const Operand& operand) {
1302     Asrs(al, rd, rm, operand);
1303   }
1304 
1305   void B(Condition cond, Label* label, BranchHint hint = kBranchWithoutHint) {
1306     VIXL_ASSERT(allow_macro_instructions_);
1307     VIXL_ASSERT(OutsideITBlock());
1308     EncodingSize size = Best;
1309     MacroEmissionCheckScope::PoolPolicy pool_policy =
1310         MacroEmissionCheckScope::kBlockPools;
1311     if (!label->IsBound()) {
1312       if (hint == kNear) size = Narrow;
1313       const ReferenceInfo* info;
1314       bool can_encode = b_info(cond, size, label, &info);
1315       VIXL_CHECK(can_encode);
1316       CheckEmitPoolForInstruction(info, label, &cond);
1317       // We have already checked for pool emission.
1318       pool_policy = MacroEmissionCheckScope::kIgnorePools;
1319     }
1320     MacroEmissionCheckScope guard(this, pool_policy);
1321     b(cond, size, label);
1322     RegisterForwardReference(label);
1323   }
1324   void B(Label* label, BranchHint hint = kBranchWithoutHint) {
1325     B(al, label, hint);
1326   }
BPreferNear(Condition cond,Label * label)1327   void BPreferNear(Condition cond, Label* label) { B(cond, label, kNear); }
BPreferNear(Label * label)1328   void BPreferNear(Label* label) { B(al, label, kNear); }
1329 
Bfc(Condition cond,Register rd,uint32_t lsb,uint32_t width)1330   void Bfc(Condition cond, Register rd, uint32_t lsb, uint32_t width) {
1331     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1332     VIXL_ASSERT(allow_macro_instructions_);
1333     VIXL_ASSERT(OutsideITBlock());
1334     MacroEmissionCheckScope guard(this);
1335     ITScope it_scope(this, &cond, guard);
1336     bfc(cond, rd, lsb, width);
1337   }
Bfc(Register rd,uint32_t lsb,uint32_t width)1338   void Bfc(Register rd, uint32_t lsb, uint32_t width) {
1339     Bfc(al, rd, lsb, width);
1340   }
1341 
Bfi(Condition cond,Register rd,Register rn,uint32_t lsb,uint32_t width)1342   void Bfi(
1343       Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
1344     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1345     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1346     VIXL_ASSERT(allow_macro_instructions_);
1347     VIXL_ASSERT(OutsideITBlock());
1348     MacroEmissionCheckScope guard(this);
1349     ITScope it_scope(this, &cond, guard);
1350     bfi(cond, rd, rn, lsb, width);
1351   }
Bfi(Register rd,Register rn,uint32_t lsb,uint32_t width)1352   void Bfi(Register rd, Register rn, uint32_t lsb, uint32_t width) {
1353     Bfi(al, rd, rn, lsb, width);
1354   }
1355 
Bic(Condition cond,Register rd,Register rn,const Operand & operand)1356   void Bic(Condition cond, Register rd, Register rn, const Operand& operand) {
1357     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1358     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1359     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1360     VIXL_ASSERT(allow_macro_instructions_);
1361     VIXL_ASSERT(OutsideITBlock());
1362     MacroEmissionCheckScope guard(this);
1363     if (cond.Is(al) && operand.IsImmediate()) {
1364       uint32_t immediate = operand.GetImmediate();
1365       if ((immediate == 0) && rd.Is(rn)) {
1366         return;
1367       }
1368       if (immediate == 0xffffffff) {
1369         mov(rd, 0);
1370         return;
1371       }
1372     }
1373     bool can_use_it =
1374         // BIC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1375         operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1376         operand.GetBaseRegister().IsLow();
1377     ITScope it_scope(this, &cond, guard, can_use_it);
1378     bic(cond, rd, rn, operand);
1379   }
Bic(Register rd,Register rn,const Operand & operand)1380   void Bic(Register rd, Register rn, const Operand& operand) {
1381     Bic(al, rd, rn, operand);
1382   }
Bic(FlagsUpdate flags,Condition cond,Register rd,Register rn,const Operand & operand)1383   void Bic(FlagsUpdate flags,
1384            Condition cond,
1385            Register rd,
1386            Register rn,
1387            const Operand& operand) {
1388     switch (flags) {
1389       case LeaveFlags:
1390         Bic(cond, rd, rn, operand);
1391         break;
1392       case SetFlags:
1393         Bics(cond, rd, rn, operand);
1394         break;
1395       case DontCare:
1396         bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1397                                    rn.Is(rd) && operand.IsPlainRegister() &&
1398                                    operand.GetBaseRegister().IsLow();
1399         if (setflags_is_smaller) {
1400           Bics(cond, rd, rn, operand);
1401         } else {
1402           Bic(cond, rd, rn, operand);
1403         }
1404         break;
1405     }
1406   }
Bic(FlagsUpdate flags,Register rd,Register rn,const Operand & operand)1407   void Bic(FlagsUpdate flags,
1408            Register rd,
1409            Register rn,
1410            const Operand& operand) {
1411     Bic(flags, al, rd, rn, operand);
1412   }
1413 
Bics(Condition cond,Register rd,Register rn,const Operand & operand)1414   void Bics(Condition cond, Register rd, Register rn, const Operand& operand) {
1415     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1416     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1417     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1418     VIXL_ASSERT(allow_macro_instructions_);
1419     VIXL_ASSERT(OutsideITBlock());
1420     MacroEmissionCheckScope guard(this);
1421     ITScope it_scope(this, &cond, guard);
1422     bics(cond, rd, rn, operand);
1423   }
Bics(Register rd,Register rn,const Operand & operand)1424   void Bics(Register rd, Register rn, const Operand& operand) {
1425     Bics(al, rd, rn, operand);
1426   }
1427 
Bkpt(Condition cond,uint32_t imm)1428   void Bkpt(Condition cond, uint32_t imm) {
1429     VIXL_ASSERT(allow_macro_instructions_);
1430     VIXL_ASSERT(OutsideITBlock());
1431     MacroEmissionCheckScope guard(this);
1432     ITScope it_scope(this, &cond, guard);
1433     bkpt(cond, imm);
1434   }
Bkpt(uint32_t imm)1435   void Bkpt(uint32_t imm) { Bkpt(al, imm); }
1436 
Bl(Condition cond,Label * label)1437   void Bl(Condition cond, Label* label) {
1438     VIXL_ASSERT(allow_macro_instructions_);
1439     VIXL_ASSERT(OutsideITBlock());
1440     MacroEmissionCheckScope::PoolPolicy pool_policy =
1441         MacroEmissionCheckScope::kBlockPools;
1442     if (!label->IsBound()) {
1443       const ReferenceInfo* info;
1444       bool can_encode = bl_info(cond, label, &info);
1445       VIXL_CHECK(can_encode);
1446       CheckEmitPoolForInstruction(info, label, &cond);
1447       // We have already checked for pool emission.
1448       pool_policy = MacroEmissionCheckScope::kIgnorePools;
1449     }
1450     MacroEmissionCheckScope guard(this, pool_policy);
1451     ITScope it_scope(this, &cond, guard);
1452     bl(cond, label);
1453     RegisterForwardReference(label);
1454   }
Bl(Label * label)1455   void Bl(Label* label) { Bl(al, label); }
1456 
Blx(Condition cond,Label * label)1457   void Blx(Condition cond, Label* label) {
1458     VIXL_ASSERT(allow_macro_instructions_);
1459     VIXL_ASSERT(OutsideITBlock());
1460     MacroEmissionCheckScope::PoolPolicy pool_policy =
1461         MacroEmissionCheckScope::kBlockPools;
1462     if (!label->IsBound()) {
1463       const ReferenceInfo* info;
1464       bool can_encode = blx_info(cond, label, &info);
1465       VIXL_CHECK(can_encode);
1466       CheckEmitPoolForInstruction(info, label, &cond);
1467       // We have already checked for pool emission.
1468       pool_policy = MacroEmissionCheckScope::kIgnorePools;
1469     }
1470     MacroEmissionCheckScope guard(this, pool_policy);
1471     ITScope it_scope(this, &cond, guard);
1472     blx(cond, label);
1473     RegisterForwardReference(label);
1474   }
Blx(Label * label)1475   void Blx(Label* label) { Blx(al, label); }
1476 
Blx(Condition cond,Register rm)1477   void Blx(Condition cond, Register rm) {
1478     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1479     VIXL_ASSERT(allow_macro_instructions_);
1480     VIXL_ASSERT(OutsideITBlock());
1481     MacroEmissionCheckScope guard(this);
1482     bool can_use_it =
1483         // BLX{<c>}{<q>} <Rm> ; T1
1484         !rm.IsPC();
1485     ITScope it_scope(this, &cond, guard, can_use_it);
1486     blx(cond, rm);
1487   }
Blx(Register rm)1488   void Blx(Register rm) { Blx(al, rm); }
1489 
Bx(Condition cond,Register rm)1490   void Bx(Condition cond, Register rm) {
1491     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1492     VIXL_ASSERT(allow_macro_instructions_);
1493     VIXL_ASSERT(OutsideITBlock());
1494     MacroEmissionCheckScope guard(this);
1495     bool can_use_it =
1496         // BX{<c>}{<q>} <Rm> ; T1
1497         !rm.IsPC();
1498     ITScope it_scope(this, &cond, guard, can_use_it);
1499     bx(cond, rm);
1500   }
Bx(Register rm)1501   void Bx(Register rm) { Bx(al, rm); }
1502 
Bxj(Condition cond,Register rm)1503   void Bxj(Condition cond, Register rm) {
1504     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1505     VIXL_ASSERT(allow_macro_instructions_);
1506     VIXL_ASSERT(OutsideITBlock());
1507     MacroEmissionCheckScope guard(this);
1508     ITScope it_scope(this, &cond, guard);
1509     bxj(cond, rm);
1510   }
Bxj(Register rm)1511   void Bxj(Register rm) { Bxj(al, rm); }
1512 
Cbnz(Register rn,Label * label)1513   void Cbnz(Register rn, Label* label) {
1514     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1515     VIXL_ASSERT(allow_macro_instructions_);
1516     VIXL_ASSERT(OutsideITBlock());
1517     MacroEmissionCheckScope::PoolPolicy pool_policy =
1518         MacroEmissionCheckScope::kBlockPools;
1519     if (!label->IsBound()) {
1520       const ReferenceInfo* info;
1521       bool can_encode = cbnz_info(rn, label, &info);
1522       VIXL_CHECK(can_encode);
1523       CheckEmitPoolForInstruction(info, label);
1524       // We have already checked for pool emission.
1525       pool_policy = MacroEmissionCheckScope::kIgnorePools;
1526     }
1527     MacroEmissionCheckScope guard(this, pool_policy);
1528     cbnz(rn, label);
1529     RegisterForwardReference(label);
1530   }
1531 
Cbz(Register rn,Label * label)1532   void Cbz(Register rn, Label* label) {
1533     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1534     VIXL_ASSERT(allow_macro_instructions_);
1535     VIXL_ASSERT(OutsideITBlock());
1536     MacroEmissionCheckScope::PoolPolicy pool_policy =
1537         MacroEmissionCheckScope::kBlockPools;
1538     if (!label->IsBound()) {
1539       const ReferenceInfo* info;
1540       bool can_encode = cbz_info(rn, label, &info);
1541       VIXL_CHECK(can_encode);
1542       CheckEmitPoolForInstruction(info, label);
1543       // We have already checked for pool emission.
1544       pool_policy = MacroEmissionCheckScope::kIgnorePools;
1545     }
1546     MacroEmissionCheckScope guard(this, pool_policy);
1547     cbz(rn, label);
1548     RegisterForwardReference(label);
1549   }
1550 
Clrex(Condition cond)1551   void Clrex(Condition cond) {
1552     VIXL_ASSERT(allow_macro_instructions_);
1553     VIXL_ASSERT(OutsideITBlock());
1554     MacroEmissionCheckScope guard(this);
1555     ITScope it_scope(this, &cond, guard);
1556     clrex(cond);
1557   }
Clrex()1558   void Clrex() { Clrex(al); }
1559 
Clz(Condition cond,Register rd,Register rm)1560   void Clz(Condition cond, Register rd, Register rm) {
1561     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1562     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1563     VIXL_ASSERT(allow_macro_instructions_);
1564     VIXL_ASSERT(OutsideITBlock());
1565     MacroEmissionCheckScope guard(this);
1566     ITScope it_scope(this, &cond, guard);
1567     clz(cond, rd, rm);
1568   }
Clz(Register rd,Register rm)1569   void Clz(Register rd, Register rm) { Clz(al, rd, rm); }
1570 
Cmn(Condition cond,Register rn,const Operand & operand)1571   void Cmn(Condition cond, Register rn, const Operand& operand) {
1572     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1573     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1574     VIXL_ASSERT(allow_macro_instructions_);
1575     VIXL_ASSERT(OutsideITBlock());
1576     MacroEmissionCheckScope guard(this);
1577     bool can_use_it =
1578         // CMN{<c>}{<q>} <Rn>, <Rm> ; T1
1579         operand.IsPlainRegister() && rn.IsLow() &&
1580         operand.GetBaseRegister().IsLow();
1581     ITScope it_scope(this, &cond, guard, can_use_it);
1582     cmn(cond, rn, operand);
1583   }
Cmn(Register rn,const Operand & operand)1584   void Cmn(Register rn, const Operand& operand) { Cmn(al, rn, operand); }
1585 
Cmp(Condition cond,Register rn,const Operand & operand)1586   void Cmp(Condition cond, Register rn, const Operand& operand) {
1587     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1588     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1589     VIXL_ASSERT(allow_macro_instructions_);
1590     VIXL_ASSERT(OutsideITBlock());
1591     MacroEmissionCheckScope guard(this);
1592     bool can_use_it =
1593         // CMP{<c>}{<q>} <Rn>, #<imm8> ; T1
1594         (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
1595          rn.IsLow()) ||
1596         // CMP{<c>}{<q>} <Rn>, <Rm> ; T1 T2
1597         (operand.IsPlainRegister() && !rn.IsPC() &&
1598          !operand.GetBaseRegister().IsPC());
1599     ITScope it_scope(this, &cond, guard, can_use_it);
1600     cmp(cond, rn, operand);
1601   }
Cmp(Register rn,const Operand & operand)1602   void Cmp(Register rn, const Operand& operand) { Cmp(al, rn, operand); }
1603 
Crc32b(Condition cond,Register rd,Register rn,Register rm)1604   void Crc32b(Condition cond, Register rd, Register rn, Register rm) {
1605     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1606     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1607     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1608     VIXL_ASSERT(allow_macro_instructions_);
1609     VIXL_ASSERT(OutsideITBlock());
1610     MacroEmissionCheckScope guard(this);
1611     ITScope it_scope(this, &cond, guard);
1612     crc32b(cond, rd, rn, rm);
1613   }
Crc32b(Register rd,Register rn,Register rm)1614   void Crc32b(Register rd, Register rn, Register rm) { Crc32b(al, rd, rn, rm); }
1615 
Crc32cb(Condition cond,Register rd,Register rn,Register rm)1616   void Crc32cb(Condition cond, Register rd, Register rn, Register rm) {
1617     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1618     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1619     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1620     VIXL_ASSERT(allow_macro_instructions_);
1621     VIXL_ASSERT(OutsideITBlock());
1622     MacroEmissionCheckScope guard(this);
1623     ITScope it_scope(this, &cond, guard);
1624     crc32cb(cond, rd, rn, rm);
1625   }
Crc32cb(Register rd,Register rn,Register rm)1626   void Crc32cb(Register rd, Register rn, Register rm) {
1627     Crc32cb(al, rd, rn, rm);
1628   }
1629 
Crc32ch(Condition cond,Register rd,Register rn,Register rm)1630   void Crc32ch(Condition cond, Register rd, Register rn, Register rm) {
1631     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1632     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1633     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1634     VIXL_ASSERT(allow_macro_instructions_);
1635     VIXL_ASSERT(OutsideITBlock());
1636     MacroEmissionCheckScope guard(this);
1637     ITScope it_scope(this, &cond, guard);
1638     crc32ch(cond, rd, rn, rm);
1639   }
Crc32ch(Register rd,Register rn,Register rm)1640   void Crc32ch(Register rd, Register rn, Register rm) {
1641     Crc32ch(al, rd, rn, rm);
1642   }
1643 
Crc32cw(Condition cond,Register rd,Register rn,Register rm)1644   void Crc32cw(Condition cond, Register rd, Register rn, Register rm) {
1645     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1646     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1647     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1648     VIXL_ASSERT(allow_macro_instructions_);
1649     VIXL_ASSERT(OutsideITBlock());
1650     MacroEmissionCheckScope guard(this);
1651     ITScope it_scope(this, &cond, guard);
1652     crc32cw(cond, rd, rn, rm);
1653   }
Crc32cw(Register rd,Register rn,Register rm)1654   void Crc32cw(Register rd, Register rn, Register rm) {
1655     Crc32cw(al, rd, rn, rm);
1656   }
1657 
Crc32h(Condition cond,Register rd,Register rn,Register rm)1658   void Crc32h(Condition cond, Register rd, Register rn, Register rm) {
1659     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1660     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1661     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1662     VIXL_ASSERT(allow_macro_instructions_);
1663     VIXL_ASSERT(OutsideITBlock());
1664     MacroEmissionCheckScope guard(this);
1665     ITScope it_scope(this, &cond, guard);
1666     crc32h(cond, rd, rn, rm);
1667   }
Crc32h(Register rd,Register rn,Register rm)1668   void Crc32h(Register rd, Register rn, Register rm) { Crc32h(al, rd, rn, rm); }
1669 
Crc32w(Condition cond,Register rd,Register rn,Register rm)1670   void Crc32w(Condition cond, Register rd, Register rn, Register rm) {
1671     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1672     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1673     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
1674     VIXL_ASSERT(allow_macro_instructions_);
1675     VIXL_ASSERT(OutsideITBlock());
1676     MacroEmissionCheckScope guard(this);
1677     ITScope it_scope(this, &cond, guard);
1678     crc32w(cond, rd, rn, rm);
1679   }
Crc32w(Register rd,Register rn,Register rm)1680   void Crc32w(Register rd, Register rn, Register rm) { Crc32w(al, rd, rn, rm); }
1681 
Dmb(Condition cond,MemoryBarrier option)1682   void Dmb(Condition cond, MemoryBarrier option) {
1683     VIXL_ASSERT(allow_macro_instructions_);
1684     VIXL_ASSERT(OutsideITBlock());
1685     MacroEmissionCheckScope guard(this);
1686     ITScope it_scope(this, &cond, guard);
1687     dmb(cond, option);
1688   }
Dmb(MemoryBarrier option)1689   void Dmb(MemoryBarrier option) { Dmb(al, option); }
1690 
Dsb(Condition cond,MemoryBarrier option)1691   void Dsb(Condition cond, MemoryBarrier option) {
1692     VIXL_ASSERT(allow_macro_instructions_);
1693     VIXL_ASSERT(OutsideITBlock());
1694     MacroEmissionCheckScope guard(this);
1695     ITScope it_scope(this, &cond, guard);
1696     dsb(cond, option);
1697   }
Dsb(MemoryBarrier option)1698   void Dsb(MemoryBarrier option) { Dsb(al, option); }
1699 
Eor(Condition cond,Register rd,Register rn,const Operand & operand)1700   void Eor(Condition cond, Register rd, Register rn, const Operand& operand) {
1701     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1702     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1703     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1704     VIXL_ASSERT(allow_macro_instructions_);
1705     VIXL_ASSERT(OutsideITBlock());
1706     MacroEmissionCheckScope guard(this);
1707     if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
1708       uint32_t immediate = operand.GetImmediate();
1709       if (immediate == 0) {
1710         return;
1711       }
1712       if (immediate == 0xffffffff) {
1713         mvn(rd, rn);
1714         return;
1715       }
1716     }
1717     bool can_use_it =
1718         // EOR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
1719         operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
1720         operand.GetBaseRegister().IsLow();
1721     ITScope it_scope(this, &cond, guard, can_use_it);
1722     eor(cond, rd, rn, operand);
1723   }
Eor(Register rd,Register rn,const Operand & operand)1724   void Eor(Register rd, Register rn, const Operand& operand) {
1725     Eor(al, rd, rn, operand);
1726   }
Eor(FlagsUpdate flags,Condition cond,Register rd,Register rn,const Operand & operand)1727   void Eor(FlagsUpdate flags,
1728            Condition cond,
1729            Register rd,
1730            Register rn,
1731            const Operand& operand) {
1732     switch (flags) {
1733       case LeaveFlags:
1734         Eor(cond, rd, rn, operand);
1735         break;
1736       case SetFlags:
1737         Eors(cond, rd, rn, operand);
1738         break;
1739       case DontCare:
1740         bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
1741                                    rn.Is(rd) && operand.IsPlainRegister() &&
1742                                    operand.GetBaseRegister().IsLow();
1743         if (setflags_is_smaller) {
1744           Eors(cond, rd, rn, operand);
1745         } else {
1746           Eor(cond, rd, rn, operand);
1747         }
1748         break;
1749     }
1750   }
Eor(FlagsUpdate flags,Register rd,Register rn,const Operand & operand)1751   void Eor(FlagsUpdate flags,
1752            Register rd,
1753            Register rn,
1754            const Operand& operand) {
1755     Eor(flags, al, rd, rn, operand);
1756   }
1757 
Eors(Condition cond,Register rd,Register rn,const Operand & operand)1758   void Eors(Condition cond, Register rd, Register rn, const Operand& operand) {
1759     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
1760     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1761     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1762     VIXL_ASSERT(allow_macro_instructions_);
1763     VIXL_ASSERT(OutsideITBlock());
1764     MacroEmissionCheckScope guard(this);
1765     ITScope it_scope(this, &cond, guard);
1766     eors(cond, rd, rn, operand);
1767   }
Eors(Register rd,Register rn,const Operand & operand)1768   void Eors(Register rd, Register rn, const Operand& operand) {
1769     Eors(al, rd, rn, operand);
1770   }
1771 
Fldmdbx(Condition cond,Register rn,WriteBack write_back,DRegisterList dreglist)1772   void Fldmdbx(Condition cond,
1773                Register rn,
1774                WriteBack write_back,
1775                DRegisterList dreglist) {
1776     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1777     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1778     VIXL_ASSERT(allow_macro_instructions_);
1779     VIXL_ASSERT(OutsideITBlock());
1780     MacroEmissionCheckScope guard(this);
1781     ITScope it_scope(this, &cond, guard);
1782     fldmdbx(cond, rn, write_back, dreglist);
1783   }
Fldmdbx(Register rn,WriteBack write_back,DRegisterList dreglist)1784   void Fldmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1785     Fldmdbx(al, rn, write_back, dreglist);
1786   }
1787 
Fldmiax(Condition cond,Register rn,WriteBack write_back,DRegisterList dreglist)1788   void Fldmiax(Condition cond,
1789                Register rn,
1790                WriteBack write_back,
1791                DRegisterList dreglist) {
1792     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1793     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1794     VIXL_ASSERT(allow_macro_instructions_);
1795     VIXL_ASSERT(OutsideITBlock());
1796     MacroEmissionCheckScope guard(this);
1797     ITScope it_scope(this, &cond, guard);
1798     fldmiax(cond, rn, write_back, dreglist);
1799   }
Fldmiax(Register rn,WriteBack write_back,DRegisterList dreglist)1800   void Fldmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1801     Fldmiax(al, rn, write_back, dreglist);
1802   }
1803 
Fstmdbx(Condition cond,Register rn,WriteBack write_back,DRegisterList dreglist)1804   void Fstmdbx(Condition cond,
1805                Register rn,
1806                WriteBack write_back,
1807                DRegisterList dreglist) {
1808     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1809     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1810     VIXL_ASSERT(allow_macro_instructions_);
1811     VIXL_ASSERT(OutsideITBlock());
1812     MacroEmissionCheckScope guard(this);
1813     ITScope it_scope(this, &cond, guard);
1814     fstmdbx(cond, rn, write_back, dreglist);
1815   }
Fstmdbx(Register rn,WriteBack write_back,DRegisterList dreglist)1816   void Fstmdbx(Register rn, WriteBack write_back, DRegisterList dreglist) {
1817     Fstmdbx(al, rn, write_back, dreglist);
1818   }
1819 
Fstmiax(Condition cond,Register rn,WriteBack write_back,DRegisterList dreglist)1820   void Fstmiax(Condition cond,
1821                Register rn,
1822                WriteBack write_back,
1823                DRegisterList dreglist) {
1824     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1825     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
1826     VIXL_ASSERT(allow_macro_instructions_);
1827     VIXL_ASSERT(OutsideITBlock());
1828     MacroEmissionCheckScope guard(this);
1829     ITScope it_scope(this, &cond, guard);
1830     fstmiax(cond, rn, write_back, dreglist);
1831   }
Fstmiax(Register rn,WriteBack write_back,DRegisterList dreglist)1832   void Fstmiax(Register rn, WriteBack write_back, DRegisterList dreglist) {
1833     Fstmiax(al, rn, write_back, dreglist);
1834   }
1835 
Hlt(Condition cond,uint32_t imm)1836   void Hlt(Condition cond, uint32_t imm) {
1837     VIXL_ASSERT(allow_macro_instructions_);
1838     VIXL_ASSERT(OutsideITBlock());
1839     MacroEmissionCheckScope guard(this);
1840     ITScope it_scope(this, &cond, guard);
1841     hlt(cond, imm);
1842   }
Hlt(uint32_t imm)1843   void Hlt(uint32_t imm) { Hlt(al, imm); }
1844 
Hvc(Condition cond,uint32_t imm)1845   void Hvc(Condition cond, uint32_t imm) {
1846     VIXL_ASSERT(allow_macro_instructions_);
1847     VIXL_ASSERT(OutsideITBlock());
1848     MacroEmissionCheckScope guard(this);
1849     ITScope it_scope(this, &cond, guard);
1850     hvc(cond, imm);
1851   }
Hvc(uint32_t imm)1852   void Hvc(uint32_t imm) { Hvc(al, imm); }
1853 
Isb(Condition cond,MemoryBarrier option)1854   void Isb(Condition cond, MemoryBarrier option) {
1855     VIXL_ASSERT(allow_macro_instructions_);
1856     VIXL_ASSERT(OutsideITBlock());
1857     MacroEmissionCheckScope guard(this);
1858     ITScope it_scope(this, &cond, guard);
1859     isb(cond, option);
1860   }
Isb(MemoryBarrier option)1861   void Isb(MemoryBarrier option) { Isb(al, option); }
1862 
Lda(Condition cond,Register rt,const MemOperand & operand)1863   void Lda(Condition cond, Register rt, const MemOperand& operand) {
1864     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1865     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1866     VIXL_ASSERT(allow_macro_instructions_);
1867     VIXL_ASSERT(OutsideITBlock());
1868     MacroEmissionCheckScope guard(this);
1869     ITScope it_scope(this, &cond, guard);
1870     lda(cond, rt, operand);
1871   }
Lda(Register rt,const MemOperand & operand)1872   void Lda(Register rt, const MemOperand& operand) { Lda(al, rt, operand); }
1873 
Ldab(Condition cond,Register rt,const MemOperand & operand)1874   void Ldab(Condition cond, Register rt, const MemOperand& operand) {
1875     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1876     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1877     VIXL_ASSERT(allow_macro_instructions_);
1878     VIXL_ASSERT(OutsideITBlock());
1879     MacroEmissionCheckScope guard(this);
1880     ITScope it_scope(this, &cond, guard);
1881     ldab(cond, rt, operand);
1882   }
Ldab(Register rt,const MemOperand & operand)1883   void Ldab(Register rt, const MemOperand& operand) { Ldab(al, rt, operand); }
1884 
Ldaex(Condition cond,Register rt,const MemOperand & operand)1885   void Ldaex(Condition cond, Register rt, const MemOperand& operand) {
1886     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1887     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1888     VIXL_ASSERT(allow_macro_instructions_);
1889     VIXL_ASSERT(OutsideITBlock());
1890     MacroEmissionCheckScope guard(this);
1891     ITScope it_scope(this, &cond, guard);
1892     ldaex(cond, rt, operand);
1893   }
Ldaex(Register rt,const MemOperand & operand)1894   void Ldaex(Register rt, const MemOperand& operand) { Ldaex(al, rt, operand); }
1895 
Ldaexb(Condition cond,Register rt,const MemOperand & operand)1896   void Ldaexb(Condition cond, Register rt, const MemOperand& operand) {
1897     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1898     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1899     VIXL_ASSERT(allow_macro_instructions_);
1900     VIXL_ASSERT(OutsideITBlock());
1901     MacroEmissionCheckScope guard(this);
1902     ITScope it_scope(this, &cond, guard);
1903     ldaexb(cond, rt, operand);
1904   }
Ldaexb(Register rt,const MemOperand & operand)1905   void Ldaexb(Register rt, const MemOperand& operand) {
1906     Ldaexb(al, rt, operand);
1907   }
1908 
Ldaexd(Condition cond,Register rt,Register rt2,const MemOperand & operand)1909   void Ldaexd(Condition cond,
1910               Register rt,
1911               Register rt2,
1912               const MemOperand& operand) {
1913     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1914     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
1915     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1916     VIXL_ASSERT(allow_macro_instructions_);
1917     VIXL_ASSERT(OutsideITBlock());
1918     MacroEmissionCheckScope guard(this);
1919     ITScope it_scope(this, &cond, guard);
1920     ldaexd(cond, rt, rt2, operand);
1921   }
Ldaexd(Register rt,Register rt2,const MemOperand & operand)1922   void Ldaexd(Register rt, Register rt2, const MemOperand& operand) {
1923     Ldaexd(al, rt, rt2, operand);
1924   }
1925 
Ldaexh(Condition cond,Register rt,const MemOperand & operand)1926   void Ldaexh(Condition cond, Register rt, const MemOperand& operand) {
1927     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1928     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1929     VIXL_ASSERT(allow_macro_instructions_);
1930     VIXL_ASSERT(OutsideITBlock());
1931     MacroEmissionCheckScope guard(this);
1932     ITScope it_scope(this, &cond, guard);
1933     ldaexh(cond, rt, operand);
1934   }
Ldaexh(Register rt,const MemOperand & operand)1935   void Ldaexh(Register rt, const MemOperand& operand) {
1936     Ldaexh(al, rt, operand);
1937   }
1938 
Ldah(Condition cond,Register rt,const MemOperand & operand)1939   void Ldah(Condition cond, Register rt, const MemOperand& operand) {
1940     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
1941     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
1942     VIXL_ASSERT(allow_macro_instructions_);
1943     VIXL_ASSERT(OutsideITBlock());
1944     MacroEmissionCheckScope guard(this);
1945     ITScope it_scope(this, &cond, guard);
1946     ldah(cond, rt, operand);
1947   }
Ldah(Register rt,const MemOperand & operand)1948   void Ldah(Register rt, const MemOperand& operand) { Ldah(al, rt, operand); }
1949 
Ldm(Condition cond,Register rn,WriteBack write_back,RegisterList registers)1950   void Ldm(Condition cond,
1951            Register rn,
1952            WriteBack write_back,
1953            RegisterList registers) {
1954     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1955     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1956     VIXL_ASSERT(allow_macro_instructions_);
1957     VIXL_ASSERT(OutsideITBlock());
1958     MacroEmissionCheckScope guard(this);
1959     ITScope it_scope(this, &cond, guard);
1960     ldm(cond, rn, write_back, registers);
1961   }
Ldm(Register rn,WriteBack write_back,RegisterList registers)1962   void Ldm(Register rn, WriteBack write_back, RegisterList registers) {
1963     Ldm(al, rn, write_back, registers);
1964   }
1965 
Ldmda(Condition cond,Register rn,WriteBack write_back,RegisterList registers)1966   void Ldmda(Condition cond,
1967              Register rn,
1968              WriteBack write_back,
1969              RegisterList registers) {
1970     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1971     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1972     VIXL_ASSERT(allow_macro_instructions_);
1973     VIXL_ASSERT(OutsideITBlock());
1974     MacroEmissionCheckScope guard(this);
1975     ITScope it_scope(this, &cond, guard);
1976     ldmda(cond, rn, write_back, registers);
1977   }
Ldmda(Register rn,WriteBack write_back,RegisterList registers)1978   void Ldmda(Register rn, WriteBack write_back, RegisterList registers) {
1979     Ldmda(al, rn, write_back, registers);
1980   }
1981 
Ldmdb(Condition cond,Register rn,WriteBack write_back,RegisterList registers)1982   void Ldmdb(Condition cond,
1983              Register rn,
1984              WriteBack write_back,
1985              RegisterList registers) {
1986     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
1987     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
1988     VIXL_ASSERT(allow_macro_instructions_);
1989     VIXL_ASSERT(OutsideITBlock());
1990     MacroEmissionCheckScope guard(this);
1991     ITScope it_scope(this, &cond, guard);
1992     ldmdb(cond, rn, write_back, registers);
1993   }
Ldmdb(Register rn,WriteBack write_back,RegisterList registers)1994   void Ldmdb(Register rn, WriteBack write_back, RegisterList registers) {
1995     Ldmdb(al, rn, write_back, registers);
1996   }
1997 
Ldmea(Condition cond,Register rn,WriteBack write_back,RegisterList registers)1998   void Ldmea(Condition cond,
1999              Register rn,
2000              WriteBack write_back,
2001              RegisterList registers) {
2002     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2003     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2004     VIXL_ASSERT(allow_macro_instructions_);
2005     VIXL_ASSERT(OutsideITBlock());
2006     MacroEmissionCheckScope guard(this);
2007     ITScope it_scope(this, &cond, guard);
2008     ldmea(cond, rn, write_back, registers);
2009   }
Ldmea(Register rn,WriteBack write_back,RegisterList registers)2010   void Ldmea(Register rn, WriteBack write_back, RegisterList registers) {
2011     Ldmea(al, rn, write_back, registers);
2012   }
2013 
Ldmed(Condition cond,Register rn,WriteBack write_back,RegisterList registers)2014   void Ldmed(Condition cond,
2015              Register rn,
2016              WriteBack write_back,
2017              RegisterList registers) {
2018     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2019     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2020     VIXL_ASSERT(allow_macro_instructions_);
2021     VIXL_ASSERT(OutsideITBlock());
2022     MacroEmissionCheckScope guard(this);
2023     ITScope it_scope(this, &cond, guard);
2024     ldmed(cond, rn, write_back, registers);
2025   }
Ldmed(Register rn,WriteBack write_back,RegisterList registers)2026   void Ldmed(Register rn, WriteBack write_back, RegisterList registers) {
2027     Ldmed(al, rn, write_back, registers);
2028   }
2029 
Ldmfa(Condition cond,Register rn,WriteBack write_back,RegisterList registers)2030   void Ldmfa(Condition cond,
2031              Register rn,
2032              WriteBack write_back,
2033              RegisterList registers) {
2034     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2035     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2036     VIXL_ASSERT(allow_macro_instructions_);
2037     VIXL_ASSERT(OutsideITBlock());
2038     MacroEmissionCheckScope guard(this);
2039     ITScope it_scope(this, &cond, guard);
2040     ldmfa(cond, rn, write_back, registers);
2041   }
Ldmfa(Register rn,WriteBack write_back,RegisterList registers)2042   void Ldmfa(Register rn, WriteBack write_back, RegisterList registers) {
2043     Ldmfa(al, rn, write_back, registers);
2044   }
2045 
Ldmfd(Condition cond,Register rn,WriteBack write_back,RegisterList registers)2046   void Ldmfd(Condition cond,
2047              Register rn,
2048              WriteBack write_back,
2049              RegisterList registers) {
2050     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2051     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2052     VIXL_ASSERT(allow_macro_instructions_);
2053     VIXL_ASSERT(OutsideITBlock());
2054     MacroEmissionCheckScope guard(this);
2055     ITScope it_scope(this, &cond, guard);
2056     ldmfd(cond, rn, write_back, registers);
2057   }
Ldmfd(Register rn,WriteBack write_back,RegisterList registers)2058   void Ldmfd(Register rn, WriteBack write_back, RegisterList registers) {
2059     Ldmfd(al, rn, write_back, registers);
2060   }
2061 
Ldmib(Condition cond,Register rn,WriteBack write_back,RegisterList registers)2062   void Ldmib(Condition cond,
2063              Register rn,
2064              WriteBack write_back,
2065              RegisterList registers) {
2066     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2067     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2068     VIXL_ASSERT(allow_macro_instructions_);
2069     VIXL_ASSERT(OutsideITBlock());
2070     MacroEmissionCheckScope guard(this);
2071     ITScope it_scope(this, &cond, guard);
2072     ldmib(cond, rn, write_back, registers);
2073   }
Ldmib(Register rn,WriteBack write_back,RegisterList registers)2074   void Ldmib(Register rn, WriteBack write_back, RegisterList registers) {
2075     Ldmib(al, rn, write_back, registers);
2076   }
2077 
Ldr(Condition cond,Register rt,const MemOperand & operand)2078   void Ldr(Condition cond, Register rt, const MemOperand& operand) {
2079     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2080     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2081     VIXL_ASSERT(allow_macro_instructions_);
2082     VIXL_ASSERT(OutsideITBlock());
2083     MacroEmissionCheckScope guard(this);
2084     bool can_use_it =
2085         // LDR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2086         (operand.IsImmediate() && rt.IsLow() &&
2087          operand.GetBaseRegister().IsLow() &&
2088          operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
2089          (operand.GetAddrMode() == Offset)) ||
2090         // LDR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
2091         (operand.IsImmediate() && rt.IsLow() &&
2092          operand.GetBaseRegister().IsSP() &&
2093          operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
2094          (operand.GetAddrMode() == Offset)) ||
2095         // LDR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2096         (operand.IsPlainRegister() && rt.IsLow() &&
2097          operand.GetBaseRegister().IsLow() &&
2098          operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2099          (operand.GetAddrMode() == Offset));
2100     ITScope it_scope(this, &cond, guard, can_use_it);
2101     ldr(cond, rt, operand);
2102   }
Ldr(Register rt,const MemOperand & operand)2103   void Ldr(Register rt, const MemOperand& operand) { Ldr(al, rt, operand); }
2104 
2105 
Ldrb(Condition cond,Register rt,const MemOperand & operand)2106   void Ldrb(Condition cond, Register rt, const MemOperand& operand) {
2107     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2108     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2109     VIXL_ASSERT(allow_macro_instructions_);
2110     VIXL_ASSERT(OutsideITBlock());
2111     MacroEmissionCheckScope guard(this);
2112     bool can_use_it =
2113         // LDRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2114         (operand.IsImmediate() && rt.IsLow() &&
2115          operand.GetBaseRegister().IsLow() &&
2116          operand.IsOffsetImmediateWithinRange(0, 31) &&
2117          (operand.GetAddrMode() == Offset)) ||
2118         // LDRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2119         (operand.IsPlainRegister() && rt.IsLow() &&
2120          operand.GetBaseRegister().IsLow() &&
2121          operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2122          (operand.GetAddrMode() == Offset));
2123     ITScope it_scope(this, &cond, guard, can_use_it);
2124     ldrb(cond, rt, operand);
2125   }
Ldrb(Register rt,const MemOperand & operand)2126   void Ldrb(Register rt, const MemOperand& operand) { Ldrb(al, rt, operand); }
2127 
2128 
Ldrd(Condition cond,Register rt,Register rt2,const MemOperand & operand)2129   void Ldrd(Condition cond,
2130             Register rt,
2131             Register rt2,
2132             const MemOperand& operand) {
2133     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2134     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2135     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2136     VIXL_ASSERT(allow_macro_instructions_);
2137     VIXL_ASSERT(OutsideITBlock());
2138     MacroEmissionCheckScope guard(this);
2139     ITScope it_scope(this, &cond, guard);
2140     ldrd(cond, rt, rt2, operand);
2141   }
Ldrd(Register rt,Register rt2,const MemOperand & operand)2142   void Ldrd(Register rt, Register rt2, const MemOperand& operand) {
2143     Ldrd(al, rt, rt2, operand);
2144   }
2145 
2146 
Ldrex(Condition cond,Register rt,const MemOperand & operand)2147   void Ldrex(Condition cond, Register rt, const MemOperand& operand) {
2148     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2149     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2150     VIXL_ASSERT(allow_macro_instructions_);
2151     VIXL_ASSERT(OutsideITBlock());
2152     MacroEmissionCheckScope guard(this);
2153     ITScope it_scope(this, &cond, guard);
2154     ldrex(cond, rt, operand);
2155   }
Ldrex(Register rt,const MemOperand & operand)2156   void Ldrex(Register rt, const MemOperand& operand) { Ldrex(al, rt, operand); }
2157 
Ldrexb(Condition cond,Register rt,const MemOperand & operand)2158   void Ldrexb(Condition cond, Register rt, const MemOperand& operand) {
2159     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2160     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2161     VIXL_ASSERT(allow_macro_instructions_);
2162     VIXL_ASSERT(OutsideITBlock());
2163     MacroEmissionCheckScope guard(this);
2164     ITScope it_scope(this, &cond, guard);
2165     ldrexb(cond, rt, operand);
2166   }
Ldrexb(Register rt,const MemOperand & operand)2167   void Ldrexb(Register rt, const MemOperand& operand) {
2168     Ldrexb(al, rt, operand);
2169   }
2170 
Ldrexd(Condition cond,Register rt,Register rt2,const MemOperand & operand)2171   void Ldrexd(Condition cond,
2172               Register rt,
2173               Register rt2,
2174               const MemOperand& operand) {
2175     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2176     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
2177     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2178     VIXL_ASSERT(allow_macro_instructions_);
2179     VIXL_ASSERT(OutsideITBlock());
2180     MacroEmissionCheckScope guard(this);
2181     ITScope it_scope(this, &cond, guard);
2182     ldrexd(cond, rt, rt2, operand);
2183   }
Ldrexd(Register rt,Register rt2,const MemOperand & operand)2184   void Ldrexd(Register rt, Register rt2, const MemOperand& operand) {
2185     Ldrexd(al, rt, rt2, operand);
2186   }
2187 
Ldrexh(Condition cond,Register rt,const MemOperand & operand)2188   void Ldrexh(Condition cond, Register rt, const MemOperand& operand) {
2189     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2190     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2191     VIXL_ASSERT(allow_macro_instructions_);
2192     VIXL_ASSERT(OutsideITBlock());
2193     MacroEmissionCheckScope guard(this);
2194     ITScope it_scope(this, &cond, guard);
2195     ldrexh(cond, rt, operand);
2196   }
Ldrexh(Register rt,const MemOperand & operand)2197   void Ldrexh(Register rt, const MemOperand& operand) {
2198     Ldrexh(al, rt, operand);
2199   }
2200 
Ldrh(Condition cond,Register rt,const MemOperand & operand)2201   void Ldrh(Condition cond, Register rt, const MemOperand& operand) {
2202     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2203     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2204     VIXL_ASSERT(allow_macro_instructions_);
2205     VIXL_ASSERT(OutsideITBlock());
2206     MacroEmissionCheckScope guard(this);
2207     bool can_use_it =
2208         // LDRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
2209         (operand.IsImmediate() && rt.IsLow() &&
2210          operand.GetBaseRegister().IsLow() &&
2211          operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
2212          (operand.GetAddrMode() == Offset)) ||
2213         // LDRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2214         (operand.IsPlainRegister() && rt.IsLow() &&
2215          operand.GetBaseRegister().IsLow() &&
2216          operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2217          (operand.GetAddrMode() == Offset));
2218     ITScope it_scope(this, &cond, guard, can_use_it);
2219     ldrh(cond, rt, operand);
2220   }
Ldrh(Register rt,const MemOperand & operand)2221   void Ldrh(Register rt, const MemOperand& operand) { Ldrh(al, rt, operand); }
2222 
2223 
Ldrsb(Condition cond,Register rt,const MemOperand & operand)2224   void Ldrsb(Condition cond, Register rt, const MemOperand& operand) {
2225     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2226     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2227     VIXL_ASSERT(allow_macro_instructions_);
2228     VIXL_ASSERT(OutsideITBlock());
2229     MacroEmissionCheckScope guard(this);
2230     bool can_use_it =
2231         // LDRSB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2232         operand.IsPlainRegister() && rt.IsLow() &&
2233         operand.GetBaseRegister().IsLow() &&
2234         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2235         (operand.GetAddrMode() == Offset);
2236     ITScope it_scope(this, &cond, guard, can_use_it);
2237     ldrsb(cond, rt, operand);
2238   }
Ldrsb(Register rt,const MemOperand & operand)2239   void Ldrsb(Register rt, const MemOperand& operand) { Ldrsb(al, rt, operand); }
2240 
2241 
Ldrsh(Condition cond,Register rt,const MemOperand & operand)2242   void Ldrsh(Condition cond, Register rt, const MemOperand& operand) {
2243     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2244     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2245     VIXL_ASSERT(allow_macro_instructions_);
2246     VIXL_ASSERT(OutsideITBlock());
2247     MacroEmissionCheckScope guard(this);
2248     bool can_use_it =
2249         // LDRSH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
2250         operand.IsPlainRegister() && rt.IsLow() &&
2251         operand.GetBaseRegister().IsLow() &&
2252         operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
2253         (operand.GetAddrMode() == Offset);
2254     ITScope it_scope(this, &cond, guard, can_use_it);
2255     ldrsh(cond, rt, operand);
2256   }
Ldrsh(Register rt,const MemOperand & operand)2257   void Ldrsh(Register rt, const MemOperand& operand) { Ldrsh(al, rt, operand); }
2258 
2259 
Lsl(Condition cond,Register rd,Register rm,const Operand & operand)2260   void Lsl(Condition cond, Register rd, Register rm, const Operand& operand) {
2261     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2262     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2263     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2264     VIXL_ASSERT(allow_macro_instructions_);
2265     VIXL_ASSERT(OutsideITBlock());
2266     MacroEmissionCheckScope guard(this);
2267     bool can_use_it =
2268         // LSL<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2269         (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2270          (operand.GetImmediate() <= 31) && rd.IsLow() && rm.IsLow()) ||
2271         // LSL<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2272         (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2273          operand.GetBaseRegister().IsLow());
2274     ITScope it_scope(this, &cond, guard, can_use_it);
2275     lsl(cond, rd, rm, operand);
2276   }
Lsl(Register rd,Register rm,const Operand & operand)2277   void Lsl(Register rd, Register rm, const Operand& operand) {
2278     Lsl(al, rd, rm, operand);
2279   }
Lsl(FlagsUpdate flags,Condition cond,Register rd,Register rm,const Operand & operand)2280   void Lsl(FlagsUpdate flags,
2281            Condition cond,
2282            Register rd,
2283            Register rm,
2284            const Operand& operand) {
2285     switch (flags) {
2286       case LeaveFlags:
2287         Lsl(cond, rd, rm, operand);
2288         break;
2289       case SetFlags:
2290         Lsls(cond, rd, rm, operand);
2291         break;
2292       case DontCare:
2293         bool setflags_is_smaller =
2294             IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2295             ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2296               (operand.GetImmediate() < 32)) ||
2297              (operand.IsPlainRegister() && rd.Is(rm)));
2298         if (setflags_is_smaller) {
2299           Lsls(cond, rd, rm, operand);
2300         } else {
2301           Lsl(cond, rd, rm, operand);
2302         }
2303         break;
2304     }
2305   }
Lsl(FlagsUpdate flags,Register rd,Register rm,const Operand & operand)2306   void Lsl(FlagsUpdate flags,
2307            Register rd,
2308            Register rm,
2309            const Operand& operand) {
2310     Lsl(flags, al, rd, rm, operand);
2311   }
2312 
Lsls(Condition cond,Register rd,Register rm,const Operand & operand)2313   void Lsls(Condition cond, Register rd, Register rm, const Operand& operand) {
2314     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2315     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2316     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2317     VIXL_ASSERT(allow_macro_instructions_);
2318     VIXL_ASSERT(OutsideITBlock());
2319     MacroEmissionCheckScope guard(this);
2320     ITScope it_scope(this, &cond, guard);
2321     lsls(cond, rd, rm, operand);
2322   }
Lsls(Register rd,Register rm,const Operand & operand)2323   void Lsls(Register rd, Register rm, const Operand& operand) {
2324     Lsls(al, rd, rm, operand);
2325   }
2326 
Lsr(Condition cond,Register rd,Register rm,const Operand & operand)2327   void Lsr(Condition cond, Register rd, Register rm, const Operand& operand) {
2328     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2329     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2330     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2331     VIXL_ASSERT(allow_macro_instructions_);
2332     VIXL_ASSERT(OutsideITBlock());
2333     MacroEmissionCheckScope guard(this);
2334     bool can_use_it =
2335         // LSR<c>{<q>} {<Rd>,} <Rm>, #<imm> ; T2
2336         (operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2337          (operand.GetImmediate() <= 32) && rd.IsLow() && rm.IsLow()) ||
2338         // LSR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
2339         (operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
2340          operand.GetBaseRegister().IsLow());
2341     ITScope it_scope(this, &cond, guard, can_use_it);
2342     lsr(cond, rd, rm, operand);
2343   }
Lsr(Register rd,Register rm,const Operand & operand)2344   void Lsr(Register rd, Register rm, const Operand& operand) {
2345     Lsr(al, rd, rm, operand);
2346   }
Lsr(FlagsUpdate flags,Condition cond,Register rd,Register rm,const Operand & operand)2347   void Lsr(FlagsUpdate flags,
2348            Condition cond,
2349            Register rd,
2350            Register rm,
2351            const Operand& operand) {
2352     switch (flags) {
2353       case LeaveFlags:
2354         Lsr(cond, rd, rm, operand);
2355         break;
2356       case SetFlags:
2357         Lsrs(cond, rd, rm, operand);
2358         break;
2359       case DontCare:
2360         bool setflags_is_smaller =
2361             IsUsingT32() && cond.Is(al) && rd.IsLow() && rm.IsLow() &&
2362             ((operand.IsImmediate() && (operand.GetImmediate() >= 1) &&
2363               (operand.GetImmediate() <= 32)) ||
2364              (operand.IsPlainRegister() && rd.Is(rm)));
2365         if (setflags_is_smaller) {
2366           Lsrs(cond, rd, rm, operand);
2367         } else {
2368           Lsr(cond, rd, rm, operand);
2369         }
2370         break;
2371     }
2372   }
Lsr(FlagsUpdate flags,Register rd,Register rm,const Operand & operand)2373   void Lsr(FlagsUpdate flags,
2374            Register rd,
2375            Register rm,
2376            const Operand& operand) {
2377     Lsr(flags, al, rd, rm, operand);
2378   }
2379 
Lsrs(Condition cond,Register rd,Register rm,const Operand & operand)2380   void Lsrs(Condition cond, Register rd, Register rm, const Operand& operand) {
2381     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2382     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2383     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2384     VIXL_ASSERT(allow_macro_instructions_);
2385     VIXL_ASSERT(OutsideITBlock());
2386     MacroEmissionCheckScope guard(this);
2387     ITScope it_scope(this, &cond, guard);
2388     lsrs(cond, rd, rm, operand);
2389   }
Lsrs(Register rd,Register rm,const Operand & operand)2390   void Lsrs(Register rd, Register rm, const Operand& operand) {
2391     Lsrs(al, rd, rm, operand);
2392   }
2393 
Mla(Condition cond,Register rd,Register rn,Register rm,Register ra)2394   void Mla(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2395     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2396     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2397     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2398     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2399     VIXL_ASSERT(allow_macro_instructions_);
2400     VIXL_ASSERT(OutsideITBlock());
2401     MacroEmissionCheckScope guard(this);
2402     ITScope it_scope(this, &cond, guard);
2403     mla(cond, rd, rn, rm, ra);
2404   }
Mla(Register rd,Register rn,Register rm,Register ra)2405   void Mla(Register rd, Register rn, Register rm, Register ra) {
2406     Mla(al, rd, rn, rm, ra);
2407   }
Mla(FlagsUpdate flags,Condition cond,Register rd,Register rn,Register rm,Register ra)2408   void Mla(FlagsUpdate flags,
2409            Condition cond,
2410            Register rd,
2411            Register rn,
2412            Register rm,
2413            Register ra) {
2414     switch (flags) {
2415       case LeaveFlags:
2416         Mla(cond, rd, rn, rm, ra);
2417         break;
2418       case SetFlags:
2419         Mlas(cond, rd, rn, rm, ra);
2420         break;
2421       case DontCare:
2422         Mla(cond, rd, rn, rm, ra);
2423         break;
2424     }
2425   }
Mla(FlagsUpdate flags,Register rd,Register rn,Register rm,Register ra)2426   void Mla(
2427       FlagsUpdate flags, Register rd, Register rn, Register rm, Register ra) {
2428     Mla(flags, al, rd, rn, rm, ra);
2429   }
2430 
Mlas(Condition cond,Register rd,Register rn,Register rm,Register ra)2431   void Mlas(
2432       Condition cond, Register rd, Register rn, Register rm, Register ra) {
2433     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2434     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2435     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2436     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2437     VIXL_ASSERT(allow_macro_instructions_);
2438     VIXL_ASSERT(OutsideITBlock());
2439     MacroEmissionCheckScope guard(this);
2440     ITScope it_scope(this, &cond, guard);
2441     mlas(cond, rd, rn, rm, ra);
2442   }
Mlas(Register rd,Register rn,Register rm,Register ra)2443   void Mlas(Register rd, Register rn, Register rm, Register ra) {
2444     Mlas(al, rd, rn, rm, ra);
2445   }
2446 
Mls(Condition cond,Register rd,Register rn,Register rm,Register ra)2447   void Mls(Condition cond, Register rd, Register rn, Register rm, Register ra) {
2448     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2449     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2450     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2451     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
2452     VIXL_ASSERT(allow_macro_instructions_);
2453     VIXL_ASSERT(OutsideITBlock());
2454     MacroEmissionCheckScope guard(this);
2455     ITScope it_scope(this, &cond, guard);
2456     mls(cond, rd, rn, rm, ra);
2457   }
Mls(Register rd,Register rn,Register rm,Register ra)2458   void Mls(Register rd, Register rn, Register rm, Register ra) {
2459     Mls(al, rd, rn, rm, ra);
2460   }
2461 
Mov(Condition cond,Register rd,const Operand & operand)2462   void Mov(Condition cond, Register rd, const Operand& operand) {
2463     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2464     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2465     VIXL_ASSERT(allow_macro_instructions_);
2466     VIXL_ASSERT(OutsideITBlock());
2467     MacroEmissionCheckScope guard(this);
2468     if (operand.IsPlainRegister() && rd.Is(operand.GetBaseRegister())) {
2469       return;
2470     }
2471     bool can_use_it =
2472         // MOV<c>{<q>} <Rd>, #<imm8> ; T1
2473         (operand.IsImmediate() && rd.IsLow() &&
2474          (operand.GetImmediate() <= 255)) ||
2475         // MOV{<c>}{<q>} <Rd>, <Rm> ; T1
2476         (operand.IsPlainRegister() && !rd.IsPC() &&
2477          !operand.GetBaseRegister().IsPC()) ||
2478         // MOV<c>{<q>} <Rd>, <Rm> {, <shift> #<amount>} ; T2
2479         (operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2480          operand.GetBaseRegister().IsLow() &&
2481          (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2482           operand.GetShift().Is(ASR))) ||
2483         // MOV<c>{<q>} <Rdm>, <Rdm>, LSL <Rs> ; T1
2484         // MOV<c>{<q>} <Rdm>, <Rdm>, LSR <Rs> ; T1
2485         // MOV<c>{<q>} <Rdm>, <Rdm>, ASR <Rs> ; T1
2486         // MOV<c>{<q>} <Rdm>, <Rdm>, ROR <Rs> ; T1
2487         (operand.IsRegisterShiftedRegister() &&
2488          rd.Is(operand.GetBaseRegister()) && rd.IsLow() &&
2489          (operand.GetShift().Is(LSL) || operand.GetShift().Is(LSR) ||
2490           operand.GetShift().Is(ASR) || operand.GetShift().Is(ROR)) &&
2491          operand.GetShiftRegister().IsLow());
2492     ITScope it_scope(this, &cond, guard, can_use_it);
2493     mov(cond, rd, operand);
2494   }
Mov(Register rd,const Operand & operand)2495   void Mov(Register rd, const Operand& operand) { Mov(al, rd, operand); }
Mov(FlagsUpdate flags,Condition cond,Register rd,const Operand & operand)2496   void Mov(FlagsUpdate flags,
2497            Condition cond,
2498            Register rd,
2499            const Operand& operand) {
2500     switch (flags) {
2501       case LeaveFlags:
2502         Mov(cond, rd, operand);
2503         break;
2504       case SetFlags:
2505         Movs(cond, rd, operand);
2506         break;
2507       case DontCare:
2508         if (operand.IsPlainRegister() && rd.Is(operand.GetBaseRegister())) {
2509           return;
2510         }
2511         bool setflags_is_smaller =
2512             IsUsingT32() && cond.Is(al) &&
2513             ((operand.IsImmediateShiftedRegister() && rd.IsLow() &&
2514               operand.GetBaseRegister().IsLow() &&
2515               (operand.GetShiftAmount() >= 1) &&
2516               (((operand.GetShiftAmount() <= 32) &&
2517                 ((operand.GetShift().IsLSR() || operand.GetShift().IsASR()))) ||
2518                ((operand.GetShiftAmount() < 32) &&
2519                 operand.GetShift().IsLSL()))) ||
2520              (operand.IsRegisterShiftedRegister() && rd.IsLow() &&
2521               operand.GetBaseRegister().Is(rd) &&
2522               operand.GetShiftRegister().IsLow() &&
2523               (operand.GetShift().IsLSL() || operand.GetShift().IsLSR() ||
2524                operand.GetShift().IsASR() || operand.GetShift().IsROR())) ||
2525              (operand.IsImmediate() && rd.IsLow() &&
2526               (operand.GetImmediate() < 256)));
2527         if (setflags_is_smaller) {
2528           Movs(cond, rd, operand);
2529         } else {
2530           Mov(cond, rd, operand);
2531         }
2532         break;
2533     }
2534   }
Mov(FlagsUpdate flags,Register rd,const Operand & operand)2535   void Mov(FlagsUpdate flags, Register rd, const Operand& operand) {
2536     Mov(flags, al, rd, operand);
2537   }
2538 
Movs(Condition cond,Register rd,const Operand & operand)2539   void Movs(Condition cond, Register rd, const Operand& operand) {
2540     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2541     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2542     VIXL_ASSERT(allow_macro_instructions_);
2543     VIXL_ASSERT(OutsideITBlock());
2544     MacroEmissionCheckScope guard(this);
2545     ITScope it_scope(this, &cond, guard);
2546     movs(cond, rd, operand);
2547   }
Movs(Register rd,const Operand & operand)2548   void Movs(Register rd, const Operand& operand) { Movs(al, rd, operand); }
2549 
Movt(Condition cond,Register rd,const Operand & operand)2550   void Movt(Condition cond, Register rd, const Operand& operand) {
2551     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2552     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2553     VIXL_ASSERT(allow_macro_instructions_);
2554     VIXL_ASSERT(OutsideITBlock());
2555     MacroEmissionCheckScope guard(this);
2556     ITScope it_scope(this, &cond, guard);
2557     movt(cond, rd, operand);
2558   }
Movt(Register rd,const Operand & operand)2559   void Movt(Register rd, const Operand& operand) { Movt(al, rd, operand); }
2560 
Mrs(Condition cond,Register rd,SpecialRegister spec_reg)2561   void Mrs(Condition cond, Register rd, SpecialRegister spec_reg) {
2562     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2563     VIXL_ASSERT(allow_macro_instructions_);
2564     VIXL_ASSERT(OutsideITBlock());
2565     MacroEmissionCheckScope guard(this);
2566     ITScope it_scope(this, &cond, guard);
2567     mrs(cond, rd, spec_reg);
2568   }
Mrs(Register rd,SpecialRegister spec_reg)2569   void Mrs(Register rd, SpecialRegister spec_reg) { Mrs(al, rd, spec_reg); }
2570 
Msr(Condition cond,MaskedSpecialRegister spec_reg,const Operand & operand)2571   void Msr(Condition cond,
2572            MaskedSpecialRegister spec_reg,
2573            const Operand& operand) {
2574     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2575     VIXL_ASSERT(allow_macro_instructions_);
2576     VIXL_ASSERT(OutsideITBlock());
2577     MacroEmissionCheckScope guard(this);
2578     ITScope it_scope(this, &cond, guard);
2579     msr(cond, spec_reg, operand);
2580   }
Msr(MaskedSpecialRegister spec_reg,const Operand & operand)2581   void Msr(MaskedSpecialRegister spec_reg, const Operand& operand) {
2582     Msr(al, spec_reg, operand);
2583   }
2584 
Mul(Condition cond,Register rd,Register rn,Register rm)2585   void Mul(Condition cond, Register rd, Register rn, Register rm) {
2586     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2587     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2588     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2589     VIXL_ASSERT(allow_macro_instructions_);
2590     VIXL_ASSERT(OutsideITBlock());
2591     MacroEmissionCheckScope guard(this);
2592     bool can_use_it =
2593         // MUL<c>{<q>} <Rdm>, <Rn>{, <Rdm>} ; T1
2594         rd.Is(rm) && rn.IsLow() && rm.IsLow();
2595     ITScope it_scope(this, &cond, guard, can_use_it);
2596     mul(cond, rd, rn, rm);
2597   }
Mul(Register rd,Register rn,Register rm)2598   void Mul(Register rd, Register rn, Register rm) { Mul(al, rd, rn, rm); }
Mul(FlagsUpdate flags,Condition cond,Register rd,Register rn,Register rm)2599   void Mul(FlagsUpdate flags,
2600            Condition cond,
2601            Register rd,
2602            Register rn,
2603            Register rm) {
2604     switch (flags) {
2605       case LeaveFlags:
2606         Mul(cond, rd, rn, rm);
2607         break;
2608       case SetFlags:
2609         Muls(cond, rd, rn, rm);
2610         break;
2611       case DontCare:
2612         bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2613                                    rn.IsLow() && rm.Is(rd);
2614         if (setflags_is_smaller) {
2615           Muls(cond, rd, rn, rm);
2616         } else {
2617           Mul(cond, rd, rn, rm);
2618         }
2619         break;
2620     }
2621   }
Mul(FlagsUpdate flags,Register rd,Register rn,Register rm)2622   void Mul(FlagsUpdate flags, Register rd, Register rn, Register rm) {
2623     Mul(flags, al, rd, rn, rm);
2624   }
2625 
Muls(Condition cond,Register rd,Register rn,Register rm)2626   void Muls(Condition cond, Register rd, Register rn, Register rm) {
2627     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2628     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2629     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2630     VIXL_ASSERT(allow_macro_instructions_);
2631     VIXL_ASSERT(OutsideITBlock());
2632     MacroEmissionCheckScope guard(this);
2633     ITScope it_scope(this, &cond, guard);
2634     muls(cond, rd, rn, rm);
2635   }
Muls(Register rd,Register rn,Register rm)2636   void Muls(Register rd, Register rn, Register rm) { Muls(al, rd, rn, rm); }
2637 
Mvn(Condition cond,Register rd,const Operand & operand)2638   void Mvn(Condition cond, Register rd, const Operand& operand) {
2639     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2640     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2641     VIXL_ASSERT(allow_macro_instructions_);
2642     VIXL_ASSERT(OutsideITBlock());
2643     MacroEmissionCheckScope guard(this);
2644     bool can_use_it =
2645         // MVN<c>{<q>} <Rd>, <Rm> ; T1
2646         operand.IsPlainRegister() && rd.IsLow() &&
2647         operand.GetBaseRegister().IsLow();
2648     ITScope it_scope(this, &cond, guard, can_use_it);
2649     mvn(cond, rd, operand);
2650   }
Mvn(Register rd,const Operand & operand)2651   void Mvn(Register rd, const Operand& operand) { Mvn(al, rd, operand); }
Mvn(FlagsUpdate flags,Condition cond,Register rd,const Operand & operand)2652   void Mvn(FlagsUpdate flags,
2653            Condition cond,
2654            Register rd,
2655            const Operand& operand) {
2656     switch (flags) {
2657       case LeaveFlags:
2658         Mvn(cond, rd, operand);
2659         break;
2660       case SetFlags:
2661         Mvns(cond, rd, operand);
2662         break;
2663       case DontCare:
2664         bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2665                                    operand.IsPlainRegister() &&
2666                                    operand.GetBaseRegister().IsLow();
2667         if (setflags_is_smaller) {
2668           Mvns(cond, rd, operand);
2669         } else {
2670           Mvn(cond, rd, operand);
2671         }
2672         break;
2673     }
2674   }
Mvn(FlagsUpdate flags,Register rd,const Operand & operand)2675   void Mvn(FlagsUpdate flags, Register rd, const Operand& operand) {
2676     Mvn(flags, al, rd, operand);
2677   }
2678 
Mvns(Condition cond,Register rd,const Operand & operand)2679   void Mvns(Condition cond, Register rd, const Operand& operand) {
2680     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2681     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2682     VIXL_ASSERT(allow_macro_instructions_);
2683     VIXL_ASSERT(OutsideITBlock());
2684     MacroEmissionCheckScope guard(this);
2685     ITScope it_scope(this, &cond, guard);
2686     mvns(cond, rd, operand);
2687   }
Mvns(Register rd,const Operand & operand)2688   void Mvns(Register rd, const Operand& operand) { Mvns(al, rd, operand); }
2689 
Nop(Condition cond)2690   void Nop(Condition cond) {
2691     VIXL_ASSERT(allow_macro_instructions_);
2692     VIXL_ASSERT(OutsideITBlock());
2693     MacroEmissionCheckScope guard(this);
2694     ITScope it_scope(this, &cond, guard);
2695     nop(cond);
2696   }
Nop()2697   void Nop() { Nop(al); }
2698 
Orn(Condition cond,Register rd,Register rn,const Operand & operand)2699   void Orn(Condition cond, Register rd, Register rn, const Operand& operand) {
2700     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2701     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2702     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2703     VIXL_ASSERT(allow_macro_instructions_);
2704     VIXL_ASSERT(OutsideITBlock());
2705     MacroEmissionCheckScope guard(this);
2706     if (cond.Is(al) && operand.IsImmediate()) {
2707       uint32_t immediate = operand.GetImmediate();
2708       if (immediate == 0) {
2709         mvn(rd, 0);
2710         return;
2711       }
2712       if ((immediate == 0xffffffff) && rd.Is(rn)) {
2713         return;
2714       }
2715     }
2716     ITScope it_scope(this, &cond, guard);
2717     orn(cond, rd, rn, operand);
2718   }
Orn(Register rd,Register rn,const Operand & operand)2719   void Orn(Register rd, Register rn, const Operand& operand) {
2720     Orn(al, rd, rn, operand);
2721   }
Orn(FlagsUpdate flags,Condition cond,Register rd,Register rn,const Operand & operand)2722   void Orn(FlagsUpdate flags,
2723            Condition cond,
2724            Register rd,
2725            Register rn,
2726            const Operand& operand) {
2727     switch (flags) {
2728       case LeaveFlags:
2729         Orn(cond, rd, rn, operand);
2730         break;
2731       case SetFlags:
2732         Orns(cond, rd, rn, operand);
2733         break;
2734       case DontCare:
2735         Orn(cond, rd, rn, operand);
2736         break;
2737     }
2738   }
Orn(FlagsUpdate flags,Register rd,Register rn,const Operand & operand)2739   void Orn(FlagsUpdate flags,
2740            Register rd,
2741            Register rn,
2742            const Operand& operand) {
2743     Orn(flags, al, rd, rn, operand);
2744   }
2745 
Orns(Condition cond,Register rd,Register rn,const Operand & operand)2746   void Orns(Condition cond, Register rd, Register rn, const Operand& operand) {
2747     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2748     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2749     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2750     VIXL_ASSERT(allow_macro_instructions_);
2751     VIXL_ASSERT(OutsideITBlock());
2752     MacroEmissionCheckScope guard(this);
2753     ITScope it_scope(this, &cond, guard);
2754     orns(cond, rd, rn, operand);
2755   }
Orns(Register rd,Register rn,const Operand & operand)2756   void Orns(Register rd, Register rn, const Operand& operand) {
2757     Orns(al, rd, rn, operand);
2758   }
2759 
Orr(Condition cond,Register rd,Register rn,const Operand & operand)2760   void Orr(Condition cond, Register rd, Register rn, const Operand& operand) {
2761     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2762     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2763     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2764     VIXL_ASSERT(allow_macro_instructions_);
2765     VIXL_ASSERT(OutsideITBlock());
2766     MacroEmissionCheckScope guard(this);
2767     if (rd.Is(rn) && operand.IsPlainRegister() &&
2768         rd.Is(operand.GetBaseRegister())) {
2769       return;
2770     }
2771     if (cond.Is(al) && operand.IsImmediate()) {
2772       uint32_t immediate = operand.GetImmediate();
2773       if ((immediate == 0) && rd.Is(rn)) {
2774         return;
2775       }
2776       if (immediate == 0xffffffff) {
2777         mvn(rd, 0);
2778         return;
2779       }
2780     }
2781     bool can_use_it =
2782         // ORR<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
2783         operand.IsPlainRegister() && rd.Is(rn) && rn.IsLow() &&
2784         operand.GetBaseRegister().IsLow();
2785     ITScope it_scope(this, &cond, guard, can_use_it);
2786     orr(cond, rd, rn, operand);
2787   }
Orr(Register rd,Register rn,const Operand & operand)2788   void Orr(Register rd, Register rn, const Operand& operand) {
2789     Orr(al, rd, rn, operand);
2790   }
Orr(FlagsUpdate flags,Condition cond,Register rd,Register rn,const Operand & operand)2791   void Orr(FlagsUpdate flags,
2792            Condition cond,
2793            Register rd,
2794            Register rn,
2795            const Operand& operand) {
2796     switch (flags) {
2797       case LeaveFlags:
2798         Orr(cond, rd, rn, operand);
2799         break;
2800       case SetFlags:
2801         Orrs(cond, rd, rn, operand);
2802         break;
2803       case DontCare:
2804         if (operand.IsPlainRegister() && rd.Is(rn) &&
2805             rd.Is(operand.GetBaseRegister())) {
2806           return;
2807         }
2808         bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
2809                                    rn.Is(rd) && operand.IsPlainRegister() &&
2810                                    operand.GetBaseRegister().IsLow();
2811         if (setflags_is_smaller) {
2812           Orrs(cond, rd, rn, operand);
2813         } else {
2814           Orr(cond, rd, rn, operand);
2815         }
2816         break;
2817     }
2818   }
Orr(FlagsUpdate flags,Register rd,Register rn,const Operand & operand)2819   void Orr(FlagsUpdate flags,
2820            Register rd,
2821            Register rn,
2822            const Operand& operand) {
2823     Orr(flags, al, rd, rn, operand);
2824   }
2825 
Orrs(Condition cond,Register rd,Register rn,const Operand & operand)2826   void Orrs(Condition cond, Register rd, Register rn, const Operand& operand) {
2827     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2828     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2829     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2830     VIXL_ASSERT(allow_macro_instructions_);
2831     VIXL_ASSERT(OutsideITBlock());
2832     MacroEmissionCheckScope guard(this);
2833     ITScope it_scope(this, &cond, guard);
2834     orrs(cond, rd, rn, operand);
2835   }
Orrs(Register rd,Register rn,const Operand & operand)2836   void Orrs(Register rd, Register rn, const Operand& operand) {
2837     Orrs(al, rd, rn, operand);
2838   }
2839 
Pkhbt(Condition cond,Register rd,Register rn,const Operand & operand)2840   void Pkhbt(Condition cond, Register rd, Register rn, const Operand& operand) {
2841     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2842     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2843     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2844     VIXL_ASSERT(allow_macro_instructions_);
2845     VIXL_ASSERT(OutsideITBlock());
2846     MacroEmissionCheckScope guard(this);
2847     ITScope it_scope(this, &cond, guard);
2848     pkhbt(cond, rd, rn, operand);
2849   }
Pkhbt(Register rd,Register rn,const Operand & operand)2850   void Pkhbt(Register rd, Register rn, const Operand& operand) {
2851     Pkhbt(al, rd, rn, operand);
2852   }
2853 
Pkhtb(Condition cond,Register rd,Register rn,const Operand & operand)2854   void Pkhtb(Condition cond, Register rd, Register rn, const Operand& operand) {
2855     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2856     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2857     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2858     VIXL_ASSERT(allow_macro_instructions_);
2859     VIXL_ASSERT(OutsideITBlock());
2860     MacroEmissionCheckScope guard(this);
2861     ITScope it_scope(this, &cond, guard);
2862     pkhtb(cond, rd, rn, operand);
2863   }
Pkhtb(Register rd,Register rn,const Operand & operand)2864   void Pkhtb(Register rd, Register rn, const Operand& operand) {
2865     Pkhtb(al, rd, rn, operand);
2866   }
2867 
2868 
Pld(Condition cond,const MemOperand & operand)2869   void Pld(Condition cond, const MemOperand& operand) {
2870     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2871     VIXL_ASSERT(allow_macro_instructions_);
2872     VIXL_ASSERT(OutsideITBlock());
2873     MacroEmissionCheckScope guard(this);
2874     ITScope it_scope(this, &cond, guard);
2875     pld(cond, operand);
2876   }
Pld(const MemOperand & operand)2877   void Pld(const MemOperand& operand) { Pld(al, operand); }
2878 
Pldw(Condition cond,const MemOperand & operand)2879   void Pldw(Condition cond, const MemOperand& operand) {
2880     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2881     VIXL_ASSERT(allow_macro_instructions_);
2882     VIXL_ASSERT(OutsideITBlock());
2883     MacroEmissionCheckScope guard(this);
2884     ITScope it_scope(this, &cond, guard);
2885     pldw(cond, operand);
2886   }
Pldw(const MemOperand & operand)2887   void Pldw(const MemOperand& operand) { Pldw(al, operand); }
2888 
Pli(Condition cond,const MemOperand & operand)2889   void Pli(Condition cond, const MemOperand& operand) {
2890     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
2891     VIXL_ASSERT(allow_macro_instructions_);
2892     VIXL_ASSERT(OutsideITBlock());
2893     MacroEmissionCheckScope guard(this);
2894     ITScope it_scope(this, &cond, guard);
2895     pli(cond, operand);
2896   }
Pli(const MemOperand & operand)2897   void Pli(const MemOperand& operand) { Pli(al, operand); }
2898 
2899 
Pop(Condition cond,RegisterList registers)2900   void Pop(Condition cond, RegisterList registers) {
2901     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2902     VIXL_ASSERT(allow_macro_instructions_);
2903     VIXL_ASSERT(OutsideITBlock());
2904     MacroEmissionCheckScope guard(this);
2905     ITScope it_scope(this, &cond, guard);
2906     if (registers.IsSingleRegister() &&
2907         (!IsUsingT32() || !registers.IsR0toR7orPC())) {
2908       pop(cond, registers.GetFirstAvailableRegister());
2909     } else if (!registers.IsEmpty()) {
2910       pop(cond, registers);
2911     }
2912   }
Pop(RegisterList registers)2913   void Pop(RegisterList registers) { Pop(al, registers); }
2914 
Pop(Condition cond,Register rt)2915   void Pop(Condition cond, Register rt) {
2916     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2917     VIXL_ASSERT(allow_macro_instructions_);
2918     VIXL_ASSERT(OutsideITBlock());
2919     MacroEmissionCheckScope guard(this);
2920     ITScope it_scope(this, &cond, guard);
2921     pop(cond, rt);
2922   }
Pop(Register rt)2923   void Pop(Register rt) { Pop(al, rt); }
2924 
Push(Condition cond,RegisterList registers)2925   void Push(Condition cond, RegisterList registers) {
2926     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
2927     VIXL_ASSERT(allow_macro_instructions_);
2928     VIXL_ASSERT(OutsideITBlock());
2929     MacroEmissionCheckScope guard(this);
2930     ITScope it_scope(this, &cond, guard);
2931     if (registers.IsSingleRegister() && !registers.Includes(sp) &&
2932         (!IsUsingT32() || !registers.IsR0toR7orLR())) {
2933       push(cond, registers.GetFirstAvailableRegister());
2934     } else if (!registers.IsEmpty()) {
2935       push(cond, registers);
2936     }
2937   }
Push(RegisterList registers)2938   void Push(RegisterList registers) { Push(al, registers); }
2939 
Push(Condition cond,Register rt)2940   void Push(Condition cond, Register rt) {
2941     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
2942     VIXL_ASSERT(allow_macro_instructions_);
2943     VIXL_ASSERT(OutsideITBlock());
2944     MacroEmissionCheckScope guard(this);
2945     ITScope it_scope(this, &cond, guard);
2946     if (IsUsingA32() && rt.IsSP()) {
2947       // Only the A32 multiple-register form can push sp.
2948       push(cond, RegisterList(rt));
2949     } else {
2950       push(cond, rt);
2951     }
2952   }
Push(Register rt)2953   void Push(Register rt) { Push(al, rt); }
2954 
Qadd(Condition cond,Register rd,Register rm,Register rn)2955   void Qadd(Condition cond, Register rd, Register rm, Register rn) {
2956     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2957     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2958     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2959     VIXL_ASSERT(allow_macro_instructions_);
2960     VIXL_ASSERT(OutsideITBlock());
2961     MacroEmissionCheckScope guard(this);
2962     ITScope it_scope(this, &cond, guard);
2963     qadd(cond, rd, rm, rn);
2964   }
Qadd(Register rd,Register rm,Register rn)2965   void Qadd(Register rd, Register rm, Register rn) { Qadd(al, rd, rm, rn); }
2966 
Qadd16(Condition cond,Register rd,Register rn,Register rm)2967   void Qadd16(Condition cond, Register rd, Register rn, Register rm) {
2968     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2969     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2970     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2971     VIXL_ASSERT(allow_macro_instructions_);
2972     VIXL_ASSERT(OutsideITBlock());
2973     MacroEmissionCheckScope guard(this);
2974     ITScope it_scope(this, &cond, guard);
2975     qadd16(cond, rd, rn, rm);
2976   }
Qadd16(Register rd,Register rn,Register rm)2977   void Qadd16(Register rd, Register rn, Register rm) { Qadd16(al, rd, rn, rm); }
2978 
Qadd8(Condition cond,Register rd,Register rn,Register rm)2979   void Qadd8(Condition cond, Register rd, Register rn, Register rm) {
2980     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2981     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2982     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2983     VIXL_ASSERT(allow_macro_instructions_);
2984     VIXL_ASSERT(OutsideITBlock());
2985     MacroEmissionCheckScope guard(this);
2986     ITScope it_scope(this, &cond, guard);
2987     qadd8(cond, rd, rn, rm);
2988   }
Qadd8(Register rd,Register rn,Register rm)2989   void Qadd8(Register rd, Register rn, Register rm) { Qadd8(al, rd, rn, rm); }
2990 
Qasx(Condition cond,Register rd,Register rn,Register rm)2991   void Qasx(Condition cond, Register rd, Register rn, Register rm) {
2992     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
2993     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
2994     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
2995     VIXL_ASSERT(allow_macro_instructions_);
2996     VIXL_ASSERT(OutsideITBlock());
2997     MacroEmissionCheckScope guard(this);
2998     ITScope it_scope(this, &cond, guard);
2999     qasx(cond, rd, rn, rm);
3000   }
Qasx(Register rd,Register rn,Register rm)3001   void Qasx(Register rd, Register rn, Register rm) { Qasx(al, rd, rn, rm); }
3002 
Qdadd(Condition cond,Register rd,Register rm,Register rn)3003   void Qdadd(Condition cond, Register rd, Register rm, Register rn) {
3004     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3005     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3006     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3007     VIXL_ASSERT(allow_macro_instructions_);
3008     VIXL_ASSERT(OutsideITBlock());
3009     MacroEmissionCheckScope guard(this);
3010     ITScope it_scope(this, &cond, guard);
3011     qdadd(cond, rd, rm, rn);
3012   }
Qdadd(Register rd,Register rm,Register rn)3013   void Qdadd(Register rd, Register rm, Register rn) { Qdadd(al, rd, rm, rn); }
3014 
Qdsub(Condition cond,Register rd,Register rm,Register rn)3015   void Qdsub(Condition cond, Register rd, Register rm, Register rn) {
3016     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3017     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3018     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3019     VIXL_ASSERT(allow_macro_instructions_);
3020     VIXL_ASSERT(OutsideITBlock());
3021     MacroEmissionCheckScope guard(this);
3022     ITScope it_scope(this, &cond, guard);
3023     qdsub(cond, rd, rm, rn);
3024   }
Qdsub(Register rd,Register rm,Register rn)3025   void Qdsub(Register rd, Register rm, Register rn) { Qdsub(al, rd, rm, rn); }
3026 
Qsax(Condition cond,Register rd,Register rn,Register rm)3027   void Qsax(Condition cond, Register rd, Register rn, Register rm) {
3028     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3029     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3030     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3031     VIXL_ASSERT(allow_macro_instructions_);
3032     VIXL_ASSERT(OutsideITBlock());
3033     MacroEmissionCheckScope guard(this);
3034     ITScope it_scope(this, &cond, guard);
3035     qsax(cond, rd, rn, rm);
3036   }
Qsax(Register rd,Register rn,Register rm)3037   void Qsax(Register rd, Register rn, Register rm) { Qsax(al, rd, rn, rm); }
3038 
Qsub(Condition cond,Register rd,Register rm,Register rn)3039   void Qsub(Condition cond, Register rd, Register rm, Register rn) {
3040     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3041     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3042     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3043     VIXL_ASSERT(allow_macro_instructions_);
3044     VIXL_ASSERT(OutsideITBlock());
3045     MacroEmissionCheckScope guard(this);
3046     ITScope it_scope(this, &cond, guard);
3047     qsub(cond, rd, rm, rn);
3048   }
Qsub(Register rd,Register rm,Register rn)3049   void Qsub(Register rd, Register rm, Register rn) { Qsub(al, rd, rm, rn); }
3050 
Qsub16(Condition cond,Register rd,Register rn,Register rm)3051   void Qsub16(Condition cond, Register rd, Register rn, Register rm) {
3052     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3053     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3054     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3055     VIXL_ASSERT(allow_macro_instructions_);
3056     VIXL_ASSERT(OutsideITBlock());
3057     MacroEmissionCheckScope guard(this);
3058     ITScope it_scope(this, &cond, guard);
3059     qsub16(cond, rd, rn, rm);
3060   }
Qsub16(Register rd,Register rn,Register rm)3061   void Qsub16(Register rd, Register rn, Register rm) { Qsub16(al, rd, rn, rm); }
3062 
Qsub8(Condition cond,Register rd,Register rn,Register rm)3063   void Qsub8(Condition cond, Register rd, Register rn, Register rm) {
3064     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3065     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3066     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3067     VIXL_ASSERT(allow_macro_instructions_);
3068     VIXL_ASSERT(OutsideITBlock());
3069     MacroEmissionCheckScope guard(this);
3070     ITScope it_scope(this, &cond, guard);
3071     qsub8(cond, rd, rn, rm);
3072   }
Qsub8(Register rd,Register rn,Register rm)3073   void Qsub8(Register rd, Register rn, Register rm) { Qsub8(al, rd, rn, rm); }
3074 
Rbit(Condition cond,Register rd,Register rm)3075   void Rbit(Condition cond, Register rd, Register rm) {
3076     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3077     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3078     VIXL_ASSERT(allow_macro_instructions_);
3079     VIXL_ASSERT(OutsideITBlock());
3080     MacroEmissionCheckScope guard(this);
3081     ITScope it_scope(this, &cond, guard);
3082     rbit(cond, rd, rm);
3083   }
Rbit(Register rd,Register rm)3084   void Rbit(Register rd, Register rm) { Rbit(al, rd, rm); }
3085 
Rev(Condition cond,Register rd,Register rm)3086   void Rev(Condition cond, Register rd, Register rm) {
3087     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3088     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3089     VIXL_ASSERT(allow_macro_instructions_);
3090     VIXL_ASSERT(OutsideITBlock());
3091     MacroEmissionCheckScope guard(this);
3092     ITScope it_scope(this, &cond, guard);
3093     rev(cond, rd, rm);
3094   }
Rev(Register rd,Register rm)3095   void Rev(Register rd, Register rm) { Rev(al, rd, rm); }
3096 
Rev16(Condition cond,Register rd,Register rm)3097   void Rev16(Condition cond, Register rd, Register rm) {
3098     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3099     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3100     VIXL_ASSERT(allow_macro_instructions_);
3101     VIXL_ASSERT(OutsideITBlock());
3102     MacroEmissionCheckScope guard(this);
3103     ITScope it_scope(this, &cond, guard);
3104     rev16(cond, rd, rm);
3105   }
Rev16(Register rd,Register rm)3106   void Rev16(Register rd, Register rm) { Rev16(al, rd, rm); }
3107 
Revsh(Condition cond,Register rd,Register rm)3108   void Revsh(Condition cond, Register rd, Register rm) {
3109     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3110     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3111     VIXL_ASSERT(allow_macro_instructions_);
3112     VIXL_ASSERT(OutsideITBlock());
3113     MacroEmissionCheckScope guard(this);
3114     ITScope it_scope(this, &cond, guard);
3115     revsh(cond, rd, rm);
3116   }
Revsh(Register rd,Register rm)3117   void Revsh(Register rd, Register rm) { Revsh(al, rd, rm); }
3118 
Ror(Condition cond,Register rd,Register rm,const Operand & operand)3119   void Ror(Condition cond, Register rd, Register rm, const Operand& operand) {
3120     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3121     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3122     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3123     VIXL_ASSERT(allow_macro_instructions_);
3124     VIXL_ASSERT(OutsideITBlock());
3125     MacroEmissionCheckScope guard(this);
3126     bool can_use_it =
3127         // ROR<c>{<q>} {<Rdm>,} <Rdm>, <Rs> ; T1
3128         operand.IsPlainRegister() && rd.Is(rm) && rd.IsLow() &&
3129         operand.GetBaseRegister().IsLow();
3130     ITScope it_scope(this, &cond, guard, can_use_it);
3131     ror(cond, rd, rm, operand);
3132   }
Ror(Register rd,Register rm,const Operand & operand)3133   void Ror(Register rd, Register rm, const Operand& operand) {
3134     Ror(al, rd, rm, operand);
3135   }
Ror(FlagsUpdate flags,Condition cond,Register rd,Register rm,const Operand & operand)3136   void Ror(FlagsUpdate flags,
3137            Condition cond,
3138            Register rd,
3139            Register rm,
3140            const Operand& operand) {
3141     switch (flags) {
3142       case LeaveFlags:
3143         Ror(cond, rd, rm, operand);
3144         break;
3145       case SetFlags:
3146         Rors(cond, rd, rm, operand);
3147         break;
3148       case DontCare:
3149         bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3150                                    rm.IsLow() && operand.IsPlainRegister() &&
3151                                    rd.Is(rm);
3152         if (setflags_is_smaller) {
3153           Rors(cond, rd, rm, operand);
3154         } else {
3155           Ror(cond, rd, rm, operand);
3156         }
3157         break;
3158     }
3159   }
Ror(FlagsUpdate flags,Register rd,Register rm,const Operand & operand)3160   void Ror(FlagsUpdate flags,
3161            Register rd,
3162            Register rm,
3163            const Operand& operand) {
3164     Ror(flags, al, rd, rm, operand);
3165   }
3166 
Rors(Condition cond,Register rd,Register rm,const Operand & operand)3167   void Rors(Condition cond, Register rd, Register rm, const Operand& operand) {
3168     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3169     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3170     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3171     VIXL_ASSERT(allow_macro_instructions_);
3172     VIXL_ASSERT(OutsideITBlock());
3173     MacroEmissionCheckScope guard(this);
3174     ITScope it_scope(this, &cond, guard);
3175     rors(cond, rd, rm, operand);
3176   }
Rors(Register rd,Register rm,const Operand & operand)3177   void Rors(Register rd, Register rm, const Operand& operand) {
3178     Rors(al, rd, rm, operand);
3179   }
3180 
Rrx(Condition cond,Register rd,Register rm)3181   void Rrx(Condition cond, Register rd, Register rm) {
3182     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3183     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3184     VIXL_ASSERT(allow_macro_instructions_);
3185     VIXL_ASSERT(OutsideITBlock());
3186     MacroEmissionCheckScope guard(this);
3187     ITScope it_scope(this, &cond, guard);
3188     rrx(cond, rd, rm);
3189   }
Rrx(Register rd,Register rm)3190   void Rrx(Register rd, Register rm) { Rrx(al, rd, rm); }
Rrx(FlagsUpdate flags,Condition cond,Register rd,Register rm)3191   void Rrx(FlagsUpdate flags, Condition cond, Register rd, Register rm) {
3192     switch (flags) {
3193       case LeaveFlags:
3194         Rrx(cond, rd, rm);
3195         break;
3196       case SetFlags:
3197         Rrxs(cond, rd, rm);
3198         break;
3199       case DontCare:
3200         Rrx(cond, rd, rm);
3201         break;
3202     }
3203   }
Rrx(FlagsUpdate flags,Register rd,Register rm)3204   void Rrx(FlagsUpdate flags, Register rd, Register rm) {
3205     Rrx(flags, al, rd, rm);
3206   }
3207 
Rrxs(Condition cond,Register rd,Register rm)3208   void Rrxs(Condition cond, Register rd, Register rm) {
3209     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3210     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3211     VIXL_ASSERT(allow_macro_instructions_);
3212     VIXL_ASSERT(OutsideITBlock());
3213     MacroEmissionCheckScope guard(this);
3214     ITScope it_scope(this, &cond, guard);
3215     rrxs(cond, rd, rm);
3216   }
Rrxs(Register rd,Register rm)3217   void Rrxs(Register rd, Register rm) { Rrxs(al, rd, rm); }
3218 
Rsb(Condition cond,Register rd,Register rn,const Operand & operand)3219   void Rsb(Condition cond, Register rd, Register rn, const Operand& operand) {
3220     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3221     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3222     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3223     VIXL_ASSERT(allow_macro_instructions_);
3224     VIXL_ASSERT(OutsideITBlock());
3225     MacroEmissionCheckScope guard(this);
3226     bool can_use_it =
3227         // RSB<c>{<q>} {<Rd>, }<Rn>, #0 ; T1
3228         operand.IsImmediate() && rd.IsLow() && rn.IsLow() &&
3229         (operand.GetImmediate() == 0);
3230     ITScope it_scope(this, &cond, guard, can_use_it);
3231     rsb(cond, rd, rn, operand);
3232   }
Rsb(Register rd,Register rn,const Operand & operand)3233   void Rsb(Register rd, Register rn, const Operand& operand) {
3234     Rsb(al, rd, rn, operand);
3235   }
Rsb(FlagsUpdate flags,Condition cond,Register rd,Register rn,const Operand & operand)3236   void Rsb(FlagsUpdate flags,
3237            Condition cond,
3238            Register rd,
3239            Register rn,
3240            const Operand& operand) {
3241     switch (flags) {
3242       case LeaveFlags:
3243         Rsb(cond, rd, rn, operand);
3244         break;
3245       case SetFlags:
3246         Rsbs(cond, rd, rn, operand);
3247         break;
3248       case DontCare:
3249         bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3250                                    rn.IsLow() && operand.IsImmediate() &&
3251                                    (operand.GetImmediate() == 0);
3252         if (setflags_is_smaller) {
3253           Rsbs(cond, rd, rn, operand);
3254         } else {
3255           Rsb(cond, rd, rn, operand);
3256         }
3257         break;
3258     }
3259   }
Rsb(FlagsUpdate flags,Register rd,Register rn,const Operand & operand)3260   void Rsb(FlagsUpdate flags,
3261            Register rd,
3262            Register rn,
3263            const Operand& operand) {
3264     Rsb(flags, al, rd, rn, operand);
3265   }
3266 
Rsbs(Condition cond,Register rd,Register rn,const Operand & operand)3267   void Rsbs(Condition cond, Register rd, Register rn, const Operand& operand) {
3268     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3269     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3270     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3271     VIXL_ASSERT(allow_macro_instructions_);
3272     VIXL_ASSERT(OutsideITBlock());
3273     MacroEmissionCheckScope guard(this);
3274     ITScope it_scope(this, &cond, guard);
3275     rsbs(cond, rd, rn, operand);
3276   }
Rsbs(Register rd,Register rn,const Operand & operand)3277   void Rsbs(Register rd, Register rn, const Operand& operand) {
3278     Rsbs(al, rd, rn, operand);
3279   }
3280 
Rsc(Condition cond,Register rd,Register rn,const Operand & operand)3281   void Rsc(Condition cond, Register rd, Register rn, const Operand& operand) {
3282     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3283     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3284     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3285     VIXL_ASSERT(allow_macro_instructions_);
3286     VIXL_ASSERT(OutsideITBlock());
3287     MacroEmissionCheckScope guard(this);
3288     ITScope it_scope(this, &cond, guard);
3289     rsc(cond, rd, rn, operand);
3290   }
Rsc(Register rd,Register rn,const Operand & operand)3291   void Rsc(Register rd, Register rn, const Operand& operand) {
3292     Rsc(al, rd, rn, operand);
3293   }
Rsc(FlagsUpdate flags,Condition cond,Register rd,Register rn,const Operand & operand)3294   void Rsc(FlagsUpdate flags,
3295            Condition cond,
3296            Register rd,
3297            Register rn,
3298            const Operand& operand) {
3299     switch (flags) {
3300       case LeaveFlags:
3301         Rsc(cond, rd, rn, operand);
3302         break;
3303       case SetFlags:
3304         Rscs(cond, rd, rn, operand);
3305         break;
3306       case DontCare:
3307         Rsc(cond, rd, rn, operand);
3308         break;
3309     }
3310   }
Rsc(FlagsUpdate flags,Register rd,Register rn,const Operand & operand)3311   void Rsc(FlagsUpdate flags,
3312            Register rd,
3313            Register rn,
3314            const Operand& operand) {
3315     Rsc(flags, al, rd, rn, operand);
3316   }
3317 
Rscs(Condition cond,Register rd,Register rn,const Operand & operand)3318   void Rscs(Condition cond, Register rd, Register rn, const Operand& operand) {
3319     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3320     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3321     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3322     VIXL_ASSERT(allow_macro_instructions_);
3323     VIXL_ASSERT(OutsideITBlock());
3324     MacroEmissionCheckScope guard(this);
3325     ITScope it_scope(this, &cond, guard);
3326     rscs(cond, rd, rn, operand);
3327   }
Rscs(Register rd,Register rn,const Operand & operand)3328   void Rscs(Register rd, Register rn, const Operand& operand) {
3329     Rscs(al, rd, rn, operand);
3330   }
3331 
Sadd16(Condition cond,Register rd,Register rn,Register rm)3332   void Sadd16(Condition cond, Register rd, Register rn, Register rm) {
3333     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3334     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3335     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3336     VIXL_ASSERT(allow_macro_instructions_);
3337     VIXL_ASSERT(OutsideITBlock());
3338     MacroEmissionCheckScope guard(this);
3339     ITScope it_scope(this, &cond, guard);
3340     sadd16(cond, rd, rn, rm);
3341   }
Sadd16(Register rd,Register rn,Register rm)3342   void Sadd16(Register rd, Register rn, Register rm) { Sadd16(al, rd, rn, rm); }
3343 
Sadd8(Condition cond,Register rd,Register rn,Register rm)3344   void Sadd8(Condition cond, Register rd, Register rn, Register rm) {
3345     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3346     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3347     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3348     VIXL_ASSERT(allow_macro_instructions_);
3349     VIXL_ASSERT(OutsideITBlock());
3350     MacroEmissionCheckScope guard(this);
3351     ITScope it_scope(this, &cond, guard);
3352     sadd8(cond, rd, rn, rm);
3353   }
Sadd8(Register rd,Register rn,Register rm)3354   void Sadd8(Register rd, Register rn, Register rm) { Sadd8(al, rd, rn, rm); }
3355 
Sasx(Condition cond,Register rd,Register rn,Register rm)3356   void Sasx(Condition cond, Register rd, Register rn, Register rm) {
3357     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3358     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3359     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3360     VIXL_ASSERT(allow_macro_instructions_);
3361     VIXL_ASSERT(OutsideITBlock());
3362     MacroEmissionCheckScope guard(this);
3363     ITScope it_scope(this, &cond, guard);
3364     sasx(cond, rd, rn, rm);
3365   }
Sasx(Register rd,Register rn,Register rm)3366   void Sasx(Register rd, Register rn, Register rm) { Sasx(al, rd, rn, rm); }
3367 
Sbc(Condition cond,Register rd,Register rn,const Operand & operand)3368   void Sbc(Condition cond, Register rd, Register rn, const Operand& operand) {
3369     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3370     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3371     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3372     VIXL_ASSERT(allow_macro_instructions_);
3373     VIXL_ASSERT(OutsideITBlock());
3374     MacroEmissionCheckScope guard(this);
3375     bool can_use_it =
3376         // SBC<c>{<q>} {<Rdn>,} <Rdn>, <Rm> ; T1
3377         operand.IsPlainRegister() && rn.IsLow() && rd.Is(rn) &&
3378         operand.GetBaseRegister().IsLow();
3379     ITScope it_scope(this, &cond, guard, can_use_it);
3380     sbc(cond, rd, rn, operand);
3381   }
Sbc(Register rd,Register rn,const Operand & operand)3382   void Sbc(Register rd, Register rn, const Operand& operand) {
3383     Sbc(al, rd, rn, operand);
3384   }
Sbc(FlagsUpdate flags,Condition cond,Register rd,Register rn,const Operand & operand)3385   void Sbc(FlagsUpdate flags,
3386            Condition cond,
3387            Register rd,
3388            Register rn,
3389            const Operand& operand) {
3390     switch (flags) {
3391       case LeaveFlags:
3392         Sbc(cond, rd, rn, operand);
3393         break;
3394       case SetFlags:
3395         Sbcs(cond, rd, rn, operand);
3396         break;
3397       case DontCare:
3398         bool setflags_is_smaller = IsUsingT32() && cond.Is(al) && rd.IsLow() &&
3399                                    rn.Is(rd) && operand.IsPlainRegister() &&
3400                                    operand.GetBaseRegister().IsLow();
3401         if (setflags_is_smaller) {
3402           Sbcs(cond, rd, rn, operand);
3403         } else {
3404           Sbc(cond, rd, rn, operand);
3405         }
3406         break;
3407     }
3408   }
Sbc(FlagsUpdate flags,Register rd,Register rn,const Operand & operand)3409   void Sbc(FlagsUpdate flags,
3410            Register rd,
3411            Register rn,
3412            const Operand& operand) {
3413     Sbc(flags, al, rd, rn, operand);
3414   }
3415 
Sbcs(Condition cond,Register rd,Register rn,const Operand & operand)3416   void Sbcs(Condition cond, Register rd, Register rn, const Operand& operand) {
3417     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3418     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3419     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
3420     VIXL_ASSERT(allow_macro_instructions_);
3421     VIXL_ASSERT(OutsideITBlock());
3422     MacroEmissionCheckScope guard(this);
3423     ITScope it_scope(this, &cond, guard);
3424     sbcs(cond, rd, rn, operand);
3425   }
Sbcs(Register rd,Register rn,const Operand & operand)3426   void Sbcs(Register rd, Register rn, const Operand& operand) {
3427     Sbcs(al, rd, rn, operand);
3428   }
3429 
Sbfx(Condition cond,Register rd,Register rn,uint32_t lsb,uint32_t width)3430   void Sbfx(
3431       Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
3432     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3433     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3434     VIXL_ASSERT(allow_macro_instructions_);
3435     VIXL_ASSERT(OutsideITBlock());
3436     MacroEmissionCheckScope guard(this);
3437     ITScope it_scope(this, &cond, guard);
3438     sbfx(cond, rd, rn, lsb, width);
3439   }
Sbfx(Register rd,Register rn,uint32_t lsb,uint32_t width)3440   void Sbfx(Register rd, Register rn, uint32_t lsb, uint32_t width) {
3441     Sbfx(al, rd, rn, lsb, width);
3442   }
3443 
Sdiv(Condition cond,Register rd,Register rn,Register rm)3444   void Sdiv(Condition cond, Register rd, Register rn, Register rm) {
3445     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3446     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3447     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3448     VIXL_ASSERT(allow_macro_instructions_);
3449     VIXL_ASSERT(OutsideITBlock());
3450     MacroEmissionCheckScope guard(this);
3451     ITScope it_scope(this, &cond, guard);
3452     sdiv(cond, rd, rn, rm);
3453   }
Sdiv(Register rd,Register rn,Register rm)3454   void Sdiv(Register rd, Register rn, Register rm) { Sdiv(al, rd, rn, rm); }
3455 
Sel(Condition cond,Register rd,Register rn,Register rm)3456   void Sel(Condition cond, Register rd, Register rn, Register rm) {
3457     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3458     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3459     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3460     VIXL_ASSERT(allow_macro_instructions_);
3461     VIXL_ASSERT(OutsideITBlock());
3462     MacroEmissionCheckScope guard(this);
3463     ITScope it_scope(this, &cond, guard);
3464     sel(cond, rd, rn, rm);
3465   }
Sel(Register rd,Register rn,Register rm)3466   void Sel(Register rd, Register rn, Register rm) { Sel(al, rd, rn, rm); }
3467 
Shadd16(Condition cond,Register rd,Register rn,Register rm)3468   void Shadd16(Condition cond, Register rd, Register rn, Register rm) {
3469     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3470     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3471     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3472     VIXL_ASSERT(allow_macro_instructions_);
3473     VIXL_ASSERT(OutsideITBlock());
3474     MacroEmissionCheckScope guard(this);
3475     ITScope it_scope(this, &cond, guard);
3476     shadd16(cond, rd, rn, rm);
3477   }
Shadd16(Register rd,Register rn,Register rm)3478   void Shadd16(Register rd, Register rn, Register rm) {
3479     Shadd16(al, rd, rn, rm);
3480   }
3481 
Shadd8(Condition cond,Register rd,Register rn,Register rm)3482   void Shadd8(Condition cond, Register rd, Register rn, Register rm) {
3483     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3484     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3485     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3486     VIXL_ASSERT(allow_macro_instructions_);
3487     VIXL_ASSERT(OutsideITBlock());
3488     MacroEmissionCheckScope guard(this);
3489     ITScope it_scope(this, &cond, guard);
3490     shadd8(cond, rd, rn, rm);
3491   }
Shadd8(Register rd,Register rn,Register rm)3492   void Shadd8(Register rd, Register rn, Register rm) { Shadd8(al, rd, rn, rm); }
3493 
Shasx(Condition cond,Register rd,Register rn,Register rm)3494   void Shasx(Condition cond, Register rd, Register rn, Register rm) {
3495     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3496     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3497     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3498     VIXL_ASSERT(allow_macro_instructions_);
3499     VIXL_ASSERT(OutsideITBlock());
3500     MacroEmissionCheckScope guard(this);
3501     ITScope it_scope(this, &cond, guard);
3502     shasx(cond, rd, rn, rm);
3503   }
Shasx(Register rd,Register rn,Register rm)3504   void Shasx(Register rd, Register rn, Register rm) { Shasx(al, rd, rn, rm); }
3505 
Shsax(Condition cond,Register rd,Register rn,Register rm)3506   void Shsax(Condition cond, Register rd, Register rn, Register rm) {
3507     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3508     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3509     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3510     VIXL_ASSERT(allow_macro_instructions_);
3511     VIXL_ASSERT(OutsideITBlock());
3512     MacroEmissionCheckScope guard(this);
3513     ITScope it_scope(this, &cond, guard);
3514     shsax(cond, rd, rn, rm);
3515   }
Shsax(Register rd,Register rn,Register rm)3516   void Shsax(Register rd, Register rn, Register rm) { Shsax(al, rd, rn, rm); }
3517 
Shsub16(Condition cond,Register rd,Register rn,Register rm)3518   void Shsub16(Condition cond, Register rd, Register rn, Register rm) {
3519     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3520     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3521     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3522     VIXL_ASSERT(allow_macro_instructions_);
3523     VIXL_ASSERT(OutsideITBlock());
3524     MacroEmissionCheckScope guard(this);
3525     ITScope it_scope(this, &cond, guard);
3526     shsub16(cond, rd, rn, rm);
3527   }
Shsub16(Register rd,Register rn,Register rm)3528   void Shsub16(Register rd, Register rn, Register rm) {
3529     Shsub16(al, rd, rn, rm);
3530   }
3531 
Shsub8(Condition cond,Register rd,Register rn,Register rm)3532   void Shsub8(Condition cond, Register rd, Register rn, Register rm) {
3533     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3534     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3535     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3536     VIXL_ASSERT(allow_macro_instructions_);
3537     VIXL_ASSERT(OutsideITBlock());
3538     MacroEmissionCheckScope guard(this);
3539     ITScope it_scope(this, &cond, guard);
3540     shsub8(cond, rd, rn, rm);
3541   }
Shsub8(Register rd,Register rn,Register rm)3542   void Shsub8(Register rd, Register rn, Register rm) { Shsub8(al, rd, rn, rm); }
3543 
Smlabb(Condition cond,Register rd,Register rn,Register rm,Register ra)3544   void Smlabb(
3545       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3546     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3547     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3548     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3549     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3550     VIXL_ASSERT(allow_macro_instructions_);
3551     VIXL_ASSERT(OutsideITBlock());
3552     MacroEmissionCheckScope guard(this);
3553     ITScope it_scope(this, &cond, guard);
3554     smlabb(cond, rd, rn, rm, ra);
3555   }
Smlabb(Register rd,Register rn,Register rm,Register ra)3556   void Smlabb(Register rd, Register rn, Register rm, Register ra) {
3557     Smlabb(al, rd, rn, rm, ra);
3558   }
3559 
Smlabt(Condition cond,Register rd,Register rn,Register rm,Register ra)3560   void Smlabt(
3561       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3562     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3563     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3564     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3565     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3566     VIXL_ASSERT(allow_macro_instructions_);
3567     VIXL_ASSERT(OutsideITBlock());
3568     MacroEmissionCheckScope guard(this);
3569     ITScope it_scope(this, &cond, guard);
3570     smlabt(cond, rd, rn, rm, ra);
3571   }
Smlabt(Register rd,Register rn,Register rm,Register ra)3572   void Smlabt(Register rd, Register rn, Register rm, Register ra) {
3573     Smlabt(al, rd, rn, rm, ra);
3574   }
3575 
Smlad(Condition cond,Register rd,Register rn,Register rm,Register ra)3576   void Smlad(
3577       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3578     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3579     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3580     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3581     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3582     VIXL_ASSERT(allow_macro_instructions_);
3583     VIXL_ASSERT(OutsideITBlock());
3584     MacroEmissionCheckScope guard(this);
3585     ITScope it_scope(this, &cond, guard);
3586     smlad(cond, rd, rn, rm, ra);
3587   }
Smlad(Register rd,Register rn,Register rm,Register ra)3588   void Smlad(Register rd, Register rn, Register rm, Register ra) {
3589     Smlad(al, rd, rn, rm, ra);
3590   }
3591 
Smladx(Condition cond,Register rd,Register rn,Register rm,Register ra)3592   void Smladx(
3593       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3594     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3595     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3596     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3597     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3598     VIXL_ASSERT(allow_macro_instructions_);
3599     VIXL_ASSERT(OutsideITBlock());
3600     MacroEmissionCheckScope guard(this);
3601     ITScope it_scope(this, &cond, guard);
3602     smladx(cond, rd, rn, rm, ra);
3603   }
Smladx(Register rd,Register rn,Register rm,Register ra)3604   void Smladx(Register rd, Register rn, Register rm, Register ra) {
3605     Smladx(al, rd, rn, rm, ra);
3606   }
3607 
Smlal(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)3608   void Smlal(
3609       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3610     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3611     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3612     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3613     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3614     VIXL_ASSERT(allow_macro_instructions_);
3615     VIXL_ASSERT(OutsideITBlock());
3616     MacroEmissionCheckScope guard(this);
3617     ITScope it_scope(this, &cond, guard);
3618     smlal(cond, rdlo, rdhi, rn, rm);
3619   }
Smlal(Register rdlo,Register rdhi,Register rn,Register rm)3620   void Smlal(Register rdlo, Register rdhi, Register rn, Register rm) {
3621     Smlal(al, rdlo, rdhi, rn, rm);
3622   }
3623 
Smlalbb(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)3624   void Smlalbb(
3625       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3626     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3627     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3628     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3629     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3630     VIXL_ASSERT(allow_macro_instructions_);
3631     VIXL_ASSERT(OutsideITBlock());
3632     MacroEmissionCheckScope guard(this);
3633     ITScope it_scope(this, &cond, guard);
3634     smlalbb(cond, rdlo, rdhi, rn, rm);
3635   }
Smlalbb(Register rdlo,Register rdhi,Register rn,Register rm)3636   void Smlalbb(Register rdlo, Register rdhi, Register rn, Register rm) {
3637     Smlalbb(al, rdlo, rdhi, rn, rm);
3638   }
3639 
Smlalbt(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)3640   void Smlalbt(
3641       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3642     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3643     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3644     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3645     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3646     VIXL_ASSERT(allow_macro_instructions_);
3647     VIXL_ASSERT(OutsideITBlock());
3648     MacroEmissionCheckScope guard(this);
3649     ITScope it_scope(this, &cond, guard);
3650     smlalbt(cond, rdlo, rdhi, rn, rm);
3651   }
Smlalbt(Register rdlo,Register rdhi,Register rn,Register rm)3652   void Smlalbt(Register rdlo, Register rdhi, Register rn, Register rm) {
3653     Smlalbt(al, rdlo, rdhi, rn, rm);
3654   }
3655 
Smlald(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)3656   void Smlald(
3657       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3658     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3659     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3660     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3661     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3662     VIXL_ASSERT(allow_macro_instructions_);
3663     VIXL_ASSERT(OutsideITBlock());
3664     MacroEmissionCheckScope guard(this);
3665     ITScope it_scope(this, &cond, guard);
3666     smlald(cond, rdlo, rdhi, rn, rm);
3667   }
Smlald(Register rdlo,Register rdhi,Register rn,Register rm)3668   void Smlald(Register rdlo, Register rdhi, Register rn, Register rm) {
3669     Smlald(al, rdlo, rdhi, rn, rm);
3670   }
3671 
Smlaldx(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)3672   void Smlaldx(
3673       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3674     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3675     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3676     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3677     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3678     VIXL_ASSERT(allow_macro_instructions_);
3679     VIXL_ASSERT(OutsideITBlock());
3680     MacroEmissionCheckScope guard(this);
3681     ITScope it_scope(this, &cond, guard);
3682     smlaldx(cond, rdlo, rdhi, rn, rm);
3683   }
Smlaldx(Register rdlo,Register rdhi,Register rn,Register rm)3684   void Smlaldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3685     Smlaldx(al, rdlo, rdhi, rn, rm);
3686   }
3687 
Smlals(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)3688   void Smlals(
3689       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3690     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3691     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3692     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3693     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3694     VIXL_ASSERT(allow_macro_instructions_);
3695     VIXL_ASSERT(OutsideITBlock());
3696     MacroEmissionCheckScope guard(this);
3697     ITScope it_scope(this, &cond, guard);
3698     smlals(cond, rdlo, rdhi, rn, rm);
3699   }
Smlals(Register rdlo,Register rdhi,Register rn,Register rm)3700   void Smlals(Register rdlo, Register rdhi, Register rn, Register rm) {
3701     Smlals(al, rdlo, rdhi, rn, rm);
3702   }
3703 
Smlaltb(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)3704   void Smlaltb(
3705       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3706     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3707     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3708     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3709     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3710     VIXL_ASSERT(allow_macro_instructions_);
3711     VIXL_ASSERT(OutsideITBlock());
3712     MacroEmissionCheckScope guard(this);
3713     ITScope it_scope(this, &cond, guard);
3714     smlaltb(cond, rdlo, rdhi, rn, rm);
3715   }
Smlaltb(Register rdlo,Register rdhi,Register rn,Register rm)3716   void Smlaltb(Register rdlo, Register rdhi, Register rn, Register rm) {
3717     Smlaltb(al, rdlo, rdhi, rn, rm);
3718   }
3719 
Smlaltt(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)3720   void Smlaltt(
3721       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3722     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3723     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3724     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3725     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3726     VIXL_ASSERT(allow_macro_instructions_);
3727     VIXL_ASSERT(OutsideITBlock());
3728     MacroEmissionCheckScope guard(this);
3729     ITScope it_scope(this, &cond, guard);
3730     smlaltt(cond, rdlo, rdhi, rn, rm);
3731   }
Smlaltt(Register rdlo,Register rdhi,Register rn,Register rm)3732   void Smlaltt(Register rdlo, Register rdhi, Register rn, Register rm) {
3733     Smlaltt(al, rdlo, rdhi, rn, rm);
3734   }
3735 
Smlatb(Condition cond,Register rd,Register rn,Register rm,Register ra)3736   void Smlatb(
3737       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3738     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3739     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3740     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3741     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3742     VIXL_ASSERT(allow_macro_instructions_);
3743     VIXL_ASSERT(OutsideITBlock());
3744     MacroEmissionCheckScope guard(this);
3745     ITScope it_scope(this, &cond, guard);
3746     smlatb(cond, rd, rn, rm, ra);
3747   }
Smlatb(Register rd,Register rn,Register rm,Register ra)3748   void Smlatb(Register rd, Register rn, Register rm, Register ra) {
3749     Smlatb(al, rd, rn, rm, ra);
3750   }
3751 
Smlatt(Condition cond,Register rd,Register rn,Register rm,Register ra)3752   void Smlatt(
3753       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3754     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3755     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3756     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3757     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3758     VIXL_ASSERT(allow_macro_instructions_);
3759     VIXL_ASSERT(OutsideITBlock());
3760     MacroEmissionCheckScope guard(this);
3761     ITScope it_scope(this, &cond, guard);
3762     smlatt(cond, rd, rn, rm, ra);
3763   }
Smlatt(Register rd,Register rn,Register rm,Register ra)3764   void Smlatt(Register rd, Register rn, Register rm, Register ra) {
3765     Smlatt(al, rd, rn, rm, ra);
3766   }
3767 
Smlawb(Condition cond,Register rd,Register rn,Register rm,Register ra)3768   void Smlawb(
3769       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3770     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3771     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3772     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3773     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3774     VIXL_ASSERT(allow_macro_instructions_);
3775     VIXL_ASSERT(OutsideITBlock());
3776     MacroEmissionCheckScope guard(this);
3777     ITScope it_scope(this, &cond, guard);
3778     smlawb(cond, rd, rn, rm, ra);
3779   }
Smlawb(Register rd,Register rn,Register rm,Register ra)3780   void Smlawb(Register rd, Register rn, Register rm, Register ra) {
3781     Smlawb(al, rd, rn, rm, ra);
3782   }
3783 
Smlawt(Condition cond,Register rd,Register rn,Register rm,Register ra)3784   void Smlawt(
3785       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3786     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3787     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3788     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3789     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3790     VIXL_ASSERT(allow_macro_instructions_);
3791     VIXL_ASSERT(OutsideITBlock());
3792     MacroEmissionCheckScope guard(this);
3793     ITScope it_scope(this, &cond, guard);
3794     smlawt(cond, rd, rn, rm, ra);
3795   }
Smlawt(Register rd,Register rn,Register rm,Register ra)3796   void Smlawt(Register rd, Register rn, Register rm, Register ra) {
3797     Smlawt(al, rd, rn, rm, ra);
3798   }
3799 
Smlsd(Condition cond,Register rd,Register rn,Register rm,Register ra)3800   void Smlsd(
3801       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3802     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3803     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3804     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3805     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3806     VIXL_ASSERT(allow_macro_instructions_);
3807     VIXL_ASSERT(OutsideITBlock());
3808     MacroEmissionCheckScope guard(this);
3809     ITScope it_scope(this, &cond, guard);
3810     smlsd(cond, rd, rn, rm, ra);
3811   }
Smlsd(Register rd,Register rn,Register rm,Register ra)3812   void Smlsd(Register rd, Register rn, Register rm, Register ra) {
3813     Smlsd(al, rd, rn, rm, ra);
3814   }
3815 
Smlsdx(Condition cond,Register rd,Register rn,Register rm,Register ra)3816   void Smlsdx(
3817       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3818     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3819     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3820     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3821     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3822     VIXL_ASSERT(allow_macro_instructions_);
3823     VIXL_ASSERT(OutsideITBlock());
3824     MacroEmissionCheckScope guard(this);
3825     ITScope it_scope(this, &cond, guard);
3826     smlsdx(cond, rd, rn, rm, ra);
3827   }
Smlsdx(Register rd,Register rn,Register rm,Register ra)3828   void Smlsdx(Register rd, Register rn, Register rm, Register ra) {
3829     Smlsdx(al, rd, rn, rm, ra);
3830   }
3831 
Smlsld(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)3832   void Smlsld(
3833       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3834     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3835     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3836     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3837     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3838     VIXL_ASSERT(allow_macro_instructions_);
3839     VIXL_ASSERT(OutsideITBlock());
3840     MacroEmissionCheckScope guard(this);
3841     ITScope it_scope(this, &cond, guard);
3842     smlsld(cond, rdlo, rdhi, rn, rm);
3843   }
Smlsld(Register rdlo,Register rdhi,Register rn,Register rm)3844   void Smlsld(Register rdlo, Register rdhi, Register rn, Register rm) {
3845     Smlsld(al, rdlo, rdhi, rn, rm);
3846   }
3847 
Smlsldx(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)3848   void Smlsldx(
3849       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
3850     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
3851     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
3852     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3853     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3854     VIXL_ASSERT(allow_macro_instructions_);
3855     VIXL_ASSERT(OutsideITBlock());
3856     MacroEmissionCheckScope guard(this);
3857     ITScope it_scope(this, &cond, guard);
3858     smlsldx(cond, rdlo, rdhi, rn, rm);
3859   }
Smlsldx(Register rdlo,Register rdhi,Register rn,Register rm)3860   void Smlsldx(Register rdlo, Register rdhi, Register rn, Register rm) {
3861     Smlsldx(al, rdlo, rdhi, rn, rm);
3862   }
3863 
Smmla(Condition cond,Register rd,Register rn,Register rm,Register ra)3864   void Smmla(
3865       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3866     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3867     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3868     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3869     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3870     VIXL_ASSERT(allow_macro_instructions_);
3871     VIXL_ASSERT(OutsideITBlock());
3872     MacroEmissionCheckScope guard(this);
3873     ITScope it_scope(this, &cond, guard);
3874     smmla(cond, rd, rn, rm, ra);
3875   }
Smmla(Register rd,Register rn,Register rm,Register ra)3876   void Smmla(Register rd, Register rn, Register rm, Register ra) {
3877     Smmla(al, rd, rn, rm, ra);
3878   }
3879 
Smmlar(Condition cond,Register rd,Register rn,Register rm,Register ra)3880   void Smmlar(
3881       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3882     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3883     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3884     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3885     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3886     VIXL_ASSERT(allow_macro_instructions_);
3887     VIXL_ASSERT(OutsideITBlock());
3888     MacroEmissionCheckScope guard(this);
3889     ITScope it_scope(this, &cond, guard);
3890     smmlar(cond, rd, rn, rm, ra);
3891   }
Smmlar(Register rd,Register rn,Register rm,Register ra)3892   void Smmlar(Register rd, Register rn, Register rm, Register ra) {
3893     Smmlar(al, rd, rn, rm, ra);
3894   }
3895 
Smmls(Condition cond,Register rd,Register rn,Register rm,Register ra)3896   void Smmls(
3897       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3898     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3899     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3900     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3901     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3902     VIXL_ASSERT(allow_macro_instructions_);
3903     VIXL_ASSERT(OutsideITBlock());
3904     MacroEmissionCheckScope guard(this);
3905     ITScope it_scope(this, &cond, guard);
3906     smmls(cond, rd, rn, rm, ra);
3907   }
Smmls(Register rd,Register rn,Register rm,Register ra)3908   void Smmls(Register rd, Register rn, Register rm, Register ra) {
3909     Smmls(al, rd, rn, rm, ra);
3910   }
3911 
Smmlsr(Condition cond,Register rd,Register rn,Register rm,Register ra)3912   void Smmlsr(
3913       Condition cond, Register rd, Register rn, Register rm, Register ra) {
3914     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3915     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3916     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3917     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
3918     VIXL_ASSERT(allow_macro_instructions_);
3919     VIXL_ASSERT(OutsideITBlock());
3920     MacroEmissionCheckScope guard(this);
3921     ITScope it_scope(this, &cond, guard);
3922     smmlsr(cond, rd, rn, rm, ra);
3923   }
Smmlsr(Register rd,Register rn,Register rm,Register ra)3924   void Smmlsr(Register rd, Register rn, Register rm, Register ra) {
3925     Smmlsr(al, rd, rn, rm, ra);
3926   }
3927 
Smmul(Condition cond,Register rd,Register rn,Register rm)3928   void Smmul(Condition cond, Register rd, Register rn, Register rm) {
3929     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3930     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3931     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3932     VIXL_ASSERT(allow_macro_instructions_);
3933     VIXL_ASSERT(OutsideITBlock());
3934     MacroEmissionCheckScope guard(this);
3935     ITScope it_scope(this, &cond, guard);
3936     smmul(cond, rd, rn, rm);
3937   }
Smmul(Register rd,Register rn,Register rm)3938   void Smmul(Register rd, Register rn, Register rm) { Smmul(al, rd, rn, rm); }
3939 
Smmulr(Condition cond,Register rd,Register rn,Register rm)3940   void Smmulr(Condition cond, Register rd, Register rn, Register rm) {
3941     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3942     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3943     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3944     VIXL_ASSERT(allow_macro_instructions_);
3945     VIXL_ASSERT(OutsideITBlock());
3946     MacroEmissionCheckScope guard(this);
3947     ITScope it_scope(this, &cond, guard);
3948     smmulr(cond, rd, rn, rm);
3949   }
Smmulr(Register rd,Register rn,Register rm)3950   void Smmulr(Register rd, Register rn, Register rm) { Smmulr(al, rd, rn, rm); }
3951 
Smuad(Condition cond,Register rd,Register rn,Register rm)3952   void Smuad(Condition cond, Register rd, Register rn, Register rm) {
3953     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3954     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3955     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3956     VIXL_ASSERT(allow_macro_instructions_);
3957     VIXL_ASSERT(OutsideITBlock());
3958     MacroEmissionCheckScope guard(this);
3959     ITScope it_scope(this, &cond, guard);
3960     smuad(cond, rd, rn, rm);
3961   }
Smuad(Register rd,Register rn,Register rm)3962   void Smuad(Register rd, Register rn, Register rm) { Smuad(al, rd, rn, rm); }
3963 
Smuadx(Condition cond,Register rd,Register rn,Register rm)3964   void Smuadx(Condition cond, Register rd, Register rn, Register rm) {
3965     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3966     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3967     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3968     VIXL_ASSERT(allow_macro_instructions_);
3969     VIXL_ASSERT(OutsideITBlock());
3970     MacroEmissionCheckScope guard(this);
3971     ITScope it_scope(this, &cond, guard);
3972     smuadx(cond, rd, rn, rm);
3973   }
Smuadx(Register rd,Register rn,Register rm)3974   void Smuadx(Register rd, Register rn, Register rm) { Smuadx(al, rd, rn, rm); }
3975 
Smulbb(Condition cond,Register rd,Register rn,Register rm)3976   void Smulbb(Condition cond, Register rd, Register rn, Register rm) {
3977     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3978     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3979     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3980     VIXL_ASSERT(allow_macro_instructions_);
3981     VIXL_ASSERT(OutsideITBlock());
3982     MacroEmissionCheckScope guard(this);
3983     ITScope it_scope(this, &cond, guard);
3984     smulbb(cond, rd, rn, rm);
3985   }
Smulbb(Register rd,Register rn,Register rm)3986   void Smulbb(Register rd, Register rn, Register rm) { Smulbb(al, rd, rn, rm); }
3987 
Smulbt(Condition cond,Register rd,Register rn,Register rm)3988   void Smulbt(Condition cond, Register rd, Register rn, Register rm) {
3989     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
3990     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
3991     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
3992     VIXL_ASSERT(allow_macro_instructions_);
3993     VIXL_ASSERT(OutsideITBlock());
3994     MacroEmissionCheckScope guard(this);
3995     ITScope it_scope(this, &cond, guard);
3996     smulbt(cond, rd, rn, rm);
3997   }
Smulbt(Register rd,Register rn,Register rm)3998   void Smulbt(Register rd, Register rn, Register rm) { Smulbt(al, rd, rn, rm); }
3999 
Smull(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)4000   void Smull(
4001       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4002     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4003     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4004     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4005     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4006     VIXL_ASSERT(allow_macro_instructions_);
4007     VIXL_ASSERT(OutsideITBlock());
4008     MacroEmissionCheckScope guard(this);
4009     ITScope it_scope(this, &cond, guard);
4010     smull(cond, rdlo, rdhi, rn, rm);
4011   }
Smull(Register rdlo,Register rdhi,Register rn,Register rm)4012   void Smull(Register rdlo, Register rdhi, Register rn, Register rm) {
4013     Smull(al, rdlo, rdhi, rn, rm);
4014   }
Smull(FlagsUpdate flags,Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)4015   void Smull(FlagsUpdate flags,
4016              Condition cond,
4017              Register rdlo,
4018              Register rdhi,
4019              Register rn,
4020              Register rm) {
4021     switch (flags) {
4022       case LeaveFlags:
4023         Smull(cond, rdlo, rdhi, rn, rm);
4024         break;
4025       case SetFlags:
4026         Smulls(cond, rdlo, rdhi, rn, rm);
4027         break;
4028       case DontCare:
4029         Smull(cond, rdlo, rdhi, rn, rm);
4030         break;
4031     }
4032   }
Smull(FlagsUpdate flags,Register rdlo,Register rdhi,Register rn,Register rm)4033   void Smull(FlagsUpdate flags,
4034              Register rdlo,
4035              Register rdhi,
4036              Register rn,
4037              Register rm) {
4038     Smull(flags, al, rdlo, rdhi, rn, rm);
4039   }
4040 
Smulls(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)4041   void Smulls(
4042       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4043     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4044     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4045     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4046     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4047     VIXL_ASSERT(allow_macro_instructions_);
4048     VIXL_ASSERT(OutsideITBlock());
4049     MacroEmissionCheckScope guard(this);
4050     ITScope it_scope(this, &cond, guard);
4051     smulls(cond, rdlo, rdhi, rn, rm);
4052   }
Smulls(Register rdlo,Register rdhi,Register rn,Register rm)4053   void Smulls(Register rdlo, Register rdhi, Register rn, Register rm) {
4054     Smulls(al, rdlo, rdhi, rn, rm);
4055   }
4056 
Smultb(Condition cond,Register rd,Register rn,Register rm)4057   void Smultb(Condition cond, Register rd, Register rn, Register rm) {
4058     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4059     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4060     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4061     VIXL_ASSERT(allow_macro_instructions_);
4062     VIXL_ASSERT(OutsideITBlock());
4063     MacroEmissionCheckScope guard(this);
4064     ITScope it_scope(this, &cond, guard);
4065     smultb(cond, rd, rn, rm);
4066   }
Smultb(Register rd,Register rn,Register rm)4067   void Smultb(Register rd, Register rn, Register rm) { Smultb(al, rd, rn, rm); }
4068 
Smultt(Condition cond,Register rd,Register rn,Register rm)4069   void Smultt(Condition cond, Register rd, Register rn, Register rm) {
4070     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4071     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4072     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4073     VIXL_ASSERT(allow_macro_instructions_);
4074     VIXL_ASSERT(OutsideITBlock());
4075     MacroEmissionCheckScope guard(this);
4076     ITScope it_scope(this, &cond, guard);
4077     smultt(cond, rd, rn, rm);
4078   }
Smultt(Register rd,Register rn,Register rm)4079   void Smultt(Register rd, Register rn, Register rm) { Smultt(al, rd, rn, rm); }
4080 
Smulwb(Condition cond,Register rd,Register rn,Register rm)4081   void Smulwb(Condition cond, Register rd, Register rn, Register rm) {
4082     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4083     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4084     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4085     VIXL_ASSERT(allow_macro_instructions_);
4086     VIXL_ASSERT(OutsideITBlock());
4087     MacroEmissionCheckScope guard(this);
4088     ITScope it_scope(this, &cond, guard);
4089     smulwb(cond, rd, rn, rm);
4090   }
Smulwb(Register rd,Register rn,Register rm)4091   void Smulwb(Register rd, Register rn, Register rm) { Smulwb(al, rd, rn, rm); }
4092 
Smulwt(Condition cond,Register rd,Register rn,Register rm)4093   void Smulwt(Condition cond, Register rd, Register rn, Register rm) {
4094     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4095     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4096     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4097     VIXL_ASSERT(allow_macro_instructions_);
4098     VIXL_ASSERT(OutsideITBlock());
4099     MacroEmissionCheckScope guard(this);
4100     ITScope it_scope(this, &cond, guard);
4101     smulwt(cond, rd, rn, rm);
4102   }
Smulwt(Register rd,Register rn,Register rm)4103   void Smulwt(Register rd, Register rn, Register rm) { Smulwt(al, rd, rn, rm); }
4104 
Smusd(Condition cond,Register rd,Register rn,Register rm)4105   void Smusd(Condition cond, Register rd, Register rn, Register rm) {
4106     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4107     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4108     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4109     VIXL_ASSERT(allow_macro_instructions_);
4110     VIXL_ASSERT(OutsideITBlock());
4111     MacroEmissionCheckScope guard(this);
4112     ITScope it_scope(this, &cond, guard);
4113     smusd(cond, rd, rn, rm);
4114   }
Smusd(Register rd,Register rn,Register rm)4115   void Smusd(Register rd, Register rn, Register rm) { Smusd(al, rd, rn, rm); }
4116 
Smusdx(Condition cond,Register rd,Register rn,Register rm)4117   void Smusdx(Condition cond, Register rd, Register rn, Register rm) {
4118     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4119     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4120     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4121     VIXL_ASSERT(allow_macro_instructions_);
4122     VIXL_ASSERT(OutsideITBlock());
4123     MacroEmissionCheckScope guard(this);
4124     ITScope it_scope(this, &cond, guard);
4125     smusdx(cond, rd, rn, rm);
4126   }
Smusdx(Register rd,Register rn,Register rm)4127   void Smusdx(Register rd, Register rn, Register rm) { Smusdx(al, rd, rn, rm); }
4128 
Ssat(Condition cond,Register rd,uint32_t imm,const Operand & operand)4129   void Ssat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
4130     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4131     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4132     VIXL_ASSERT(allow_macro_instructions_);
4133     VIXL_ASSERT(OutsideITBlock());
4134     MacroEmissionCheckScope guard(this);
4135     ITScope it_scope(this, &cond, guard);
4136     ssat(cond, rd, imm, operand);
4137   }
Ssat(Register rd,uint32_t imm,const Operand & operand)4138   void Ssat(Register rd, uint32_t imm, const Operand& operand) {
4139     Ssat(al, rd, imm, operand);
4140   }
4141 
Ssat16(Condition cond,Register rd,uint32_t imm,Register rn)4142   void Ssat16(Condition cond, Register rd, uint32_t imm, Register rn) {
4143     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4144     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4145     VIXL_ASSERT(allow_macro_instructions_);
4146     VIXL_ASSERT(OutsideITBlock());
4147     MacroEmissionCheckScope guard(this);
4148     ITScope it_scope(this, &cond, guard);
4149     ssat16(cond, rd, imm, rn);
4150   }
Ssat16(Register rd,uint32_t imm,Register rn)4151   void Ssat16(Register rd, uint32_t imm, Register rn) {
4152     Ssat16(al, rd, imm, rn);
4153   }
4154 
Ssax(Condition cond,Register rd,Register rn,Register rm)4155   void Ssax(Condition cond, Register rd, Register rn, Register rm) {
4156     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4157     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4158     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4159     VIXL_ASSERT(allow_macro_instructions_);
4160     VIXL_ASSERT(OutsideITBlock());
4161     MacroEmissionCheckScope guard(this);
4162     ITScope it_scope(this, &cond, guard);
4163     ssax(cond, rd, rn, rm);
4164   }
Ssax(Register rd,Register rn,Register rm)4165   void Ssax(Register rd, Register rn, Register rm) { Ssax(al, rd, rn, rm); }
4166 
Ssub16(Condition cond,Register rd,Register rn,Register rm)4167   void Ssub16(Condition cond, Register rd, Register rn, Register rm) {
4168     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4169     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4170     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4171     VIXL_ASSERT(allow_macro_instructions_);
4172     VIXL_ASSERT(OutsideITBlock());
4173     MacroEmissionCheckScope guard(this);
4174     ITScope it_scope(this, &cond, guard);
4175     ssub16(cond, rd, rn, rm);
4176   }
Ssub16(Register rd,Register rn,Register rm)4177   void Ssub16(Register rd, Register rn, Register rm) { Ssub16(al, rd, rn, rm); }
4178 
Ssub8(Condition cond,Register rd,Register rn,Register rm)4179   void Ssub8(Condition cond, Register rd, Register rn, Register rm) {
4180     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4181     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4182     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4183     VIXL_ASSERT(allow_macro_instructions_);
4184     VIXL_ASSERT(OutsideITBlock());
4185     MacroEmissionCheckScope guard(this);
4186     ITScope it_scope(this, &cond, guard);
4187     ssub8(cond, rd, rn, rm);
4188   }
Ssub8(Register rd,Register rn,Register rm)4189   void Ssub8(Register rd, Register rn, Register rm) { Ssub8(al, rd, rn, rm); }
4190 
Stl(Condition cond,Register rt,const MemOperand & operand)4191   void Stl(Condition cond, Register rt, const MemOperand& operand) {
4192     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4193     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4194     VIXL_ASSERT(allow_macro_instructions_);
4195     VIXL_ASSERT(OutsideITBlock());
4196     MacroEmissionCheckScope guard(this);
4197     ITScope it_scope(this, &cond, guard);
4198     stl(cond, rt, operand);
4199   }
Stl(Register rt,const MemOperand & operand)4200   void Stl(Register rt, const MemOperand& operand) { Stl(al, rt, operand); }
4201 
Stlb(Condition cond,Register rt,const MemOperand & operand)4202   void Stlb(Condition cond, Register rt, const MemOperand& operand) {
4203     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4204     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4205     VIXL_ASSERT(allow_macro_instructions_);
4206     VIXL_ASSERT(OutsideITBlock());
4207     MacroEmissionCheckScope guard(this);
4208     ITScope it_scope(this, &cond, guard);
4209     stlb(cond, rt, operand);
4210   }
Stlb(Register rt,const MemOperand & operand)4211   void Stlb(Register rt, const MemOperand& operand) { Stlb(al, rt, operand); }
4212 
Stlex(Condition cond,Register rd,Register rt,const MemOperand & operand)4213   void Stlex(Condition cond,
4214              Register rd,
4215              Register rt,
4216              const MemOperand& operand) {
4217     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4218     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4219     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4220     VIXL_ASSERT(allow_macro_instructions_);
4221     VIXL_ASSERT(OutsideITBlock());
4222     MacroEmissionCheckScope guard(this);
4223     ITScope it_scope(this, &cond, guard);
4224     stlex(cond, rd, rt, operand);
4225   }
Stlex(Register rd,Register rt,const MemOperand & operand)4226   void Stlex(Register rd, Register rt, const MemOperand& operand) {
4227     Stlex(al, rd, rt, operand);
4228   }
4229 
Stlexb(Condition cond,Register rd,Register rt,const MemOperand & operand)4230   void Stlexb(Condition cond,
4231               Register rd,
4232               Register rt,
4233               const MemOperand& operand) {
4234     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4235     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4236     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4237     VIXL_ASSERT(allow_macro_instructions_);
4238     VIXL_ASSERT(OutsideITBlock());
4239     MacroEmissionCheckScope guard(this);
4240     ITScope it_scope(this, &cond, guard);
4241     stlexb(cond, rd, rt, operand);
4242   }
Stlexb(Register rd,Register rt,const MemOperand & operand)4243   void Stlexb(Register rd, Register rt, const MemOperand& operand) {
4244     Stlexb(al, rd, rt, operand);
4245   }
4246 
Stlexd(Condition cond,Register rd,Register rt,Register rt2,const MemOperand & operand)4247   void Stlexd(Condition cond,
4248               Register rd,
4249               Register rt,
4250               Register rt2,
4251               const MemOperand& operand) {
4252     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4253     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4254     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4255     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4256     VIXL_ASSERT(allow_macro_instructions_);
4257     VIXL_ASSERT(OutsideITBlock());
4258     MacroEmissionCheckScope guard(this);
4259     ITScope it_scope(this, &cond, guard);
4260     stlexd(cond, rd, rt, rt2, operand);
4261   }
Stlexd(Register rd,Register rt,Register rt2,const MemOperand & operand)4262   void Stlexd(Register rd,
4263               Register rt,
4264               Register rt2,
4265               const MemOperand& operand) {
4266     Stlexd(al, rd, rt, rt2, operand);
4267   }
4268 
Stlexh(Condition cond,Register rd,Register rt,const MemOperand & operand)4269   void Stlexh(Condition cond,
4270               Register rd,
4271               Register rt,
4272               const MemOperand& operand) {
4273     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4274     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4275     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4276     VIXL_ASSERT(allow_macro_instructions_);
4277     VIXL_ASSERT(OutsideITBlock());
4278     MacroEmissionCheckScope guard(this);
4279     ITScope it_scope(this, &cond, guard);
4280     stlexh(cond, rd, rt, operand);
4281   }
Stlexh(Register rd,Register rt,const MemOperand & operand)4282   void Stlexh(Register rd, Register rt, const MemOperand& operand) {
4283     Stlexh(al, rd, rt, operand);
4284   }
4285 
Stlh(Condition cond,Register rt,const MemOperand & operand)4286   void Stlh(Condition cond, Register rt, const MemOperand& operand) {
4287     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4288     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4289     VIXL_ASSERT(allow_macro_instructions_);
4290     VIXL_ASSERT(OutsideITBlock());
4291     MacroEmissionCheckScope guard(this);
4292     ITScope it_scope(this, &cond, guard);
4293     stlh(cond, rt, operand);
4294   }
Stlh(Register rt,const MemOperand & operand)4295   void Stlh(Register rt, const MemOperand& operand) { Stlh(al, rt, operand); }
4296 
Stm(Condition cond,Register rn,WriteBack write_back,RegisterList registers)4297   void Stm(Condition cond,
4298            Register rn,
4299            WriteBack write_back,
4300            RegisterList registers) {
4301     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4302     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4303     VIXL_ASSERT(allow_macro_instructions_);
4304     VIXL_ASSERT(OutsideITBlock());
4305     MacroEmissionCheckScope guard(this);
4306     ITScope it_scope(this, &cond, guard);
4307     stm(cond, rn, write_back, registers);
4308   }
Stm(Register rn,WriteBack write_back,RegisterList registers)4309   void Stm(Register rn, WriteBack write_back, RegisterList registers) {
4310     Stm(al, rn, write_back, registers);
4311   }
4312 
Stmda(Condition cond,Register rn,WriteBack write_back,RegisterList registers)4313   void Stmda(Condition cond,
4314              Register rn,
4315              WriteBack write_back,
4316              RegisterList registers) {
4317     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4318     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4319     VIXL_ASSERT(allow_macro_instructions_);
4320     VIXL_ASSERT(OutsideITBlock());
4321     MacroEmissionCheckScope guard(this);
4322     ITScope it_scope(this, &cond, guard);
4323     stmda(cond, rn, write_back, registers);
4324   }
Stmda(Register rn,WriteBack write_back,RegisterList registers)4325   void Stmda(Register rn, WriteBack write_back, RegisterList registers) {
4326     Stmda(al, rn, write_back, registers);
4327   }
4328 
Stmdb(Condition cond,Register rn,WriteBack write_back,RegisterList registers)4329   void Stmdb(Condition cond,
4330              Register rn,
4331              WriteBack write_back,
4332              RegisterList registers) {
4333     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4334     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4335     VIXL_ASSERT(allow_macro_instructions_);
4336     VIXL_ASSERT(OutsideITBlock());
4337     MacroEmissionCheckScope guard(this);
4338     ITScope it_scope(this, &cond, guard);
4339     stmdb(cond, rn, write_back, registers);
4340   }
Stmdb(Register rn,WriteBack write_back,RegisterList registers)4341   void Stmdb(Register rn, WriteBack write_back, RegisterList registers) {
4342     Stmdb(al, rn, write_back, registers);
4343   }
4344 
Stmea(Condition cond,Register rn,WriteBack write_back,RegisterList registers)4345   void Stmea(Condition cond,
4346              Register rn,
4347              WriteBack write_back,
4348              RegisterList registers) {
4349     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4350     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4351     VIXL_ASSERT(allow_macro_instructions_);
4352     VIXL_ASSERT(OutsideITBlock());
4353     MacroEmissionCheckScope guard(this);
4354     ITScope it_scope(this, &cond, guard);
4355     stmea(cond, rn, write_back, registers);
4356   }
Stmea(Register rn,WriteBack write_back,RegisterList registers)4357   void Stmea(Register rn, WriteBack write_back, RegisterList registers) {
4358     Stmea(al, rn, write_back, registers);
4359   }
4360 
Stmed(Condition cond,Register rn,WriteBack write_back,RegisterList registers)4361   void Stmed(Condition cond,
4362              Register rn,
4363              WriteBack write_back,
4364              RegisterList registers) {
4365     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4366     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4367     VIXL_ASSERT(allow_macro_instructions_);
4368     VIXL_ASSERT(OutsideITBlock());
4369     MacroEmissionCheckScope guard(this);
4370     ITScope it_scope(this, &cond, guard);
4371     stmed(cond, rn, write_back, registers);
4372   }
Stmed(Register rn,WriteBack write_back,RegisterList registers)4373   void Stmed(Register rn, WriteBack write_back, RegisterList registers) {
4374     Stmed(al, rn, write_back, registers);
4375   }
4376 
Stmfa(Condition cond,Register rn,WriteBack write_back,RegisterList registers)4377   void Stmfa(Condition cond,
4378              Register rn,
4379              WriteBack write_back,
4380              RegisterList registers) {
4381     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4382     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4383     VIXL_ASSERT(allow_macro_instructions_);
4384     VIXL_ASSERT(OutsideITBlock());
4385     MacroEmissionCheckScope guard(this);
4386     ITScope it_scope(this, &cond, guard);
4387     stmfa(cond, rn, write_back, registers);
4388   }
Stmfa(Register rn,WriteBack write_back,RegisterList registers)4389   void Stmfa(Register rn, WriteBack write_back, RegisterList registers) {
4390     Stmfa(al, rn, write_back, registers);
4391   }
4392 
Stmfd(Condition cond,Register rn,WriteBack write_back,RegisterList registers)4393   void Stmfd(Condition cond,
4394              Register rn,
4395              WriteBack write_back,
4396              RegisterList registers) {
4397     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4398     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4399     VIXL_ASSERT(allow_macro_instructions_);
4400     VIXL_ASSERT(OutsideITBlock());
4401     MacroEmissionCheckScope guard(this);
4402     ITScope it_scope(this, &cond, guard);
4403     stmfd(cond, rn, write_back, registers);
4404   }
Stmfd(Register rn,WriteBack write_back,RegisterList registers)4405   void Stmfd(Register rn, WriteBack write_back, RegisterList registers) {
4406     Stmfd(al, rn, write_back, registers);
4407   }
4408 
Stmib(Condition cond,Register rn,WriteBack write_back,RegisterList registers)4409   void Stmib(Condition cond,
4410              Register rn,
4411              WriteBack write_back,
4412              RegisterList registers) {
4413     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4414     VIXL_ASSERT(!AliasesAvailableScratchRegister(registers));
4415     VIXL_ASSERT(allow_macro_instructions_);
4416     VIXL_ASSERT(OutsideITBlock());
4417     MacroEmissionCheckScope guard(this);
4418     ITScope it_scope(this, &cond, guard);
4419     stmib(cond, rn, write_back, registers);
4420   }
Stmib(Register rn,WriteBack write_back,RegisterList registers)4421   void Stmib(Register rn, WriteBack write_back, RegisterList registers) {
4422     Stmib(al, rn, write_back, registers);
4423   }
4424 
Str(Condition cond,Register rt,const MemOperand & operand)4425   void Str(Condition cond, Register rt, const MemOperand& operand) {
4426     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4427     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4428     VIXL_ASSERT(allow_macro_instructions_);
4429     VIXL_ASSERT(OutsideITBlock());
4430     MacroEmissionCheckScope guard(this);
4431     bool can_use_it =
4432         // STR{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4433         (operand.IsImmediate() && rt.IsLow() &&
4434          operand.GetBaseRegister().IsLow() &&
4435          operand.IsOffsetImmediateWithinRange(0, 124, 4) &&
4436          (operand.GetAddrMode() == Offset)) ||
4437         // STR{<c>}{<q>} <Rt>, [SP{, #{+}<imm>}] ; T2
4438         (operand.IsImmediate() && rt.IsLow() &&
4439          operand.GetBaseRegister().IsSP() &&
4440          operand.IsOffsetImmediateWithinRange(0, 1020, 4) &&
4441          (operand.GetAddrMode() == Offset)) ||
4442         // STR{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4443         (operand.IsPlainRegister() && rt.IsLow() &&
4444          operand.GetBaseRegister().IsLow() &&
4445          operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4446          (operand.GetAddrMode() == Offset));
4447     ITScope it_scope(this, &cond, guard, can_use_it);
4448     str(cond, rt, operand);
4449   }
Str(Register rt,const MemOperand & operand)4450   void Str(Register rt, const MemOperand& operand) { Str(al, rt, operand); }
4451 
Strb(Condition cond,Register rt,const MemOperand & operand)4452   void Strb(Condition cond, Register rt, const MemOperand& operand) {
4453     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4454     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4455     VIXL_ASSERT(allow_macro_instructions_);
4456     VIXL_ASSERT(OutsideITBlock());
4457     MacroEmissionCheckScope guard(this);
4458     bool can_use_it =
4459         // STRB{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4460         (operand.IsImmediate() && rt.IsLow() &&
4461          operand.GetBaseRegister().IsLow() &&
4462          operand.IsOffsetImmediateWithinRange(0, 31) &&
4463          (operand.GetAddrMode() == Offset)) ||
4464         // STRB{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4465         (operand.IsPlainRegister() && rt.IsLow() &&
4466          operand.GetBaseRegister().IsLow() &&
4467          operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4468          (operand.GetAddrMode() == Offset));
4469     ITScope it_scope(this, &cond, guard, can_use_it);
4470     strb(cond, rt, operand);
4471   }
Strb(Register rt,const MemOperand & operand)4472   void Strb(Register rt, const MemOperand& operand) { Strb(al, rt, operand); }
4473 
Strd(Condition cond,Register rt,Register rt2,const MemOperand & operand)4474   void Strd(Condition cond,
4475             Register rt,
4476             Register rt2,
4477             const MemOperand& operand) {
4478     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4479     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4480     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4481     VIXL_ASSERT(allow_macro_instructions_);
4482     VIXL_ASSERT(OutsideITBlock());
4483     MacroEmissionCheckScope guard(this);
4484     ITScope it_scope(this, &cond, guard);
4485     strd(cond, rt, rt2, operand);
4486   }
Strd(Register rt,Register rt2,const MemOperand & operand)4487   void Strd(Register rt, Register rt2, const MemOperand& operand) {
4488     Strd(al, rt, rt2, operand);
4489   }
4490 
Strex(Condition cond,Register rd,Register rt,const MemOperand & operand)4491   void Strex(Condition cond,
4492              Register rd,
4493              Register rt,
4494              const MemOperand& operand) {
4495     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4496     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4497     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4498     VIXL_ASSERT(allow_macro_instructions_);
4499     VIXL_ASSERT(OutsideITBlock());
4500     MacroEmissionCheckScope guard(this);
4501     ITScope it_scope(this, &cond, guard);
4502     strex(cond, rd, rt, operand);
4503   }
Strex(Register rd,Register rt,const MemOperand & operand)4504   void Strex(Register rd, Register rt, const MemOperand& operand) {
4505     Strex(al, rd, rt, operand);
4506   }
4507 
Strexb(Condition cond,Register rd,Register rt,const MemOperand & operand)4508   void Strexb(Condition cond,
4509               Register rd,
4510               Register rt,
4511               const MemOperand& operand) {
4512     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4513     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4514     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4515     VIXL_ASSERT(allow_macro_instructions_);
4516     VIXL_ASSERT(OutsideITBlock());
4517     MacroEmissionCheckScope guard(this);
4518     ITScope it_scope(this, &cond, guard);
4519     strexb(cond, rd, rt, operand);
4520   }
Strexb(Register rd,Register rt,const MemOperand & operand)4521   void Strexb(Register rd, Register rt, const MemOperand& operand) {
4522     Strexb(al, rd, rt, operand);
4523   }
4524 
Strexd(Condition cond,Register rd,Register rt,Register rt2,const MemOperand & operand)4525   void Strexd(Condition cond,
4526               Register rd,
4527               Register rt,
4528               Register rt2,
4529               const MemOperand& operand) {
4530     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4531     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4532     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
4533     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4534     VIXL_ASSERT(allow_macro_instructions_);
4535     VIXL_ASSERT(OutsideITBlock());
4536     MacroEmissionCheckScope guard(this);
4537     ITScope it_scope(this, &cond, guard);
4538     strexd(cond, rd, rt, rt2, operand);
4539   }
Strexd(Register rd,Register rt,Register rt2,const MemOperand & operand)4540   void Strexd(Register rd,
4541               Register rt,
4542               Register rt2,
4543               const MemOperand& operand) {
4544     Strexd(al, rd, rt, rt2, operand);
4545   }
4546 
Strexh(Condition cond,Register rd,Register rt,const MemOperand & operand)4547   void Strexh(Condition cond,
4548               Register rd,
4549               Register rt,
4550               const MemOperand& operand) {
4551     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4552     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4553     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4554     VIXL_ASSERT(allow_macro_instructions_);
4555     VIXL_ASSERT(OutsideITBlock());
4556     MacroEmissionCheckScope guard(this);
4557     ITScope it_scope(this, &cond, guard);
4558     strexh(cond, rd, rt, operand);
4559   }
Strexh(Register rd,Register rt,const MemOperand & operand)4560   void Strexh(Register rd, Register rt, const MemOperand& operand) {
4561     Strexh(al, rd, rt, operand);
4562   }
4563 
Strh(Condition cond,Register rt,const MemOperand & operand)4564   void Strh(Condition cond, Register rt, const MemOperand& operand) {
4565     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
4566     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4567     VIXL_ASSERT(allow_macro_instructions_);
4568     VIXL_ASSERT(OutsideITBlock());
4569     MacroEmissionCheckScope guard(this);
4570     bool can_use_it =
4571         // STRH{<c>}{<q>} <Rt>, [<Rn> {, #{+}<imm>}] ; T1
4572         (operand.IsImmediate() && rt.IsLow() &&
4573          operand.GetBaseRegister().IsLow() &&
4574          operand.IsOffsetImmediateWithinRange(0, 62, 2) &&
4575          (operand.GetAddrMode() == Offset)) ||
4576         // STRH{<c>}{<q>} <Rt>, [<Rn>, {+}<Rm>] ; T1
4577         (operand.IsPlainRegister() && rt.IsLow() &&
4578          operand.GetBaseRegister().IsLow() &&
4579          operand.GetOffsetRegister().IsLow() && operand.GetSign().IsPlus() &&
4580          (operand.GetAddrMode() == Offset));
4581     ITScope it_scope(this, &cond, guard, can_use_it);
4582     strh(cond, rt, operand);
4583   }
Strh(Register rt,const MemOperand & operand)4584   void Strh(Register rt, const MemOperand& operand) { Strh(al, rt, operand); }
4585 
Sub(Condition cond,Register rd,Register rn,const Operand & operand)4586   void Sub(Condition cond, Register rd, Register rn, const Operand& operand) {
4587     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4588     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4589     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4590     VIXL_ASSERT(allow_macro_instructions_);
4591     VIXL_ASSERT(OutsideITBlock());
4592     MacroEmissionCheckScope guard(this);
4593     if (cond.Is(al) && rd.Is(rn) && operand.IsImmediate()) {
4594       uint32_t immediate = operand.GetImmediate();
4595       if (immediate == 0) {
4596         return;
4597       }
4598     }
4599     bool can_use_it =
4600         // SUB<c>{<q>} <Rd>, <Rn>, #<imm3> ; T1
4601         (operand.IsImmediate() && (operand.GetImmediate() <= 7) && rn.IsLow() &&
4602          rd.IsLow()) ||
4603         // SUB<c>{<q>} {<Rdn>,} <Rdn>, #<imm8> ; T2
4604         (operand.IsImmediate() && (operand.GetImmediate() <= 255) &&
4605          rd.IsLow() && rn.Is(rd)) ||
4606         // SUB<c>{<q>} <Rd>, <Rn>, <Rm>
4607         (operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4608          operand.GetBaseRegister().IsLow());
4609     ITScope it_scope(this, &cond, guard, can_use_it);
4610     sub(cond, rd, rn, operand);
4611   }
Sub(Register rd,Register rn,const Operand & operand)4612   void Sub(Register rd, Register rn, const Operand& operand) {
4613     Sub(al, rd, rn, operand);
4614   }
Sub(FlagsUpdate flags,Condition cond,Register rd,Register rn,const Operand & operand)4615   void Sub(FlagsUpdate flags,
4616            Condition cond,
4617            Register rd,
4618            Register rn,
4619            const Operand& operand) {
4620     switch (flags) {
4621       case LeaveFlags:
4622         Sub(cond, rd, rn, operand);
4623         break;
4624       case SetFlags:
4625         Subs(cond, rd, rn, operand);
4626         break;
4627       case DontCare:
4628         bool setflags_is_smaller =
4629             IsUsingT32() && cond.Is(al) &&
4630             ((operand.IsPlainRegister() && rd.IsLow() && rn.IsLow() &&
4631               operand.GetBaseRegister().IsLow()) ||
4632              (operand.IsImmediate() &&
4633               ((rd.IsLow() && rn.IsLow() && (operand.GetImmediate() < 8)) ||
4634                (rd.IsLow() && rn.Is(rd) && (operand.GetImmediate() < 256)))));
4635         if (setflags_is_smaller) {
4636           Subs(cond, rd, rn, operand);
4637         } else {
4638           bool changed_op_is_smaller =
4639               operand.IsImmediate() && (operand.GetSignedImmediate() < 0) &&
4640               ((rd.IsLow() && rn.IsLow() &&
4641                 (operand.GetSignedImmediate() >= -7)) ||
4642                (rd.IsLow() && rn.Is(rd) &&
4643                 (operand.GetSignedImmediate() >= -255)));
4644           if (changed_op_is_smaller) {
4645             Adds(cond, rd, rn, -operand.GetSignedImmediate());
4646           } else {
4647             Sub(cond, rd, rn, operand);
4648           }
4649         }
4650         break;
4651     }
4652   }
Sub(FlagsUpdate flags,Register rd,Register rn,const Operand & operand)4653   void Sub(FlagsUpdate flags,
4654            Register rd,
4655            Register rn,
4656            const Operand& operand) {
4657     Sub(flags, al, rd, rn, operand);
4658   }
4659 
Subs(Condition cond,Register rd,Register rn,const Operand & operand)4660   void Subs(Condition cond, Register rd, Register rn, const Operand& operand) {
4661     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4662     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4663     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4664     VIXL_ASSERT(allow_macro_instructions_);
4665     VIXL_ASSERT(OutsideITBlock());
4666     MacroEmissionCheckScope guard(this);
4667     ITScope it_scope(this, &cond, guard);
4668     subs(cond, rd, rn, operand);
4669   }
Subs(Register rd,Register rn,const Operand & operand)4670   void Subs(Register rd, Register rn, const Operand& operand) {
4671     Subs(al, rd, rn, operand);
4672   }
4673 
Svc(Condition cond,uint32_t imm)4674   void Svc(Condition cond, uint32_t imm) {
4675     VIXL_ASSERT(allow_macro_instructions_);
4676     VIXL_ASSERT(OutsideITBlock());
4677     MacroEmissionCheckScope guard(this);
4678     ITScope it_scope(this, &cond, guard);
4679     svc(cond, imm);
4680   }
Svc(uint32_t imm)4681   void Svc(uint32_t imm) { Svc(al, imm); }
4682 
Sxtab(Condition cond,Register rd,Register rn,const Operand & operand)4683   void Sxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
4684     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4685     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4686     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4687     VIXL_ASSERT(allow_macro_instructions_);
4688     VIXL_ASSERT(OutsideITBlock());
4689     MacroEmissionCheckScope guard(this);
4690     ITScope it_scope(this, &cond, guard);
4691     sxtab(cond, rd, rn, operand);
4692   }
Sxtab(Register rd,Register rn,const Operand & operand)4693   void Sxtab(Register rd, Register rn, const Operand& operand) {
4694     Sxtab(al, rd, rn, operand);
4695   }
4696 
Sxtab16(Condition cond,Register rd,Register rn,const Operand & operand)4697   void Sxtab16(Condition cond,
4698                Register rd,
4699                Register rn,
4700                const Operand& operand) {
4701     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4702     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4703     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4704     VIXL_ASSERT(allow_macro_instructions_);
4705     VIXL_ASSERT(OutsideITBlock());
4706     MacroEmissionCheckScope guard(this);
4707     ITScope it_scope(this, &cond, guard);
4708     sxtab16(cond, rd, rn, operand);
4709   }
Sxtab16(Register rd,Register rn,const Operand & operand)4710   void Sxtab16(Register rd, Register rn, const Operand& operand) {
4711     Sxtab16(al, rd, rn, operand);
4712   }
4713 
Sxtah(Condition cond,Register rd,Register rn,const Operand & operand)4714   void Sxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
4715     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4716     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4717     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4718     VIXL_ASSERT(allow_macro_instructions_);
4719     VIXL_ASSERT(OutsideITBlock());
4720     MacroEmissionCheckScope guard(this);
4721     ITScope it_scope(this, &cond, guard);
4722     sxtah(cond, rd, rn, operand);
4723   }
Sxtah(Register rd,Register rn,const Operand & operand)4724   void Sxtah(Register rd, Register rn, const Operand& operand) {
4725     Sxtah(al, rd, rn, operand);
4726   }
4727 
Sxtb(Condition cond,Register rd,const Operand & operand)4728   void Sxtb(Condition cond, Register rd, const Operand& operand) {
4729     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4730     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4731     VIXL_ASSERT(allow_macro_instructions_);
4732     VIXL_ASSERT(OutsideITBlock());
4733     MacroEmissionCheckScope guard(this);
4734     ITScope it_scope(this, &cond, guard);
4735     sxtb(cond, rd, operand);
4736   }
Sxtb(Register rd,const Operand & operand)4737   void Sxtb(Register rd, const Operand& operand) { Sxtb(al, rd, operand); }
4738 
Sxtb16(Condition cond,Register rd,const Operand & operand)4739   void Sxtb16(Condition cond, Register rd, const Operand& operand) {
4740     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4741     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4742     VIXL_ASSERT(allow_macro_instructions_);
4743     VIXL_ASSERT(OutsideITBlock());
4744     MacroEmissionCheckScope guard(this);
4745     ITScope it_scope(this, &cond, guard);
4746     sxtb16(cond, rd, operand);
4747   }
Sxtb16(Register rd,const Operand & operand)4748   void Sxtb16(Register rd, const Operand& operand) { Sxtb16(al, rd, operand); }
4749 
Sxth(Condition cond,Register rd,const Operand & operand)4750   void Sxth(Condition cond, Register rd, const Operand& operand) {
4751     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4752     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4753     VIXL_ASSERT(allow_macro_instructions_);
4754     VIXL_ASSERT(OutsideITBlock());
4755     MacroEmissionCheckScope guard(this);
4756     ITScope it_scope(this, &cond, guard);
4757     sxth(cond, rd, operand);
4758   }
Sxth(Register rd,const Operand & operand)4759   void Sxth(Register rd, const Operand& operand) { Sxth(al, rd, operand); }
4760 
Teq(Condition cond,Register rn,const Operand & operand)4761   void Teq(Condition cond, Register rn, const Operand& operand) {
4762     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4763     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4764     VIXL_ASSERT(allow_macro_instructions_);
4765     VIXL_ASSERT(OutsideITBlock());
4766     MacroEmissionCheckScope guard(this);
4767     ITScope it_scope(this, &cond, guard);
4768     teq(cond, rn, operand);
4769   }
Teq(Register rn,const Operand & operand)4770   void Teq(Register rn, const Operand& operand) { Teq(al, rn, operand); }
4771 
Tst(Condition cond,Register rn,const Operand & operand)4772   void Tst(Condition cond, Register rn, const Operand& operand) {
4773     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4774     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
4775     VIXL_ASSERT(allow_macro_instructions_);
4776     VIXL_ASSERT(OutsideITBlock());
4777     MacroEmissionCheckScope guard(this);
4778     bool can_use_it =
4779         // TST{<c>}{<q>} <Rn>, <Rm> ; T1
4780         operand.IsPlainRegister() && rn.IsLow() &&
4781         operand.GetBaseRegister().IsLow();
4782     ITScope it_scope(this, &cond, guard, can_use_it);
4783     tst(cond, rn, operand);
4784   }
Tst(Register rn,const Operand & operand)4785   void Tst(Register rn, const Operand& operand) { Tst(al, rn, operand); }
4786 
Uadd16(Condition cond,Register rd,Register rn,Register rm)4787   void Uadd16(Condition cond, Register rd, Register rn, Register rm) {
4788     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4789     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4790     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4791     VIXL_ASSERT(allow_macro_instructions_);
4792     VIXL_ASSERT(OutsideITBlock());
4793     MacroEmissionCheckScope guard(this);
4794     ITScope it_scope(this, &cond, guard);
4795     uadd16(cond, rd, rn, rm);
4796   }
Uadd16(Register rd,Register rn,Register rm)4797   void Uadd16(Register rd, Register rn, Register rm) { Uadd16(al, rd, rn, rm); }
4798 
Uadd8(Condition cond,Register rd,Register rn,Register rm)4799   void Uadd8(Condition cond, Register rd, Register rn, Register rm) {
4800     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4801     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4802     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4803     VIXL_ASSERT(allow_macro_instructions_);
4804     VIXL_ASSERT(OutsideITBlock());
4805     MacroEmissionCheckScope guard(this);
4806     ITScope it_scope(this, &cond, guard);
4807     uadd8(cond, rd, rn, rm);
4808   }
Uadd8(Register rd,Register rn,Register rm)4809   void Uadd8(Register rd, Register rn, Register rm) { Uadd8(al, rd, rn, rm); }
4810 
Uasx(Condition cond,Register rd,Register rn,Register rm)4811   void Uasx(Condition cond, Register rd, Register rn, Register rm) {
4812     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4813     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4814     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4815     VIXL_ASSERT(allow_macro_instructions_);
4816     VIXL_ASSERT(OutsideITBlock());
4817     MacroEmissionCheckScope guard(this);
4818     ITScope it_scope(this, &cond, guard);
4819     uasx(cond, rd, rn, rm);
4820   }
Uasx(Register rd,Register rn,Register rm)4821   void Uasx(Register rd, Register rn, Register rm) { Uasx(al, rd, rn, rm); }
4822 
Ubfx(Condition cond,Register rd,Register rn,uint32_t lsb,uint32_t width)4823   void Ubfx(
4824       Condition cond, Register rd, Register rn, uint32_t lsb, uint32_t width) {
4825     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4826     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4827     VIXL_ASSERT(allow_macro_instructions_);
4828     VIXL_ASSERT(OutsideITBlock());
4829     MacroEmissionCheckScope guard(this);
4830     ITScope it_scope(this, &cond, guard);
4831     ubfx(cond, rd, rn, lsb, width);
4832   }
Ubfx(Register rd,Register rn,uint32_t lsb,uint32_t width)4833   void Ubfx(Register rd, Register rn, uint32_t lsb, uint32_t width) {
4834     Ubfx(al, rd, rn, lsb, width);
4835   }
4836 
Udf(Condition cond,uint32_t imm)4837   void Udf(Condition cond, uint32_t imm) {
4838     VIXL_ASSERT(allow_macro_instructions_);
4839     VIXL_ASSERT(OutsideITBlock());
4840     MacroEmissionCheckScope guard(this);
4841     ITScope it_scope(this, &cond, guard);
4842     udf(cond, imm);
4843   }
Udf(uint32_t imm)4844   void Udf(uint32_t imm) { Udf(al, imm); }
4845 
Udiv(Condition cond,Register rd,Register rn,Register rm)4846   void Udiv(Condition cond, Register rd, Register rn, Register rm) {
4847     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4848     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4849     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4850     VIXL_ASSERT(allow_macro_instructions_);
4851     VIXL_ASSERT(OutsideITBlock());
4852     MacroEmissionCheckScope guard(this);
4853     ITScope it_scope(this, &cond, guard);
4854     udiv(cond, rd, rn, rm);
4855   }
Udiv(Register rd,Register rn,Register rm)4856   void Udiv(Register rd, Register rn, Register rm) { Udiv(al, rd, rn, rm); }
4857 
Uhadd16(Condition cond,Register rd,Register rn,Register rm)4858   void Uhadd16(Condition cond, Register rd, Register rn, Register rm) {
4859     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4860     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4861     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4862     VIXL_ASSERT(allow_macro_instructions_);
4863     VIXL_ASSERT(OutsideITBlock());
4864     MacroEmissionCheckScope guard(this);
4865     ITScope it_scope(this, &cond, guard);
4866     uhadd16(cond, rd, rn, rm);
4867   }
Uhadd16(Register rd,Register rn,Register rm)4868   void Uhadd16(Register rd, Register rn, Register rm) {
4869     Uhadd16(al, rd, rn, rm);
4870   }
4871 
Uhadd8(Condition cond,Register rd,Register rn,Register rm)4872   void Uhadd8(Condition cond, Register rd, Register rn, Register rm) {
4873     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4874     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4875     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4876     VIXL_ASSERT(allow_macro_instructions_);
4877     VIXL_ASSERT(OutsideITBlock());
4878     MacroEmissionCheckScope guard(this);
4879     ITScope it_scope(this, &cond, guard);
4880     uhadd8(cond, rd, rn, rm);
4881   }
Uhadd8(Register rd,Register rn,Register rm)4882   void Uhadd8(Register rd, Register rn, Register rm) { Uhadd8(al, rd, rn, rm); }
4883 
Uhasx(Condition cond,Register rd,Register rn,Register rm)4884   void Uhasx(Condition cond, Register rd, Register rn, Register rm) {
4885     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4886     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4887     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4888     VIXL_ASSERT(allow_macro_instructions_);
4889     VIXL_ASSERT(OutsideITBlock());
4890     MacroEmissionCheckScope guard(this);
4891     ITScope it_scope(this, &cond, guard);
4892     uhasx(cond, rd, rn, rm);
4893   }
Uhasx(Register rd,Register rn,Register rm)4894   void Uhasx(Register rd, Register rn, Register rm) { Uhasx(al, rd, rn, rm); }
4895 
Uhsax(Condition cond,Register rd,Register rn,Register rm)4896   void Uhsax(Condition cond, Register rd, Register rn, Register rm) {
4897     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4898     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4899     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4900     VIXL_ASSERT(allow_macro_instructions_);
4901     VIXL_ASSERT(OutsideITBlock());
4902     MacroEmissionCheckScope guard(this);
4903     ITScope it_scope(this, &cond, guard);
4904     uhsax(cond, rd, rn, rm);
4905   }
Uhsax(Register rd,Register rn,Register rm)4906   void Uhsax(Register rd, Register rn, Register rm) { Uhsax(al, rd, rn, rm); }
4907 
Uhsub16(Condition cond,Register rd,Register rn,Register rm)4908   void Uhsub16(Condition cond, Register rd, Register rn, Register rm) {
4909     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4910     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4911     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4912     VIXL_ASSERT(allow_macro_instructions_);
4913     VIXL_ASSERT(OutsideITBlock());
4914     MacroEmissionCheckScope guard(this);
4915     ITScope it_scope(this, &cond, guard);
4916     uhsub16(cond, rd, rn, rm);
4917   }
Uhsub16(Register rd,Register rn,Register rm)4918   void Uhsub16(Register rd, Register rn, Register rm) {
4919     Uhsub16(al, rd, rn, rm);
4920   }
4921 
Uhsub8(Condition cond,Register rd,Register rn,Register rm)4922   void Uhsub8(Condition cond, Register rd, Register rn, Register rm) {
4923     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
4924     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4925     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4926     VIXL_ASSERT(allow_macro_instructions_);
4927     VIXL_ASSERT(OutsideITBlock());
4928     MacroEmissionCheckScope guard(this);
4929     ITScope it_scope(this, &cond, guard);
4930     uhsub8(cond, rd, rn, rm);
4931   }
Uhsub8(Register rd,Register rn,Register rm)4932   void Uhsub8(Register rd, Register rn, Register rm) { Uhsub8(al, rd, rn, rm); }
4933 
Umaal(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)4934   void Umaal(
4935       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4936     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4937     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4938     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4939     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4940     VIXL_ASSERT(allow_macro_instructions_);
4941     VIXL_ASSERT(OutsideITBlock());
4942     MacroEmissionCheckScope guard(this);
4943     ITScope it_scope(this, &cond, guard);
4944     umaal(cond, rdlo, rdhi, rn, rm);
4945   }
Umaal(Register rdlo,Register rdhi,Register rn,Register rm)4946   void Umaal(Register rdlo, Register rdhi, Register rn, Register rm) {
4947     Umaal(al, rdlo, rdhi, rn, rm);
4948   }
4949 
Umlal(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)4950   void Umlal(
4951       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4952     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4953     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4954     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4955     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4956     VIXL_ASSERT(allow_macro_instructions_);
4957     VIXL_ASSERT(OutsideITBlock());
4958     MacroEmissionCheckScope guard(this);
4959     ITScope it_scope(this, &cond, guard);
4960     umlal(cond, rdlo, rdhi, rn, rm);
4961   }
Umlal(Register rdlo,Register rdhi,Register rn,Register rm)4962   void Umlal(Register rdlo, Register rdhi, Register rn, Register rm) {
4963     Umlal(al, rdlo, rdhi, rn, rm);
4964   }
Umlal(FlagsUpdate flags,Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)4965   void Umlal(FlagsUpdate flags,
4966              Condition cond,
4967              Register rdlo,
4968              Register rdhi,
4969              Register rn,
4970              Register rm) {
4971     switch (flags) {
4972       case LeaveFlags:
4973         Umlal(cond, rdlo, rdhi, rn, rm);
4974         break;
4975       case SetFlags:
4976         Umlals(cond, rdlo, rdhi, rn, rm);
4977         break;
4978       case DontCare:
4979         Umlal(cond, rdlo, rdhi, rn, rm);
4980         break;
4981     }
4982   }
Umlal(FlagsUpdate flags,Register rdlo,Register rdhi,Register rn,Register rm)4983   void Umlal(FlagsUpdate flags,
4984              Register rdlo,
4985              Register rdhi,
4986              Register rn,
4987              Register rm) {
4988     Umlal(flags, al, rdlo, rdhi, rn, rm);
4989   }
4990 
Umlals(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)4991   void Umlals(
4992       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
4993     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
4994     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
4995     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
4996     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
4997     VIXL_ASSERT(allow_macro_instructions_);
4998     VIXL_ASSERT(OutsideITBlock());
4999     MacroEmissionCheckScope guard(this);
5000     ITScope it_scope(this, &cond, guard);
5001     umlals(cond, rdlo, rdhi, rn, rm);
5002   }
Umlals(Register rdlo,Register rdhi,Register rn,Register rm)5003   void Umlals(Register rdlo, Register rdhi, Register rn, Register rm) {
5004     Umlals(al, rdlo, rdhi, rn, rm);
5005   }
5006 
Umull(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)5007   void Umull(
5008       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5009     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5010     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5011     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5012     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5013     VIXL_ASSERT(allow_macro_instructions_);
5014     VIXL_ASSERT(OutsideITBlock());
5015     MacroEmissionCheckScope guard(this);
5016     ITScope it_scope(this, &cond, guard);
5017     umull(cond, rdlo, rdhi, rn, rm);
5018   }
Umull(Register rdlo,Register rdhi,Register rn,Register rm)5019   void Umull(Register rdlo, Register rdhi, Register rn, Register rm) {
5020     Umull(al, rdlo, rdhi, rn, rm);
5021   }
Umull(FlagsUpdate flags,Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)5022   void Umull(FlagsUpdate flags,
5023              Condition cond,
5024              Register rdlo,
5025              Register rdhi,
5026              Register rn,
5027              Register rm) {
5028     switch (flags) {
5029       case LeaveFlags:
5030         Umull(cond, rdlo, rdhi, rn, rm);
5031         break;
5032       case SetFlags:
5033         Umulls(cond, rdlo, rdhi, rn, rm);
5034         break;
5035       case DontCare:
5036         Umull(cond, rdlo, rdhi, rn, rm);
5037         break;
5038     }
5039   }
Umull(FlagsUpdate flags,Register rdlo,Register rdhi,Register rn,Register rm)5040   void Umull(FlagsUpdate flags,
5041              Register rdlo,
5042              Register rdhi,
5043              Register rn,
5044              Register rm) {
5045     Umull(flags, al, rdlo, rdhi, rn, rm);
5046   }
5047 
Umulls(Condition cond,Register rdlo,Register rdhi,Register rn,Register rm)5048   void Umulls(
5049       Condition cond, Register rdlo, Register rdhi, Register rn, Register rm) {
5050     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdlo));
5051     VIXL_ASSERT(!AliasesAvailableScratchRegister(rdhi));
5052     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5053     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5054     VIXL_ASSERT(allow_macro_instructions_);
5055     VIXL_ASSERT(OutsideITBlock());
5056     MacroEmissionCheckScope guard(this);
5057     ITScope it_scope(this, &cond, guard);
5058     umulls(cond, rdlo, rdhi, rn, rm);
5059   }
Umulls(Register rdlo,Register rdhi,Register rn,Register rm)5060   void Umulls(Register rdlo, Register rdhi, Register rn, Register rm) {
5061     Umulls(al, rdlo, rdhi, rn, rm);
5062   }
5063 
Uqadd16(Condition cond,Register rd,Register rn,Register rm)5064   void Uqadd16(Condition cond, Register rd, Register rn, Register rm) {
5065     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5066     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5067     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5068     VIXL_ASSERT(allow_macro_instructions_);
5069     VIXL_ASSERT(OutsideITBlock());
5070     MacroEmissionCheckScope guard(this);
5071     ITScope it_scope(this, &cond, guard);
5072     uqadd16(cond, rd, rn, rm);
5073   }
Uqadd16(Register rd,Register rn,Register rm)5074   void Uqadd16(Register rd, Register rn, Register rm) {
5075     Uqadd16(al, rd, rn, rm);
5076   }
5077 
Uqadd8(Condition cond,Register rd,Register rn,Register rm)5078   void Uqadd8(Condition cond, Register rd, Register rn, Register rm) {
5079     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5080     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5081     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5082     VIXL_ASSERT(allow_macro_instructions_);
5083     VIXL_ASSERT(OutsideITBlock());
5084     MacroEmissionCheckScope guard(this);
5085     ITScope it_scope(this, &cond, guard);
5086     uqadd8(cond, rd, rn, rm);
5087   }
Uqadd8(Register rd,Register rn,Register rm)5088   void Uqadd8(Register rd, Register rn, Register rm) { Uqadd8(al, rd, rn, rm); }
5089 
Uqasx(Condition cond,Register rd,Register rn,Register rm)5090   void Uqasx(Condition cond, Register rd, Register rn, Register rm) {
5091     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5092     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5093     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5094     VIXL_ASSERT(allow_macro_instructions_);
5095     VIXL_ASSERT(OutsideITBlock());
5096     MacroEmissionCheckScope guard(this);
5097     ITScope it_scope(this, &cond, guard);
5098     uqasx(cond, rd, rn, rm);
5099   }
Uqasx(Register rd,Register rn,Register rm)5100   void Uqasx(Register rd, Register rn, Register rm) { Uqasx(al, rd, rn, rm); }
5101 
Uqsax(Condition cond,Register rd,Register rn,Register rm)5102   void Uqsax(Condition cond, Register rd, Register rn, Register rm) {
5103     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5104     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5105     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5106     VIXL_ASSERT(allow_macro_instructions_);
5107     VIXL_ASSERT(OutsideITBlock());
5108     MacroEmissionCheckScope guard(this);
5109     ITScope it_scope(this, &cond, guard);
5110     uqsax(cond, rd, rn, rm);
5111   }
Uqsax(Register rd,Register rn,Register rm)5112   void Uqsax(Register rd, Register rn, Register rm) { Uqsax(al, rd, rn, rm); }
5113 
Uqsub16(Condition cond,Register rd,Register rn,Register rm)5114   void Uqsub16(Condition cond, Register rd, Register rn, Register rm) {
5115     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5116     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5117     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5118     VIXL_ASSERT(allow_macro_instructions_);
5119     VIXL_ASSERT(OutsideITBlock());
5120     MacroEmissionCheckScope guard(this);
5121     ITScope it_scope(this, &cond, guard);
5122     uqsub16(cond, rd, rn, rm);
5123   }
Uqsub16(Register rd,Register rn,Register rm)5124   void Uqsub16(Register rd, Register rn, Register rm) {
5125     Uqsub16(al, rd, rn, rm);
5126   }
5127 
Uqsub8(Condition cond,Register rd,Register rn,Register rm)5128   void Uqsub8(Condition cond, Register rd, Register rn, Register rm) {
5129     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5130     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5131     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5132     VIXL_ASSERT(allow_macro_instructions_);
5133     VIXL_ASSERT(OutsideITBlock());
5134     MacroEmissionCheckScope guard(this);
5135     ITScope it_scope(this, &cond, guard);
5136     uqsub8(cond, rd, rn, rm);
5137   }
Uqsub8(Register rd,Register rn,Register rm)5138   void Uqsub8(Register rd, Register rn, Register rm) { Uqsub8(al, rd, rn, rm); }
5139 
Usad8(Condition cond,Register rd,Register rn,Register rm)5140   void Usad8(Condition cond, Register rd, Register rn, Register rm) {
5141     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5142     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5143     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5144     VIXL_ASSERT(allow_macro_instructions_);
5145     VIXL_ASSERT(OutsideITBlock());
5146     MacroEmissionCheckScope guard(this);
5147     ITScope it_scope(this, &cond, guard);
5148     usad8(cond, rd, rn, rm);
5149   }
Usad8(Register rd,Register rn,Register rm)5150   void Usad8(Register rd, Register rn, Register rm) { Usad8(al, rd, rn, rm); }
5151 
Usada8(Condition cond,Register rd,Register rn,Register rm,Register ra)5152   void Usada8(
5153       Condition cond, Register rd, Register rn, Register rm, Register ra) {
5154     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5155     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5156     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5157     VIXL_ASSERT(!AliasesAvailableScratchRegister(ra));
5158     VIXL_ASSERT(allow_macro_instructions_);
5159     VIXL_ASSERT(OutsideITBlock());
5160     MacroEmissionCheckScope guard(this);
5161     ITScope it_scope(this, &cond, guard);
5162     usada8(cond, rd, rn, rm, ra);
5163   }
Usada8(Register rd,Register rn,Register rm,Register ra)5164   void Usada8(Register rd, Register rn, Register rm, Register ra) {
5165     Usada8(al, rd, rn, rm, ra);
5166   }
5167 
Usat(Condition cond,Register rd,uint32_t imm,const Operand & operand)5168   void Usat(Condition cond, Register rd, uint32_t imm, const Operand& operand) {
5169     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5170     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5171     VIXL_ASSERT(allow_macro_instructions_);
5172     VIXL_ASSERT(OutsideITBlock());
5173     MacroEmissionCheckScope guard(this);
5174     ITScope it_scope(this, &cond, guard);
5175     usat(cond, rd, imm, operand);
5176   }
Usat(Register rd,uint32_t imm,const Operand & operand)5177   void Usat(Register rd, uint32_t imm, const Operand& operand) {
5178     Usat(al, rd, imm, operand);
5179   }
5180 
Usat16(Condition cond,Register rd,uint32_t imm,Register rn)5181   void Usat16(Condition cond, Register rd, uint32_t imm, Register rn) {
5182     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5183     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5184     VIXL_ASSERT(allow_macro_instructions_);
5185     VIXL_ASSERT(OutsideITBlock());
5186     MacroEmissionCheckScope guard(this);
5187     ITScope it_scope(this, &cond, guard);
5188     usat16(cond, rd, imm, rn);
5189   }
Usat16(Register rd,uint32_t imm,Register rn)5190   void Usat16(Register rd, uint32_t imm, Register rn) {
5191     Usat16(al, rd, imm, rn);
5192   }
5193 
Usax(Condition cond,Register rd,Register rn,Register rm)5194   void Usax(Condition cond, Register rd, Register rn, Register rm) {
5195     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5196     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5197     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5198     VIXL_ASSERT(allow_macro_instructions_);
5199     VIXL_ASSERT(OutsideITBlock());
5200     MacroEmissionCheckScope guard(this);
5201     ITScope it_scope(this, &cond, guard);
5202     usax(cond, rd, rn, rm);
5203   }
Usax(Register rd,Register rn,Register rm)5204   void Usax(Register rd, Register rn, Register rm) { Usax(al, rd, rn, rm); }
5205 
Usub16(Condition cond,Register rd,Register rn,Register rm)5206   void Usub16(Condition cond, Register rd, Register rn, Register rm) {
5207     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5208     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5209     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5210     VIXL_ASSERT(allow_macro_instructions_);
5211     VIXL_ASSERT(OutsideITBlock());
5212     MacroEmissionCheckScope guard(this);
5213     ITScope it_scope(this, &cond, guard);
5214     usub16(cond, rd, rn, rm);
5215   }
Usub16(Register rd,Register rn,Register rm)5216   void Usub16(Register rd, Register rn, Register rm) { Usub16(al, rd, rn, rm); }
5217 
Usub8(Condition cond,Register rd,Register rn,Register rm)5218   void Usub8(Condition cond, Register rd, Register rn, Register rm) {
5219     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5220     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5221     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5222     VIXL_ASSERT(allow_macro_instructions_);
5223     VIXL_ASSERT(OutsideITBlock());
5224     MacroEmissionCheckScope guard(this);
5225     ITScope it_scope(this, &cond, guard);
5226     usub8(cond, rd, rn, rm);
5227   }
Usub8(Register rd,Register rn,Register rm)5228   void Usub8(Register rd, Register rn, Register rm) { Usub8(al, rd, rn, rm); }
5229 
Uxtab(Condition cond,Register rd,Register rn,const Operand & operand)5230   void Uxtab(Condition cond, Register rd, Register rn, const Operand& operand) {
5231     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5232     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5233     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5234     VIXL_ASSERT(allow_macro_instructions_);
5235     VIXL_ASSERT(OutsideITBlock());
5236     MacroEmissionCheckScope guard(this);
5237     ITScope it_scope(this, &cond, guard);
5238     uxtab(cond, rd, rn, operand);
5239   }
Uxtab(Register rd,Register rn,const Operand & operand)5240   void Uxtab(Register rd, Register rn, const Operand& operand) {
5241     Uxtab(al, rd, rn, operand);
5242   }
5243 
Uxtab16(Condition cond,Register rd,Register rn,const Operand & operand)5244   void Uxtab16(Condition cond,
5245                Register rd,
5246                Register rn,
5247                const Operand& operand) {
5248     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5249     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5250     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5251     VIXL_ASSERT(allow_macro_instructions_);
5252     VIXL_ASSERT(OutsideITBlock());
5253     MacroEmissionCheckScope guard(this);
5254     ITScope it_scope(this, &cond, guard);
5255     uxtab16(cond, rd, rn, operand);
5256   }
Uxtab16(Register rd,Register rn,const Operand & operand)5257   void Uxtab16(Register rd, Register rn, const Operand& operand) {
5258     Uxtab16(al, rd, rn, operand);
5259   }
5260 
Uxtah(Condition cond,Register rd,Register rn,const Operand & operand)5261   void Uxtah(Condition cond, Register rd, Register rn, const Operand& operand) {
5262     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5263     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5264     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5265     VIXL_ASSERT(allow_macro_instructions_);
5266     VIXL_ASSERT(OutsideITBlock());
5267     MacroEmissionCheckScope guard(this);
5268     ITScope it_scope(this, &cond, guard);
5269     uxtah(cond, rd, rn, operand);
5270   }
Uxtah(Register rd,Register rn,const Operand & operand)5271   void Uxtah(Register rd, Register rn, const Operand& operand) {
5272     Uxtah(al, rd, rn, operand);
5273   }
5274 
Uxtb(Condition cond,Register rd,const Operand & operand)5275   void Uxtb(Condition cond, Register rd, const Operand& operand) {
5276     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5277     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5278     VIXL_ASSERT(allow_macro_instructions_);
5279     VIXL_ASSERT(OutsideITBlock());
5280     MacroEmissionCheckScope guard(this);
5281     ITScope it_scope(this, &cond, guard);
5282     uxtb(cond, rd, operand);
5283   }
Uxtb(Register rd,const Operand & operand)5284   void Uxtb(Register rd, const Operand& operand) { Uxtb(al, rd, operand); }
5285 
Uxtb16(Condition cond,Register rd,const Operand & operand)5286   void Uxtb16(Condition cond, Register rd, const Operand& operand) {
5287     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5288     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5289     VIXL_ASSERT(allow_macro_instructions_);
5290     VIXL_ASSERT(OutsideITBlock());
5291     MacroEmissionCheckScope guard(this);
5292     ITScope it_scope(this, &cond, guard);
5293     uxtb16(cond, rd, operand);
5294   }
Uxtb16(Register rd,const Operand & operand)5295   void Uxtb16(Register rd, const Operand& operand) { Uxtb16(al, rd, operand); }
5296 
Uxth(Condition cond,Register rd,const Operand & operand)5297   void Uxth(Condition cond, Register rd, const Operand& operand) {
5298     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5299     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5300     VIXL_ASSERT(allow_macro_instructions_);
5301     VIXL_ASSERT(OutsideITBlock());
5302     MacroEmissionCheckScope guard(this);
5303     ITScope it_scope(this, &cond, guard);
5304     uxth(cond, rd, operand);
5305   }
Uxth(Register rd,const Operand & operand)5306   void Uxth(Register rd, const Operand& operand) { Uxth(al, rd, operand); }
5307 
Vaba(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5308   void Vaba(
5309       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5310     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5311     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5312     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5313     VIXL_ASSERT(allow_macro_instructions_);
5314     VIXL_ASSERT(OutsideITBlock());
5315     MacroEmissionCheckScope guard(this);
5316     ITScope it_scope(this, &cond, guard);
5317     vaba(cond, dt, rd, rn, rm);
5318   }
Vaba(DataType dt,DRegister rd,DRegister rn,DRegister rm)5319   void Vaba(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5320     Vaba(al, dt, rd, rn, rm);
5321   }
5322 
Vaba(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5323   void Vaba(
5324       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5325     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5326     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5327     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5328     VIXL_ASSERT(allow_macro_instructions_);
5329     VIXL_ASSERT(OutsideITBlock());
5330     MacroEmissionCheckScope guard(this);
5331     ITScope it_scope(this, &cond, guard);
5332     vaba(cond, dt, rd, rn, rm);
5333   }
Vaba(DataType dt,QRegister rd,QRegister rn,QRegister rm)5334   void Vaba(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5335     Vaba(al, dt, rd, rn, rm);
5336   }
5337 
Vabal(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister rm)5338   void Vabal(
5339       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5340     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5341     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5342     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5343     VIXL_ASSERT(allow_macro_instructions_);
5344     VIXL_ASSERT(OutsideITBlock());
5345     MacroEmissionCheckScope guard(this);
5346     ITScope it_scope(this, &cond, guard);
5347     vabal(cond, dt, rd, rn, rm);
5348   }
Vabal(DataType dt,QRegister rd,DRegister rn,DRegister rm)5349   void Vabal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5350     Vabal(al, dt, rd, rn, rm);
5351   }
5352 
Vabd(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5353   void Vabd(
5354       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5355     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5356     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5357     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5358     VIXL_ASSERT(allow_macro_instructions_);
5359     VIXL_ASSERT(OutsideITBlock());
5360     MacroEmissionCheckScope guard(this);
5361     ITScope it_scope(this, &cond, guard);
5362     vabd(cond, dt, rd, rn, rm);
5363   }
Vabd(DataType dt,DRegister rd,DRegister rn,DRegister rm)5364   void Vabd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5365     Vabd(al, dt, rd, rn, rm);
5366   }
5367 
Vabd(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5368   void Vabd(
5369       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5370     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5371     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5372     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5373     VIXL_ASSERT(allow_macro_instructions_);
5374     VIXL_ASSERT(OutsideITBlock());
5375     MacroEmissionCheckScope guard(this);
5376     ITScope it_scope(this, &cond, guard);
5377     vabd(cond, dt, rd, rn, rm);
5378   }
Vabd(DataType dt,QRegister rd,QRegister rn,QRegister rm)5379   void Vabd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5380     Vabd(al, dt, rd, rn, rm);
5381   }
5382 
Vabdl(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister rm)5383   void Vabdl(
5384       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5385     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5386     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5387     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5388     VIXL_ASSERT(allow_macro_instructions_);
5389     VIXL_ASSERT(OutsideITBlock());
5390     MacroEmissionCheckScope guard(this);
5391     ITScope it_scope(this, &cond, guard);
5392     vabdl(cond, dt, rd, rn, rm);
5393   }
Vabdl(DataType dt,QRegister rd,DRegister rn,DRegister rm)5394   void Vabdl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5395     Vabdl(al, dt, rd, rn, rm);
5396   }
5397 
Vabs(Condition cond,DataType dt,DRegister rd,DRegister rm)5398   void Vabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
5399     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5400     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5401     VIXL_ASSERT(allow_macro_instructions_);
5402     VIXL_ASSERT(OutsideITBlock());
5403     MacroEmissionCheckScope guard(this);
5404     ITScope it_scope(this, &cond, guard);
5405     vabs(cond, dt, rd, rm);
5406   }
Vabs(DataType dt,DRegister rd,DRegister rm)5407   void Vabs(DataType dt, DRegister rd, DRegister rm) { Vabs(al, dt, rd, rm); }
5408 
Vabs(Condition cond,DataType dt,QRegister rd,QRegister rm)5409   void Vabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
5410     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5411     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5412     VIXL_ASSERT(allow_macro_instructions_);
5413     VIXL_ASSERT(OutsideITBlock());
5414     MacroEmissionCheckScope guard(this);
5415     ITScope it_scope(this, &cond, guard);
5416     vabs(cond, dt, rd, rm);
5417   }
Vabs(DataType dt,QRegister rd,QRegister rm)5418   void Vabs(DataType dt, QRegister rd, QRegister rm) { Vabs(al, dt, rd, rm); }
5419 
Vabs(Condition cond,DataType dt,SRegister rd,SRegister rm)5420   void Vabs(Condition cond, DataType dt, SRegister rd, SRegister rm) {
5421     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5422     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5423     VIXL_ASSERT(allow_macro_instructions_);
5424     VIXL_ASSERT(OutsideITBlock());
5425     MacroEmissionCheckScope guard(this);
5426     ITScope it_scope(this, &cond, guard);
5427     vabs(cond, dt, rd, rm);
5428   }
Vabs(DataType dt,SRegister rd,SRegister rm)5429   void Vabs(DataType dt, SRegister rd, SRegister rm) { Vabs(al, dt, rd, rm); }
5430 
Vacge(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5431   void Vacge(
5432       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5433     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5434     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5435     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5436     VIXL_ASSERT(allow_macro_instructions_);
5437     VIXL_ASSERT(OutsideITBlock());
5438     MacroEmissionCheckScope guard(this);
5439     ITScope it_scope(this, &cond, guard);
5440     vacge(cond, dt, rd, rn, rm);
5441   }
Vacge(DataType dt,DRegister rd,DRegister rn,DRegister rm)5442   void Vacge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5443     Vacge(al, dt, rd, rn, rm);
5444   }
5445 
Vacge(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5446   void Vacge(
5447       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5448     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5449     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5450     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5451     VIXL_ASSERT(allow_macro_instructions_);
5452     VIXL_ASSERT(OutsideITBlock());
5453     MacroEmissionCheckScope guard(this);
5454     ITScope it_scope(this, &cond, guard);
5455     vacge(cond, dt, rd, rn, rm);
5456   }
Vacge(DataType dt,QRegister rd,QRegister rn,QRegister rm)5457   void Vacge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5458     Vacge(al, dt, rd, rn, rm);
5459   }
5460 
Vacgt(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5461   void Vacgt(
5462       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5463     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5464     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5465     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5466     VIXL_ASSERT(allow_macro_instructions_);
5467     VIXL_ASSERT(OutsideITBlock());
5468     MacroEmissionCheckScope guard(this);
5469     ITScope it_scope(this, &cond, guard);
5470     vacgt(cond, dt, rd, rn, rm);
5471   }
Vacgt(DataType dt,DRegister rd,DRegister rn,DRegister rm)5472   void Vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5473     Vacgt(al, dt, rd, rn, rm);
5474   }
5475 
Vacgt(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5476   void Vacgt(
5477       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5478     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5479     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5480     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5481     VIXL_ASSERT(allow_macro_instructions_);
5482     VIXL_ASSERT(OutsideITBlock());
5483     MacroEmissionCheckScope guard(this);
5484     ITScope it_scope(this, &cond, guard);
5485     vacgt(cond, dt, rd, rn, rm);
5486   }
Vacgt(DataType dt,QRegister rd,QRegister rn,QRegister rm)5487   void Vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5488     Vacgt(al, dt, rd, rn, rm);
5489   }
5490 
Vacle(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5491   void Vacle(
5492       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5493     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5494     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5495     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5496     VIXL_ASSERT(allow_macro_instructions_);
5497     VIXL_ASSERT(OutsideITBlock());
5498     MacroEmissionCheckScope guard(this);
5499     ITScope it_scope(this, &cond, guard);
5500     vacle(cond, dt, rd, rn, rm);
5501   }
Vacle(DataType dt,DRegister rd,DRegister rn,DRegister rm)5502   void Vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5503     Vacle(al, dt, rd, rn, rm);
5504   }
5505 
Vacle(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5506   void Vacle(
5507       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5508     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5509     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5510     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5511     VIXL_ASSERT(allow_macro_instructions_);
5512     VIXL_ASSERT(OutsideITBlock());
5513     MacroEmissionCheckScope guard(this);
5514     ITScope it_scope(this, &cond, guard);
5515     vacle(cond, dt, rd, rn, rm);
5516   }
Vacle(DataType dt,QRegister rd,QRegister rn,QRegister rm)5517   void Vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5518     Vacle(al, dt, rd, rn, rm);
5519   }
5520 
Vaclt(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5521   void Vaclt(
5522       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5523     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5524     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5525     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5526     VIXL_ASSERT(allow_macro_instructions_);
5527     VIXL_ASSERT(OutsideITBlock());
5528     MacroEmissionCheckScope guard(this);
5529     ITScope it_scope(this, &cond, guard);
5530     vaclt(cond, dt, rd, rn, rm);
5531   }
Vaclt(DataType dt,DRegister rd,DRegister rn,DRegister rm)5532   void Vaclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5533     Vaclt(al, dt, rd, rn, rm);
5534   }
5535 
Vaclt(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5536   void Vaclt(
5537       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5538     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5539     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5540     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5541     VIXL_ASSERT(allow_macro_instructions_);
5542     VIXL_ASSERT(OutsideITBlock());
5543     MacroEmissionCheckScope guard(this);
5544     ITScope it_scope(this, &cond, guard);
5545     vaclt(cond, dt, rd, rn, rm);
5546   }
Vaclt(DataType dt,QRegister rd,QRegister rn,QRegister rm)5547   void Vaclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5548     Vaclt(al, dt, rd, rn, rm);
5549   }
5550 
Vadd(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5551   void Vadd(
5552       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5553     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5554     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5555     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5556     VIXL_ASSERT(allow_macro_instructions_);
5557     VIXL_ASSERT(OutsideITBlock());
5558     MacroEmissionCheckScope guard(this);
5559     ITScope it_scope(this, &cond, guard);
5560     vadd(cond, dt, rd, rn, rm);
5561   }
Vadd(DataType dt,DRegister rd,DRegister rn,DRegister rm)5562   void Vadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5563     Vadd(al, dt, rd, rn, rm);
5564   }
5565 
Vadd(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5566   void Vadd(
5567       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5568     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5569     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5570     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5571     VIXL_ASSERT(allow_macro_instructions_);
5572     VIXL_ASSERT(OutsideITBlock());
5573     MacroEmissionCheckScope guard(this);
5574     ITScope it_scope(this, &cond, guard);
5575     vadd(cond, dt, rd, rn, rm);
5576   }
Vadd(DataType dt,QRegister rd,QRegister rn,QRegister rm)5577   void Vadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5578     Vadd(al, dt, rd, rn, rm);
5579   }
5580 
Vadd(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)5581   void Vadd(
5582       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5583     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5584     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5585     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5586     VIXL_ASSERT(allow_macro_instructions_);
5587     VIXL_ASSERT(OutsideITBlock());
5588     MacroEmissionCheckScope guard(this);
5589     ITScope it_scope(this, &cond, guard);
5590     vadd(cond, dt, rd, rn, rm);
5591   }
Vadd(DataType dt,SRegister rd,SRegister rn,SRegister rm)5592   void Vadd(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
5593     Vadd(al, dt, rd, rn, rm);
5594   }
5595 
Vaddhn(Condition cond,DataType dt,DRegister rd,QRegister rn,QRegister rm)5596   void Vaddhn(
5597       Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5598     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5599     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5600     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5601     VIXL_ASSERT(allow_macro_instructions_);
5602     VIXL_ASSERT(OutsideITBlock());
5603     MacroEmissionCheckScope guard(this);
5604     ITScope it_scope(this, &cond, guard);
5605     vaddhn(cond, dt, rd, rn, rm);
5606   }
Vaddhn(DataType dt,DRegister rd,QRegister rn,QRegister rm)5607   void Vaddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
5608     Vaddhn(al, dt, rd, rn, rm);
5609   }
5610 
Vaddl(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister rm)5611   void Vaddl(
5612       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5613     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5614     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5615     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5616     VIXL_ASSERT(allow_macro_instructions_);
5617     VIXL_ASSERT(OutsideITBlock());
5618     MacroEmissionCheckScope guard(this);
5619     ITScope it_scope(this, &cond, guard);
5620     vaddl(cond, dt, rd, rn, rm);
5621   }
Vaddl(DataType dt,QRegister rd,DRegister rn,DRegister rm)5622   void Vaddl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
5623     Vaddl(al, dt, rd, rn, rm);
5624   }
5625 
Vaddw(Condition cond,DataType dt,QRegister rd,QRegister rn,DRegister rm)5626   void Vaddw(
5627       Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5628     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5629     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5630     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5631     VIXL_ASSERT(allow_macro_instructions_);
5632     VIXL_ASSERT(OutsideITBlock());
5633     MacroEmissionCheckScope guard(this);
5634     ITScope it_scope(this, &cond, guard);
5635     vaddw(cond, dt, rd, rn, rm);
5636   }
Vaddw(DataType dt,QRegister rd,QRegister rn,DRegister rm)5637   void Vaddw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
5638     Vaddw(al, dt, rd, rn, rm);
5639   }
5640 
Vand(Condition cond,DataType dt,DRegister rd,DRegister rn,const DOperand & operand)5641   void Vand(Condition cond,
5642             DataType dt,
5643             DRegister rd,
5644             DRegister rn,
5645             const DOperand& operand) {
5646     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5647     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5648     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5649     VIXL_ASSERT(allow_macro_instructions_);
5650     VIXL_ASSERT(OutsideITBlock());
5651     MacroEmissionCheckScope guard(this);
5652     ITScope it_scope(this, &cond, guard);
5653     vand(cond, dt, rd, rn, operand);
5654   }
Vand(DataType dt,DRegister rd,DRegister rn,const DOperand & operand)5655   void Vand(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5656     Vand(al, dt, rd, rn, operand);
5657   }
5658 
Vand(Condition cond,DataType dt,QRegister rd,QRegister rn,const QOperand & operand)5659   void Vand(Condition cond,
5660             DataType dt,
5661             QRegister rd,
5662             QRegister rn,
5663             const QOperand& operand) {
5664     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5665     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5666     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5667     VIXL_ASSERT(allow_macro_instructions_);
5668     VIXL_ASSERT(OutsideITBlock());
5669     MacroEmissionCheckScope guard(this);
5670     ITScope it_scope(this, &cond, guard);
5671     vand(cond, dt, rd, rn, operand);
5672   }
Vand(DataType dt,QRegister rd,QRegister rn,const QOperand & operand)5673   void Vand(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5674     Vand(al, dt, rd, rn, operand);
5675   }
5676 
Vbic(Condition cond,DataType dt,DRegister rd,DRegister rn,const DOperand & operand)5677   void Vbic(Condition cond,
5678             DataType dt,
5679             DRegister rd,
5680             DRegister rn,
5681             const DOperand& operand) {
5682     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5683     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5684     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5685     VIXL_ASSERT(allow_macro_instructions_);
5686     VIXL_ASSERT(OutsideITBlock());
5687     MacroEmissionCheckScope guard(this);
5688     ITScope it_scope(this, &cond, guard);
5689     vbic(cond, dt, rd, rn, operand);
5690   }
Vbic(DataType dt,DRegister rd,DRegister rn,const DOperand & operand)5691   void Vbic(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
5692     Vbic(al, dt, rd, rn, operand);
5693   }
5694 
Vbic(Condition cond,DataType dt,QRegister rd,QRegister rn,const QOperand & operand)5695   void Vbic(Condition cond,
5696             DataType dt,
5697             QRegister rd,
5698             QRegister rn,
5699             const QOperand& operand) {
5700     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5701     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5702     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5703     VIXL_ASSERT(allow_macro_instructions_);
5704     VIXL_ASSERT(OutsideITBlock());
5705     MacroEmissionCheckScope guard(this);
5706     ITScope it_scope(this, &cond, guard);
5707     vbic(cond, dt, rd, rn, operand);
5708   }
Vbic(DataType dt,QRegister rd,QRegister rn,const QOperand & operand)5709   void Vbic(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
5710     Vbic(al, dt, rd, rn, operand);
5711   }
5712 
Vbif(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5713   void Vbif(
5714       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5715     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5716     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5717     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5718     VIXL_ASSERT(allow_macro_instructions_);
5719     VIXL_ASSERT(OutsideITBlock());
5720     MacroEmissionCheckScope guard(this);
5721     ITScope it_scope(this, &cond, guard);
5722     vbif(cond, dt, rd, rn, rm);
5723   }
Vbif(DataType dt,DRegister rd,DRegister rn,DRegister rm)5724   void Vbif(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5725     Vbif(al, dt, rd, rn, rm);
5726   }
Vbif(Condition cond,DRegister rd,DRegister rn,DRegister rm)5727   void Vbif(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5728     Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5729   }
Vbif(DRegister rd,DRegister rn,DRegister rm)5730   void Vbif(DRegister rd, DRegister rn, DRegister rm) {
5731     Vbif(al, kDataTypeValueNone, rd, rn, rm);
5732   }
5733 
Vbif(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5734   void Vbif(
5735       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5736     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5737     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5738     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5739     VIXL_ASSERT(allow_macro_instructions_);
5740     VIXL_ASSERT(OutsideITBlock());
5741     MacroEmissionCheckScope guard(this);
5742     ITScope it_scope(this, &cond, guard);
5743     vbif(cond, dt, rd, rn, rm);
5744   }
Vbif(DataType dt,QRegister rd,QRegister rn,QRegister rm)5745   void Vbif(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5746     Vbif(al, dt, rd, rn, rm);
5747   }
Vbif(Condition cond,QRegister rd,QRegister rn,QRegister rm)5748   void Vbif(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5749     Vbif(cond, kDataTypeValueNone, rd, rn, rm);
5750   }
Vbif(QRegister rd,QRegister rn,QRegister rm)5751   void Vbif(QRegister rd, QRegister rn, QRegister rm) {
5752     Vbif(al, kDataTypeValueNone, rd, rn, rm);
5753   }
5754 
Vbit(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5755   void Vbit(
5756       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5757     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5758     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5759     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5760     VIXL_ASSERT(allow_macro_instructions_);
5761     VIXL_ASSERT(OutsideITBlock());
5762     MacroEmissionCheckScope guard(this);
5763     ITScope it_scope(this, &cond, guard);
5764     vbit(cond, dt, rd, rn, rm);
5765   }
Vbit(DataType dt,DRegister rd,DRegister rn,DRegister rm)5766   void Vbit(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5767     Vbit(al, dt, rd, rn, rm);
5768   }
Vbit(Condition cond,DRegister rd,DRegister rn,DRegister rm)5769   void Vbit(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5770     Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5771   }
Vbit(DRegister rd,DRegister rn,DRegister rm)5772   void Vbit(DRegister rd, DRegister rn, DRegister rm) {
5773     Vbit(al, kDataTypeValueNone, rd, rn, rm);
5774   }
5775 
Vbit(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5776   void Vbit(
5777       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5778     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5779     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5780     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5781     VIXL_ASSERT(allow_macro_instructions_);
5782     VIXL_ASSERT(OutsideITBlock());
5783     MacroEmissionCheckScope guard(this);
5784     ITScope it_scope(this, &cond, guard);
5785     vbit(cond, dt, rd, rn, rm);
5786   }
Vbit(DataType dt,QRegister rd,QRegister rn,QRegister rm)5787   void Vbit(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5788     Vbit(al, dt, rd, rn, rm);
5789   }
Vbit(Condition cond,QRegister rd,QRegister rn,QRegister rm)5790   void Vbit(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5791     Vbit(cond, kDataTypeValueNone, rd, rn, rm);
5792   }
Vbit(QRegister rd,QRegister rn,QRegister rm)5793   void Vbit(QRegister rd, QRegister rn, QRegister rm) {
5794     Vbit(al, kDataTypeValueNone, rd, rn, rm);
5795   }
5796 
Vbsl(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5797   void Vbsl(
5798       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5799     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5800     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5801     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5802     VIXL_ASSERT(allow_macro_instructions_);
5803     VIXL_ASSERT(OutsideITBlock());
5804     MacroEmissionCheckScope guard(this);
5805     ITScope it_scope(this, &cond, guard);
5806     vbsl(cond, dt, rd, rn, rm);
5807   }
Vbsl(DataType dt,DRegister rd,DRegister rn,DRegister rm)5808   void Vbsl(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5809     Vbsl(al, dt, rd, rn, rm);
5810   }
Vbsl(Condition cond,DRegister rd,DRegister rn,DRegister rm)5811   void Vbsl(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
5812     Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5813   }
Vbsl(DRegister rd,DRegister rn,DRegister rm)5814   void Vbsl(DRegister rd, DRegister rn, DRegister rm) {
5815     Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5816   }
5817 
Vbsl(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5818   void Vbsl(
5819       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5820     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5821     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5822     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5823     VIXL_ASSERT(allow_macro_instructions_);
5824     VIXL_ASSERT(OutsideITBlock());
5825     MacroEmissionCheckScope guard(this);
5826     ITScope it_scope(this, &cond, guard);
5827     vbsl(cond, dt, rd, rn, rm);
5828   }
Vbsl(DataType dt,QRegister rd,QRegister rn,QRegister rm)5829   void Vbsl(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5830     Vbsl(al, dt, rd, rn, rm);
5831   }
Vbsl(Condition cond,QRegister rd,QRegister rn,QRegister rm)5832   void Vbsl(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
5833     Vbsl(cond, kDataTypeValueNone, rd, rn, rm);
5834   }
Vbsl(QRegister rd,QRegister rn,QRegister rm)5835   void Vbsl(QRegister rd, QRegister rn, QRegister rm) {
5836     Vbsl(al, kDataTypeValueNone, rd, rn, rm);
5837   }
5838 
Vceq(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)5839   void Vceq(Condition cond,
5840             DataType dt,
5841             DRegister rd,
5842             DRegister rm,
5843             const DOperand& operand) {
5844     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5845     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5846     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5847     VIXL_ASSERT(allow_macro_instructions_);
5848     VIXL_ASSERT(OutsideITBlock());
5849     MacroEmissionCheckScope guard(this);
5850     ITScope it_scope(this, &cond, guard);
5851     vceq(cond, dt, rd, rm, operand);
5852   }
Vceq(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)5853   void Vceq(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5854     Vceq(al, dt, rd, rm, operand);
5855   }
5856 
Vceq(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)5857   void Vceq(Condition cond,
5858             DataType dt,
5859             QRegister rd,
5860             QRegister rm,
5861             const QOperand& operand) {
5862     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5863     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5864     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5865     VIXL_ASSERT(allow_macro_instructions_);
5866     VIXL_ASSERT(OutsideITBlock());
5867     MacroEmissionCheckScope guard(this);
5868     ITScope it_scope(this, &cond, guard);
5869     vceq(cond, dt, rd, rm, operand);
5870   }
Vceq(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)5871   void Vceq(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5872     Vceq(al, dt, rd, rm, operand);
5873   }
5874 
Vceq(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5875   void Vceq(
5876       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5877     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5878     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5879     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5880     VIXL_ASSERT(allow_macro_instructions_);
5881     VIXL_ASSERT(OutsideITBlock());
5882     MacroEmissionCheckScope guard(this);
5883     ITScope it_scope(this, &cond, guard);
5884     vceq(cond, dt, rd, rn, rm);
5885   }
Vceq(DataType dt,DRegister rd,DRegister rn,DRegister rm)5886   void Vceq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5887     Vceq(al, dt, rd, rn, rm);
5888   }
5889 
Vceq(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5890   void Vceq(
5891       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5892     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5893     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5894     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5895     VIXL_ASSERT(allow_macro_instructions_);
5896     VIXL_ASSERT(OutsideITBlock());
5897     MacroEmissionCheckScope guard(this);
5898     ITScope it_scope(this, &cond, guard);
5899     vceq(cond, dt, rd, rn, rm);
5900   }
Vceq(DataType dt,QRegister rd,QRegister rn,QRegister rm)5901   void Vceq(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5902     Vceq(al, dt, rd, rn, rm);
5903   }
5904 
Vcge(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)5905   void Vcge(Condition cond,
5906             DataType dt,
5907             DRegister rd,
5908             DRegister rm,
5909             const DOperand& operand) {
5910     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5911     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5912     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5913     VIXL_ASSERT(allow_macro_instructions_);
5914     VIXL_ASSERT(OutsideITBlock());
5915     MacroEmissionCheckScope guard(this);
5916     ITScope it_scope(this, &cond, guard);
5917     vcge(cond, dt, rd, rm, operand);
5918   }
Vcge(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)5919   void Vcge(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5920     Vcge(al, dt, rd, rm, operand);
5921   }
5922 
Vcge(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)5923   void Vcge(Condition cond,
5924             DataType dt,
5925             QRegister rd,
5926             QRegister rm,
5927             const QOperand& operand) {
5928     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5929     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5930     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5931     VIXL_ASSERT(allow_macro_instructions_);
5932     VIXL_ASSERT(OutsideITBlock());
5933     MacroEmissionCheckScope guard(this);
5934     ITScope it_scope(this, &cond, guard);
5935     vcge(cond, dt, rd, rm, operand);
5936   }
Vcge(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)5937   void Vcge(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
5938     Vcge(al, dt, rd, rm, operand);
5939   }
5940 
Vcge(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)5941   void Vcge(
5942       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5943     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5944     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5945     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5946     VIXL_ASSERT(allow_macro_instructions_);
5947     VIXL_ASSERT(OutsideITBlock());
5948     MacroEmissionCheckScope guard(this);
5949     ITScope it_scope(this, &cond, guard);
5950     vcge(cond, dt, rd, rn, rm);
5951   }
Vcge(DataType dt,DRegister rd,DRegister rn,DRegister rm)5952   void Vcge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
5953     Vcge(al, dt, rd, rn, rm);
5954   }
5955 
Vcge(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)5956   void Vcge(
5957       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5958     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5959     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
5960     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5961     VIXL_ASSERT(allow_macro_instructions_);
5962     VIXL_ASSERT(OutsideITBlock());
5963     MacroEmissionCheckScope guard(this);
5964     ITScope it_scope(this, &cond, guard);
5965     vcge(cond, dt, rd, rn, rm);
5966   }
Vcge(DataType dt,QRegister rd,QRegister rn,QRegister rm)5967   void Vcge(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
5968     Vcge(al, dt, rd, rn, rm);
5969   }
5970 
Vcgt(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)5971   void Vcgt(Condition cond,
5972             DataType dt,
5973             DRegister rd,
5974             DRegister rm,
5975             const DOperand& operand) {
5976     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5977     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5978     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5979     VIXL_ASSERT(allow_macro_instructions_);
5980     VIXL_ASSERT(OutsideITBlock());
5981     MacroEmissionCheckScope guard(this);
5982     ITScope it_scope(this, &cond, guard);
5983     vcgt(cond, dt, rd, rm, operand);
5984   }
Vcgt(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)5985   void Vcgt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
5986     Vcgt(al, dt, rd, rm, operand);
5987   }
5988 
Vcgt(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)5989   void Vcgt(Condition cond,
5990             DataType dt,
5991             QRegister rd,
5992             QRegister rm,
5993             const QOperand& operand) {
5994     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
5995     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
5996     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
5997     VIXL_ASSERT(allow_macro_instructions_);
5998     VIXL_ASSERT(OutsideITBlock());
5999     MacroEmissionCheckScope guard(this);
6000     ITScope it_scope(this, &cond, guard);
6001     vcgt(cond, dt, rd, rm, operand);
6002   }
Vcgt(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)6003   void Vcgt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6004     Vcgt(al, dt, rd, rm, operand);
6005   }
6006 
Vcgt(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)6007   void Vcgt(
6008       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6009     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6010     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6011     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6012     VIXL_ASSERT(allow_macro_instructions_);
6013     VIXL_ASSERT(OutsideITBlock());
6014     MacroEmissionCheckScope guard(this);
6015     ITScope it_scope(this, &cond, guard);
6016     vcgt(cond, dt, rd, rn, rm);
6017   }
Vcgt(DataType dt,DRegister rd,DRegister rn,DRegister rm)6018   void Vcgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6019     Vcgt(al, dt, rd, rn, rm);
6020   }
6021 
Vcgt(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)6022   void Vcgt(
6023       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6024     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6025     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6026     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6027     VIXL_ASSERT(allow_macro_instructions_);
6028     VIXL_ASSERT(OutsideITBlock());
6029     MacroEmissionCheckScope guard(this);
6030     ITScope it_scope(this, &cond, guard);
6031     vcgt(cond, dt, rd, rn, rm);
6032   }
Vcgt(DataType dt,QRegister rd,QRegister rn,QRegister rm)6033   void Vcgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6034     Vcgt(al, dt, rd, rn, rm);
6035   }
6036 
Vcle(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)6037   void Vcle(Condition cond,
6038             DataType dt,
6039             DRegister rd,
6040             DRegister rm,
6041             const DOperand& operand) {
6042     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6043     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6044     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6045     VIXL_ASSERT(allow_macro_instructions_);
6046     VIXL_ASSERT(OutsideITBlock());
6047     MacroEmissionCheckScope guard(this);
6048     ITScope it_scope(this, &cond, guard);
6049     vcle(cond, dt, rd, rm, operand);
6050   }
Vcle(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)6051   void Vcle(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6052     Vcle(al, dt, rd, rm, operand);
6053   }
6054 
Vcle(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)6055   void Vcle(Condition cond,
6056             DataType dt,
6057             QRegister rd,
6058             QRegister rm,
6059             const QOperand& operand) {
6060     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6061     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6062     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6063     VIXL_ASSERT(allow_macro_instructions_);
6064     VIXL_ASSERT(OutsideITBlock());
6065     MacroEmissionCheckScope guard(this);
6066     ITScope it_scope(this, &cond, guard);
6067     vcle(cond, dt, rd, rm, operand);
6068   }
Vcle(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)6069   void Vcle(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6070     Vcle(al, dt, rd, rm, operand);
6071   }
6072 
Vcle(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)6073   void Vcle(
6074       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6075     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6076     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6077     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6078     VIXL_ASSERT(allow_macro_instructions_);
6079     VIXL_ASSERT(OutsideITBlock());
6080     MacroEmissionCheckScope guard(this);
6081     ITScope it_scope(this, &cond, guard);
6082     vcle(cond, dt, rd, rn, rm);
6083   }
Vcle(DataType dt,DRegister rd,DRegister rn,DRegister rm)6084   void Vcle(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6085     Vcle(al, dt, rd, rn, rm);
6086   }
6087 
Vcle(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)6088   void Vcle(
6089       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6090     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6091     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6092     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6093     VIXL_ASSERT(allow_macro_instructions_);
6094     VIXL_ASSERT(OutsideITBlock());
6095     MacroEmissionCheckScope guard(this);
6096     ITScope it_scope(this, &cond, guard);
6097     vcle(cond, dt, rd, rn, rm);
6098   }
Vcle(DataType dt,QRegister rd,QRegister rn,QRegister rm)6099   void Vcle(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6100     Vcle(al, dt, rd, rn, rm);
6101   }
6102 
Vcls(Condition cond,DataType dt,DRegister rd,DRegister rm)6103   void Vcls(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6104     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6105     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6106     VIXL_ASSERT(allow_macro_instructions_);
6107     VIXL_ASSERT(OutsideITBlock());
6108     MacroEmissionCheckScope guard(this);
6109     ITScope it_scope(this, &cond, guard);
6110     vcls(cond, dt, rd, rm);
6111   }
Vcls(DataType dt,DRegister rd,DRegister rm)6112   void Vcls(DataType dt, DRegister rd, DRegister rm) { Vcls(al, dt, rd, rm); }
6113 
Vcls(Condition cond,DataType dt,QRegister rd,QRegister rm)6114   void Vcls(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6115     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6116     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6117     VIXL_ASSERT(allow_macro_instructions_);
6118     VIXL_ASSERT(OutsideITBlock());
6119     MacroEmissionCheckScope guard(this);
6120     ITScope it_scope(this, &cond, guard);
6121     vcls(cond, dt, rd, rm);
6122   }
Vcls(DataType dt,QRegister rd,QRegister rm)6123   void Vcls(DataType dt, QRegister rd, QRegister rm) { Vcls(al, dt, rd, rm); }
6124 
Vclt(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)6125   void Vclt(Condition cond,
6126             DataType dt,
6127             DRegister rd,
6128             DRegister rm,
6129             const DOperand& operand) {
6130     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6131     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6132     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6133     VIXL_ASSERT(allow_macro_instructions_);
6134     VIXL_ASSERT(OutsideITBlock());
6135     MacroEmissionCheckScope guard(this);
6136     ITScope it_scope(this, &cond, guard);
6137     vclt(cond, dt, rd, rm, operand);
6138   }
Vclt(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)6139   void Vclt(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
6140     Vclt(al, dt, rd, rm, operand);
6141   }
6142 
Vclt(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)6143   void Vclt(Condition cond,
6144             DataType dt,
6145             QRegister rd,
6146             QRegister rm,
6147             const QOperand& operand) {
6148     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6149     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6150     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6151     VIXL_ASSERT(allow_macro_instructions_);
6152     VIXL_ASSERT(OutsideITBlock());
6153     MacroEmissionCheckScope guard(this);
6154     ITScope it_scope(this, &cond, guard);
6155     vclt(cond, dt, rd, rm, operand);
6156   }
Vclt(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)6157   void Vclt(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
6158     Vclt(al, dt, rd, rm, operand);
6159   }
6160 
Vclt(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)6161   void Vclt(
6162       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6163     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6164     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6165     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6166     VIXL_ASSERT(allow_macro_instructions_);
6167     VIXL_ASSERT(OutsideITBlock());
6168     MacroEmissionCheckScope guard(this);
6169     ITScope it_scope(this, &cond, guard);
6170     vclt(cond, dt, rd, rn, rm);
6171   }
Vclt(DataType dt,DRegister rd,DRegister rn,DRegister rm)6172   void Vclt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6173     Vclt(al, dt, rd, rn, rm);
6174   }
6175 
Vclt(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)6176   void Vclt(
6177       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6178     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6179     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6180     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6181     VIXL_ASSERT(allow_macro_instructions_);
6182     VIXL_ASSERT(OutsideITBlock());
6183     MacroEmissionCheckScope guard(this);
6184     ITScope it_scope(this, &cond, guard);
6185     vclt(cond, dt, rd, rn, rm);
6186   }
Vclt(DataType dt,QRegister rd,QRegister rn,QRegister rm)6187   void Vclt(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6188     Vclt(al, dt, rd, rn, rm);
6189   }
6190 
Vclz(Condition cond,DataType dt,DRegister rd,DRegister rm)6191   void Vclz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6192     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6193     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6194     VIXL_ASSERT(allow_macro_instructions_);
6195     VIXL_ASSERT(OutsideITBlock());
6196     MacroEmissionCheckScope guard(this);
6197     ITScope it_scope(this, &cond, guard);
6198     vclz(cond, dt, rd, rm);
6199   }
Vclz(DataType dt,DRegister rd,DRegister rm)6200   void Vclz(DataType dt, DRegister rd, DRegister rm) { Vclz(al, dt, rd, rm); }
6201 
Vclz(Condition cond,DataType dt,QRegister rd,QRegister rm)6202   void Vclz(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6203     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6204     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6205     VIXL_ASSERT(allow_macro_instructions_);
6206     VIXL_ASSERT(OutsideITBlock());
6207     MacroEmissionCheckScope guard(this);
6208     ITScope it_scope(this, &cond, guard);
6209     vclz(cond, dt, rd, rm);
6210   }
Vclz(DataType dt,QRegister rd,QRegister rm)6211   void Vclz(DataType dt, QRegister rd, QRegister rm) { Vclz(al, dt, rd, rm); }
6212 
Vcmp(Condition cond,DataType dt,SRegister rd,const SOperand & operand)6213   void Vcmp(Condition cond,
6214             DataType dt,
6215             SRegister rd,
6216             const SOperand& operand) {
6217     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6218     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6219     VIXL_ASSERT(allow_macro_instructions_);
6220     VIXL_ASSERT(OutsideITBlock());
6221     MacroEmissionCheckScope guard(this);
6222     ITScope it_scope(this, &cond, guard);
6223     vcmp(cond, dt, rd, operand);
6224   }
Vcmp(DataType dt,SRegister rd,const SOperand & operand)6225   void Vcmp(DataType dt, SRegister rd, const SOperand& operand) {
6226     Vcmp(al, dt, rd, operand);
6227   }
6228 
Vcmp(Condition cond,DataType dt,DRegister rd,const DOperand & operand)6229   void Vcmp(Condition cond,
6230             DataType dt,
6231             DRegister rd,
6232             const DOperand& operand) {
6233     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6234     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6235     VIXL_ASSERT(allow_macro_instructions_);
6236     VIXL_ASSERT(OutsideITBlock());
6237     MacroEmissionCheckScope guard(this);
6238     ITScope it_scope(this, &cond, guard);
6239     vcmp(cond, dt, rd, operand);
6240   }
Vcmp(DataType dt,DRegister rd,const DOperand & operand)6241   void Vcmp(DataType dt, DRegister rd, const DOperand& operand) {
6242     Vcmp(al, dt, rd, operand);
6243   }
6244 
Vcmpe(Condition cond,DataType dt,SRegister rd,const SOperand & operand)6245   void Vcmpe(Condition cond,
6246              DataType dt,
6247              SRegister rd,
6248              const SOperand& operand) {
6249     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6250     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6251     VIXL_ASSERT(allow_macro_instructions_);
6252     VIXL_ASSERT(OutsideITBlock());
6253     MacroEmissionCheckScope guard(this);
6254     ITScope it_scope(this, &cond, guard);
6255     vcmpe(cond, dt, rd, operand);
6256   }
Vcmpe(DataType dt,SRegister rd,const SOperand & operand)6257   void Vcmpe(DataType dt, SRegister rd, const SOperand& operand) {
6258     Vcmpe(al, dt, rd, operand);
6259   }
6260 
Vcmpe(Condition cond,DataType dt,DRegister rd,const DOperand & operand)6261   void Vcmpe(Condition cond,
6262              DataType dt,
6263              DRegister rd,
6264              const DOperand& operand) {
6265     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6266     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6267     VIXL_ASSERT(allow_macro_instructions_);
6268     VIXL_ASSERT(OutsideITBlock());
6269     MacroEmissionCheckScope guard(this);
6270     ITScope it_scope(this, &cond, guard);
6271     vcmpe(cond, dt, rd, operand);
6272   }
Vcmpe(DataType dt,DRegister rd,const DOperand & operand)6273   void Vcmpe(DataType dt, DRegister rd, const DOperand& operand) {
6274     Vcmpe(al, dt, rd, operand);
6275   }
6276 
Vcnt(Condition cond,DataType dt,DRegister rd,DRegister rm)6277   void Vcnt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
6278     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6279     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6280     VIXL_ASSERT(allow_macro_instructions_);
6281     VIXL_ASSERT(OutsideITBlock());
6282     MacroEmissionCheckScope guard(this);
6283     ITScope it_scope(this, &cond, guard);
6284     vcnt(cond, dt, rd, rm);
6285   }
Vcnt(DataType dt,DRegister rd,DRegister rm)6286   void Vcnt(DataType dt, DRegister rd, DRegister rm) { Vcnt(al, dt, rd, rm); }
6287 
Vcnt(Condition cond,DataType dt,QRegister rd,QRegister rm)6288   void Vcnt(Condition cond, DataType dt, QRegister rd, QRegister rm) {
6289     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6290     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6291     VIXL_ASSERT(allow_macro_instructions_);
6292     VIXL_ASSERT(OutsideITBlock());
6293     MacroEmissionCheckScope guard(this);
6294     ITScope it_scope(this, &cond, guard);
6295     vcnt(cond, dt, rd, rm);
6296   }
Vcnt(DataType dt,QRegister rd,QRegister rm)6297   void Vcnt(DataType dt, QRegister rd, QRegister rm) { Vcnt(al, dt, rd, rm); }
6298 
Vcvt(Condition cond,DataType dt1,DataType dt2,DRegister rd,SRegister rm)6299   void Vcvt(
6300       Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6301     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6302     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6303     VIXL_ASSERT(allow_macro_instructions_);
6304     VIXL_ASSERT(OutsideITBlock());
6305     MacroEmissionCheckScope guard(this);
6306     ITScope it_scope(this, &cond, guard);
6307     vcvt(cond, dt1, dt2, rd, rm);
6308   }
Vcvt(DataType dt1,DataType dt2,DRegister rd,SRegister rm)6309   void Vcvt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6310     Vcvt(al, dt1, dt2, rd, rm);
6311   }
6312 
Vcvt(Condition cond,DataType dt1,DataType dt2,SRegister rd,DRegister rm)6313   void Vcvt(
6314       Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6315     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6316     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6317     VIXL_ASSERT(allow_macro_instructions_);
6318     VIXL_ASSERT(OutsideITBlock());
6319     MacroEmissionCheckScope guard(this);
6320     ITScope it_scope(this, &cond, guard);
6321     vcvt(cond, dt1, dt2, rd, rm);
6322   }
Vcvt(DataType dt1,DataType dt2,SRegister rd,DRegister rm)6323   void Vcvt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6324     Vcvt(al, dt1, dt2, rd, rm);
6325   }
6326 
Vcvt(Condition cond,DataType dt1,DataType dt2,DRegister rd,DRegister rm,int32_t fbits)6327   void Vcvt(Condition cond,
6328             DataType dt1,
6329             DataType dt2,
6330             DRegister rd,
6331             DRegister rm,
6332             int32_t fbits) {
6333     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6334     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6335     VIXL_ASSERT(allow_macro_instructions_);
6336     VIXL_ASSERT(OutsideITBlock());
6337     MacroEmissionCheckScope guard(this);
6338     ITScope it_scope(this, &cond, guard);
6339     vcvt(cond, dt1, dt2, rd, rm, fbits);
6340   }
Vcvt(DataType dt1,DataType dt2,DRegister rd,DRegister rm,int32_t fbits)6341   void Vcvt(
6342       DataType dt1, DataType dt2, DRegister rd, DRegister rm, int32_t fbits) {
6343     Vcvt(al, dt1, dt2, rd, rm, fbits);
6344   }
6345 
Vcvt(Condition cond,DataType dt1,DataType dt2,QRegister rd,QRegister rm,int32_t fbits)6346   void Vcvt(Condition cond,
6347             DataType dt1,
6348             DataType dt2,
6349             QRegister rd,
6350             QRegister rm,
6351             int32_t fbits) {
6352     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6353     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6354     VIXL_ASSERT(allow_macro_instructions_);
6355     VIXL_ASSERT(OutsideITBlock());
6356     MacroEmissionCheckScope guard(this);
6357     ITScope it_scope(this, &cond, guard);
6358     vcvt(cond, dt1, dt2, rd, rm, fbits);
6359   }
Vcvt(DataType dt1,DataType dt2,QRegister rd,QRegister rm,int32_t fbits)6360   void Vcvt(
6361       DataType dt1, DataType dt2, QRegister rd, QRegister rm, int32_t fbits) {
6362     Vcvt(al, dt1, dt2, rd, rm, fbits);
6363   }
6364 
Vcvt(Condition cond,DataType dt1,DataType dt2,SRegister rd,SRegister rm,int32_t fbits)6365   void Vcvt(Condition cond,
6366             DataType dt1,
6367             DataType dt2,
6368             SRegister rd,
6369             SRegister rm,
6370             int32_t fbits) {
6371     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6372     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6373     VIXL_ASSERT(allow_macro_instructions_);
6374     VIXL_ASSERT(OutsideITBlock());
6375     MacroEmissionCheckScope guard(this);
6376     ITScope it_scope(this, &cond, guard);
6377     vcvt(cond, dt1, dt2, rd, rm, fbits);
6378   }
Vcvt(DataType dt1,DataType dt2,SRegister rd,SRegister rm,int32_t fbits)6379   void Vcvt(
6380       DataType dt1, DataType dt2, SRegister rd, SRegister rm, int32_t fbits) {
6381     Vcvt(al, dt1, dt2, rd, rm, fbits);
6382   }
6383 
Vcvt(Condition cond,DataType dt1,DataType dt2,DRegister rd,DRegister rm)6384   void Vcvt(
6385       Condition cond, DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6386     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6387     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6388     VIXL_ASSERT(allow_macro_instructions_);
6389     VIXL_ASSERT(OutsideITBlock());
6390     MacroEmissionCheckScope guard(this);
6391     ITScope it_scope(this, &cond, guard);
6392     vcvt(cond, dt1, dt2, rd, rm);
6393   }
Vcvt(DataType dt1,DataType dt2,DRegister rd,DRegister rm)6394   void Vcvt(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6395     Vcvt(al, dt1, dt2, rd, rm);
6396   }
6397 
Vcvt(Condition cond,DataType dt1,DataType dt2,QRegister rd,QRegister rm)6398   void Vcvt(
6399       Condition cond, DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6400     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6401     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6402     VIXL_ASSERT(allow_macro_instructions_);
6403     VIXL_ASSERT(OutsideITBlock());
6404     MacroEmissionCheckScope guard(this);
6405     ITScope it_scope(this, &cond, guard);
6406     vcvt(cond, dt1, dt2, rd, rm);
6407   }
Vcvt(DataType dt1,DataType dt2,QRegister rd,QRegister rm)6408   void Vcvt(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6409     Vcvt(al, dt1, dt2, rd, rm);
6410   }
6411 
Vcvt(Condition cond,DataType dt1,DataType dt2,DRegister rd,QRegister rm)6412   void Vcvt(
6413       Condition cond, DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6414     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6415     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6416     VIXL_ASSERT(allow_macro_instructions_);
6417     VIXL_ASSERT(OutsideITBlock());
6418     MacroEmissionCheckScope guard(this);
6419     ITScope it_scope(this, &cond, guard);
6420     vcvt(cond, dt1, dt2, rd, rm);
6421   }
Vcvt(DataType dt1,DataType dt2,DRegister rd,QRegister rm)6422   void Vcvt(DataType dt1, DataType dt2, DRegister rd, QRegister rm) {
6423     Vcvt(al, dt1, dt2, rd, rm);
6424   }
6425 
Vcvt(Condition cond,DataType dt1,DataType dt2,QRegister rd,DRegister rm)6426   void Vcvt(
6427       Condition cond, DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6428     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6429     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6430     VIXL_ASSERT(allow_macro_instructions_);
6431     VIXL_ASSERT(OutsideITBlock());
6432     MacroEmissionCheckScope guard(this);
6433     ITScope it_scope(this, &cond, guard);
6434     vcvt(cond, dt1, dt2, rd, rm);
6435   }
Vcvt(DataType dt1,DataType dt2,QRegister rd,DRegister rm)6436   void Vcvt(DataType dt1, DataType dt2, QRegister rd, DRegister rm) {
6437     Vcvt(al, dt1, dt2, rd, rm);
6438   }
6439 
Vcvt(Condition cond,DataType dt1,DataType dt2,SRegister rd,SRegister rm)6440   void Vcvt(
6441       Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6442     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6443     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6444     VIXL_ASSERT(allow_macro_instructions_);
6445     VIXL_ASSERT(OutsideITBlock());
6446     MacroEmissionCheckScope guard(this);
6447     ITScope it_scope(this, &cond, guard);
6448     vcvt(cond, dt1, dt2, rd, rm);
6449   }
Vcvt(DataType dt1,DataType dt2,SRegister rd,SRegister rm)6450   void Vcvt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6451     Vcvt(al, dt1, dt2, rd, rm);
6452   }
6453 
Vcvta(DataType dt1,DataType dt2,DRegister rd,DRegister rm)6454   void Vcvta(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6455     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6456     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6457     VIXL_ASSERT(allow_macro_instructions_);
6458     VIXL_ASSERT(OutsideITBlock());
6459     MacroEmissionCheckScope guard(this);
6460     vcvta(dt1, dt2, rd, rm);
6461   }
6462 
Vcvta(DataType dt1,DataType dt2,QRegister rd,QRegister rm)6463   void Vcvta(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6464     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6465     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6466     VIXL_ASSERT(allow_macro_instructions_);
6467     VIXL_ASSERT(OutsideITBlock());
6468     MacroEmissionCheckScope guard(this);
6469     vcvta(dt1, dt2, rd, rm);
6470   }
6471 
Vcvta(DataType dt1,DataType dt2,SRegister rd,SRegister rm)6472   void Vcvta(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6473     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6474     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6475     VIXL_ASSERT(allow_macro_instructions_);
6476     VIXL_ASSERT(OutsideITBlock());
6477     MacroEmissionCheckScope guard(this);
6478     vcvta(dt1, dt2, rd, rm);
6479   }
6480 
Vcvta(DataType dt1,DataType dt2,SRegister rd,DRegister rm)6481   void Vcvta(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6482     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6483     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6484     VIXL_ASSERT(allow_macro_instructions_);
6485     VIXL_ASSERT(OutsideITBlock());
6486     MacroEmissionCheckScope guard(this);
6487     vcvta(dt1, dt2, rd, rm);
6488   }
6489 
Vcvtb(Condition cond,DataType dt1,DataType dt2,SRegister rd,SRegister rm)6490   void Vcvtb(
6491       Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6492     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6493     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6494     VIXL_ASSERT(allow_macro_instructions_);
6495     VIXL_ASSERT(OutsideITBlock());
6496     MacroEmissionCheckScope guard(this);
6497     ITScope it_scope(this, &cond, guard);
6498     vcvtb(cond, dt1, dt2, rd, rm);
6499   }
Vcvtb(DataType dt1,DataType dt2,SRegister rd,SRegister rm)6500   void Vcvtb(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6501     Vcvtb(al, dt1, dt2, rd, rm);
6502   }
6503 
Vcvtb(Condition cond,DataType dt1,DataType dt2,DRegister rd,SRegister rm)6504   void Vcvtb(
6505       Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6506     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6507     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6508     VIXL_ASSERT(allow_macro_instructions_);
6509     VIXL_ASSERT(OutsideITBlock());
6510     MacroEmissionCheckScope guard(this);
6511     ITScope it_scope(this, &cond, guard);
6512     vcvtb(cond, dt1, dt2, rd, rm);
6513   }
Vcvtb(DataType dt1,DataType dt2,DRegister rd,SRegister rm)6514   void Vcvtb(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6515     Vcvtb(al, dt1, dt2, rd, rm);
6516   }
6517 
Vcvtb(Condition cond,DataType dt1,DataType dt2,SRegister rd,DRegister rm)6518   void Vcvtb(
6519       Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6520     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6521     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6522     VIXL_ASSERT(allow_macro_instructions_);
6523     VIXL_ASSERT(OutsideITBlock());
6524     MacroEmissionCheckScope guard(this);
6525     ITScope it_scope(this, &cond, guard);
6526     vcvtb(cond, dt1, dt2, rd, rm);
6527   }
Vcvtb(DataType dt1,DataType dt2,SRegister rd,DRegister rm)6528   void Vcvtb(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6529     Vcvtb(al, dt1, dt2, rd, rm);
6530   }
6531 
Vcvtm(DataType dt1,DataType dt2,DRegister rd,DRegister rm)6532   void Vcvtm(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6533     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6534     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6535     VIXL_ASSERT(allow_macro_instructions_);
6536     VIXL_ASSERT(OutsideITBlock());
6537     MacroEmissionCheckScope guard(this);
6538     vcvtm(dt1, dt2, rd, rm);
6539   }
6540 
Vcvtm(DataType dt1,DataType dt2,QRegister rd,QRegister rm)6541   void Vcvtm(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6542     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6543     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6544     VIXL_ASSERT(allow_macro_instructions_);
6545     VIXL_ASSERT(OutsideITBlock());
6546     MacroEmissionCheckScope guard(this);
6547     vcvtm(dt1, dt2, rd, rm);
6548   }
6549 
Vcvtm(DataType dt1,DataType dt2,SRegister rd,SRegister rm)6550   void Vcvtm(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6551     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6552     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6553     VIXL_ASSERT(allow_macro_instructions_);
6554     VIXL_ASSERT(OutsideITBlock());
6555     MacroEmissionCheckScope guard(this);
6556     vcvtm(dt1, dt2, rd, rm);
6557   }
6558 
Vcvtm(DataType dt1,DataType dt2,SRegister rd,DRegister rm)6559   void Vcvtm(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6560     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6561     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6562     VIXL_ASSERT(allow_macro_instructions_);
6563     VIXL_ASSERT(OutsideITBlock());
6564     MacroEmissionCheckScope guard(this);
6565     vcvtm(dt1, dt2, rd, rm);
6566   }
6567 
Vcvtn(DataType dt1,DataType dt2,DRegister rd,DRegister rm)6568   void Vcvtn(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6569     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6570     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6571     VIXL_ASSERT(allow_macro_instructions_);
6572     VIXL_ASSERT(OutsideITBlock());
6573     MacroEmissionCheckScope guard(this);
6574     vcvtn(dt1, dt2, rd, rm);
6575   }
6576 
Vcvtn(DataType dt1,DataType dt2,QRegister rd,QRegister rm)6577   void Vcvtn(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6578     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6579     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6580     VIXL_ASSERT(allow_macro_instructions_);
6581     VIXL_ASSERT(OutsideITBlock());
6582     MacroEmissionCheckScope guard(this);
6583     vcvtn(dt1, dt2, rd, rm);
6584   }
6585 
Vcvtn(DataType dt1,DataType dt2,SRegister rd,SRegister rm)6586   void Vcvtn(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6587     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6588     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6589     VIXL_ASSERT(allow_macro_instructions_);
6590     VIXL_ASSERT(OutsideITBlock());
6591     MacroEmissionCheckScope guard(this);
6592     vcvtn(dt1, dt2, rd, rm);
6593   }
6594 
Vcvtn(DataType dt1,DataType dt2,SRegister rd,DRegister rm)6595   void Vcvtn(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6596     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6597     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6598     VIXL_ASSERT(allow_macro_instructions_);
6599     VIXL_ASSERT(OutsideITBlock());
6600     MacroEmissionCheckScope guard(this);
6601     vcvtn(dt1, dt2, rd, rm);
6602   }
6603 
Vcvtp(DataType dt1,DataType dt2,DRegister rd,DRegister rm)6604   void Vcvtp(DataType dt1, DataType dt2, DRegister rd, DRegister rm) {
6605     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6606     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6607     VIXL_ASSERT(allow_macro_instructions_);
6608     VIXL_ASSERT(OutsideITBlock());
6609     MacroEmissionCheckScope guard(this);
6610     vcvtp(dt1, dt2, rd, rm);
6611   }
6612 
Vcvtp(DataType dt1,DataType dt2,QRegister rd,QRegister rm)6613   void Vcvtp(DataType dt1, DataType dt2, QRegister rd, QRegister rm) {
6614     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6615     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6616     VIXL_ASSERT(allow_macro_instructions_);
6617     VIXL_ASSERT(OutsideITBlock());
6618     MacroEmissionCheckScope guard(this);
6619     vcvtp(dt1, dt2, rd, rm);
6620   }
6621 
Vcvtp(DataType dt1,DataType dt2,SRegister rd,SRegister rm)6622   void Vcvtp(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6623     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6624     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6625     VIXL_ASSERT(allow_macro_instructions_);
6626     VIXL_ASSERT(OutsideITBlock());
6627     MacroEmissionCheckScope guard(this);
6628     vcvtp(dt1, dt2, rd, rm);
6629   }
6630 
Vcvtp(DataType dt1,DataType dt2,SRegister rd,DRegister rm)6631   void Vcvtp(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6632     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6633     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6634     VIXL_ASSERT(allow_macro_instructions_);
6635     VIXL_ASSERT(OutsideITBlock());
6636     MacroEmissionCheckScope guard(this);
6637     vcvtp(dt1, dt2, rd, rm);
6638   }
6639 
Vcvtr(Condition cond,DataType dt1,DataType dt2,SRegister rd,SRegister rm)6640   void Vcvtr(
6641       Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6642     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6643     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6644     VIXL_ASSERT(allow_macro_instructions_);
6645     VIXL_ASSERT(OutsideITBlock());
6646     MacroEmissionCheckScope guard(this);
6647     ITScope it_scope(this, &cond, guard);
6648     vcvtr(cond, dt1, dt2, rd, rm);
6649   }
Vcvtr(DataType dt1,DataType dt2,SRegister rd,SRegister rm)6650   void Vcvtr(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6651     Vcvtr(al, dt1, dt2, rd, rm);
6652   }
6653 
Vcvtr(Condition cond,DataType dt1,DataType dt2,SRegister rd,DRegister rm)6654   void Vcvtr(
6655       Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6656     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6657     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6658     VIXL_ASSERT(allow_macro_instructions_);
6659     VIXL_ASSERT(OutsideITBlock());
6660     MacroEmissionCheckScope guard(this);
6661     ITScope it_scope(this, &cond, guard);
6662     vcvtr(cond, dt1, dt2, rd, rm);
6663   }
Vcvtr(DataType dt1,DataType dt2,SRegister rd,DRegister rm)6664   void Vcvtr(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6665     Vcvtr(al, dt1, dt2, rd, rm);
6666   }
6667 
Vcvtt(Condition cond,DataType dt1,DataType dt2,SRegister rd,SRegister rm)6668   void Vcvtt(
6669       Condition cond, DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6670     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6671     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6672     VIXL_ASSERT(allow_macro_instructions_);
6673     VIXL_ASSERT(OutsideITBlock());
6674     MacroEmissionCheckScope guard(this);
6675     ITScope it_scope(this, &cond, guard);
6676     vcvtt(cond, dt1, dt2, rd, rm);
6677   }
Vcvtt(DataType dt1,DataType dt2,SRegister rd,SRegister rm)6678   void Vcvtt(DataType dt1, DataType dt2, SRegister rd, SRegister rm) {
6679     Vcvtt(al, dt1, dt2, rd, rm);
6680   }
6681 
Vcvtt(Condition cond,DataType dt1,DataType dt2,DRegister rd,SRegister rm)6682   void Vcvtt(
6683       Condition cond, DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6684     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6685     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6686     VIXL_ASSERT(allow_macro_instructions_);
6687     VIXL_ASSERT(OutsideITBlock());
6688     MacroEmissionCheckScope guard(this);
6689     ITScope it_scope(this, &cond, guard);
6690     vcvtt(cond, dt1, dt2, rd, rm);
6691   }
Vcvtt(DataType dt1,DataType dt2,DRegister rd,SRegister rm)6692   void Vcvtt(DataType dt1, DataType dt2, DRegister rd, SRegister rm) {
6693     Vcvtt(al, dt1, dt2, rd, rm);
6694   }
6695 
Vcvtt(Condition cond,DataType dt1,DataType dt2,SRegister rd,DRegister rm)6696   void Vcvtt(
6697       Condition cond, DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6698     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6699     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6700     VIXL_ASSERT(allow_macro_instructions_);
6701     VIXL_ASSERT(OutsideITBlock());
6702     MacroEmissionCheckScope guard(this);
6703     ITScope it_scope(this, &cond, guard);
6704     vcvtt(cond, dt1, dt2, rd, rm);
6705   }
Vcvtt(DataType dt1,DataType dt2,SRegister rd,DRegister rm)6706   void Vcvtt(DataType dt1, DataType dt2, SRegister rd, DRegister rm) {
6707     Vcvtt(al, dt1, dt2, rd, rm);
6708   }
6709 
Vdiv(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)6710   void Vdiv(
6711       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6712     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6713     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6714     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6715     VIXL_ASSERT(allow_macro_instructions_);
6716     VIXL_ASSERT(OutsideITBlock());
6717     MacroEmissionCheckScope guard(this);
6718     ITScope it_scope(this, &cond, guard);
6719     vdiv(cond, dt, rd, rn, rm);
6720   }
Vdiv(DataType dt,SRegister rd,SRegister rn,SRegister rm)6721   void Vdiv(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6722     Vdiv(al, dt, rd, rn, rm);
6723   }
6724 
Vdiv(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)6725   void Vdiv(
6726       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6727     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6728     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6729     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6730     VIXL_ASSERT(allow_macro_instructions_);
6731     VIXL_ASSERT(OutsideITBlock());
6732     MacroEmissionCheckScope guard(this);
6733     ITScope it_scope(this, &cond, guard);
6734     vdiv(cond, dt, rd, rn, rm);
6735   }
Vdiv(DataType dt,DRegister rd,DRegister rn,DRegister rm)6736   void Vdiv(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6737     Vdiv(al, dt, rd, rn, rm);
6738   }
6739 
Vdup(Condition cond,DataType dt,QRegister rd,Register rt)6740   void Vdup(Condition cond, DataType dt, QRegister rd, Register rt) {
6741     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6742     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6743     VIXL_ASSERT(allow_macro_instructions_);
6744     VIXL_ASSERT(OutsideITBlock());
6745     MacroEmissionCheckScope guard(this);
6746     ITScope it_scope(this, &cond, guard);
6747     vdup(cond, dt, rd, rt);
6748   }
Vdup(DataType dt,QRegister rd,Register rt)6749   void Vdup(DataType dt, QRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6750 
Vdup(Condition cond,DataType dt,DRegister rd,Register rt)6751   void Vdup(Condition cond, DataType dt, DRegister rd, Register rt) {
6752     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6753     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
6754     VIXL_ASSERT(allow_macro_instructions_);
6755     VIXL_ASSERT(OutsideITBlock());
6756     MacroEmissionCheckScope guard(this);
6757     ITScope it_scope(this, &cond, guard);
6758     vdup(cond, dt, rd, rt);
6759   }
Vdup(DataType dt,DRegister rd,Register rt)6760   void Vdup(DataType dt, DRegister rd, Register rt) { Vdup(al, dt, rd, rt); }
6761 
Vdup(Condition cond,DataType dt,DRegister rd,DRegisterLane rm)6762   void Vdup(Condition cond, DataType dt, DRegister rd, DRegisterLane rm) {
6763     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6764     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6765     VIXL_ASSERT(allow_macro_instructions_);
6766     VIXL_ASSERT(OutsideITBlock());
6767     MacroEmissionCheckScope guard(this);
6768     ITScope it_scope(this, &cond, guard);
6769     vdup(cond, dt, rd, rm);
6770   }
Vdup(DataType dt,DRegister rd,DRegisterLane rm)6771   void Vdup(DataType dt, DRegister rd, DRegisterLane rm) {
6772     Vdup(al, dt, rd, rm);
6773   }
6774 
Vdup(Condition cond,DataType dt,QRegister rd,DRegisterLane rm)6775   void Vdup(Condition cond, DataType dt, QRegister rd, DRegisterLane rm) {
6776     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6777     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6778     VIXL_ASSERT(allow_macro_instructions_);
6779     VIXL_ASSERT(OutsideITBlock());
6780     MacroEmissionCheckScope guard(this);
6781     ITScope it_scope(this, &cond, guard);
6782     vdup(cond, dt, rd, rm);
6783   }
Vdup(DataType dt,QRegister rd,DRegisterLane rm)6784   void Vdup(DataType dt, QRegister rd, DRegisterLane rm) {
6785     Vdup(al, dt, rd, rm);
6786   }
6787 
Veor(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)6788   void Veor(
6789       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6790     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6791     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6792     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6793     VIXL_ASSERT(allow_macro_instructions_);
6794     VIXL_ASSERT(OutsideITBlock());
6795     MacroEmissionCheckScope guard(this);
6796     ITScope it_scope(this, &cond, guard);
6797     veor(cond, dt, rd, rn, rm);
6798   }
Veor(DataType dt,DRegister rd,DRegister rn,DRegister rm)6799   void Veor(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6800     Veor(al, dt, rd, rn, rm);
6801   }
Veor(Condition cond,DRegister rd,DRegister rn,DRegister rm)6802   void Veor(Condition cond, DRegister rd, DRegister rn, DRegister rm) {
6803     Veor(cond, kDataTypeValueNone, rd, rn, rm);
6804   }
Veor(DRegister rd,DRegister rn,DRegister rm)6805   void Veor(DRegister rd, DRegister rn, DRegister rm) {
6806     Veor(al, kDataTypeValueNone, rd, rn, rm);
6807   }
6808 
Veor(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)6809   void Veor(
6810       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6811     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6812     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6813     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6814     VIXL_ASSERT(allow_macro_instructions_);
6815     VIXL_ASSERT(OutsideITBlock());
6816     MacroEmissionCheckScope guard(this);
6817     ITScope it_scope(this, &cond, guard);
6818     veor(cond, dt, rd, rn, rm);
6819   }
Veor(DataType dt,QRegister rd,QRegister rn,QRegister rm)6820   void Veor(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6821     Veor(al, dt, rd, rn, rm);
6822   }
Veor(Condition cond,QRegister rd,QRegister rn,QRegister rm)6823   void Veor(Condition cond, QRegister rd, QRegister rn, QRegister rm) {
6824     Veor(cond, kDataTypeValueNone, rd, rn, rm);
6825   }
Veor(QRegister rd,QRegister rn,QRegister rm)6826   void Veor(QRegister rd, QRegister rn, QRegister rm) {
6827     Veor(al, kDataTypeValueNone, rd, rn, rm);
6828   }
6829 
Vext(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm,const DOperand & operand)6830   void Vext(Condition cond,
6831             DataType dt,
6832             DRegister rd,
6833             DRegister rn,
6834             DRegister rm,
6835             const DOperand& operand) {
6836     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6837     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6838     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6839     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6840     VIXL_ASSERT(allow_macro_instructions_);
6841     VIXL_ASSERT(OutsideITBlock());
6842     MacroEmissionCheckScope guard(this);
6843     ITScope it_scope(this, &cond, guard);
6844     vext(cond, dt, rd, rn, rm, operand);
6845   }
Vext(DataType dt,DRegister rd,DRegister rn,DRegister rm,const DOperand & operand)6846   void Vext(DataType dt,
6847             DRegister rd,
6848             DRegister rn,
6849             DRegister rm,
6850             const DOperand& operand) {
6851     Vext(al, dt, rd, rn, rm, operand);
6852   }
6853 
Vext(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm,const QOperand & operand)6854   void Vext(Condition cond,
6855             DataType dt,
6856             QRegister rd,
6857             QRegister rn,
6858             QRegister rm,
6859             const QOperand& operand) {
6860     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6861     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6862     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6863     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
6864     VIXL_ASSERT(allow_macro_instructions_);
6865     VIXL_ASSERT(OutsideITBlock());
6866     MacroEmissionCheckScope guard(this);
6867     ITScope it_scope(this, &cond, guard);
6868     vext(cond, dt, rd, rn, rm, operand);
6869   }
Vext(DataType dt,QRegister rd,QRegister rn,QRegister rm,const QOperand & operand)6870   void Vext(DataType dt,
6871             QRegister rd,
6872             QRegister rn,
6873             QRegister rm,
6874             const QOperand& operand) {
6875     Vext(al, dt, rd, rn, rm, operand);
6876   }
6877 
Vfma(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)6878   void Vfma(
6879       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6880     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6881     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6882     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6883     VIXL_ASSERT(allow_macro_instructions_);
6884     VIXL_ASSERT(OutsideITBlock());
6885     MacroEmissionCheckScope guard(this);
6886     ITScope it_scope(this, &cond, guard);
6887     vfma(cond, dt, rd, rn, rm);
6888   }
Vfma(DataType dt,DRegister rd,DRegister rn,DRegister rm)6889   void Vfma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6890     Vfma(al, dt, rd, rn, rm);
6891   }
6892 
Vfma(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)6893   void Vfma(
6894       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6895     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6896     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6897     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6898     VIXL_ASSERT(allow_macro_instructions_);
6899     VIXL_ASSERT(OutsideITBlock());
6900     MacroEmissionCheckScope guard(this);
6901     ITScope it_scope(this, &cond, guard);
6902     vfma(cond, dt, rd, rn, rm);
6903   }
Vfma(DataType dt,QRegister rd,QRegister rn,QRegister rm)6904   void Vfma(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6905     Vfma(al, dt, rd, rn, rm);
6906   }
6907 
Vfma(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)6908   void Vfma(
6909       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6910     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6911     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6912     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6913     VIXL_ASSERT(allow_macro_instructions_);
6914     VIXL_ASSERT(OutsideITBlock());
6915     MacroEmissionCheckScope guard(this);
6916     ITScope it_scope(this, &cond, guard);
6917     vfma(cond, dt, rd, rn, rm);
6918   }
Vfma(DataType dt,SRegister rd,SRegister rn,SRegister rm)6919   void Vfma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6920     Vfma(al, dt, rd, rn, rm);
6921   }
6922 
Vfms(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)6923   void Vfms(
6924       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6925     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6926     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6927     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6928     VIXL_ASSERT(allow_macro_instructions_);
6929     VIXL_ASSERT(OutsideITBlock());
6930     MacroEmissionCheckScope guard(this);
6931     ITScope it_scope(this, &cond, guard);
6932     vfms(cond, dt, rd, rn, rm);
6933   }
Vfms(DataType dt,DRegister rd,DRegister rn,DRegister rm)6934   void Vfms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6935     Vfms(al, dt, rd, rn, rm);
6936   }
6937 
Vfms(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)6938   void Vfms(
6939       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6940     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6941     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6942     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6943     VIXL_ASSERT(allow_macro_instructions_);
6944     VIXL_ASSERT(OutsideITBlock());
6945     MacroEmissionCheckScope guard(this);
6946     ITScope it_scope(this, &cond, guard);
6947     vfms(cond, dt, rd, rn, rm);
6948   }
Vfms(DataType dt,QRegister rd,QRegister rn,QRegister rm)6949   void Vfms(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
6950     Vfms(al, dt, rd, rn, rm);
6951   }
6952 
Vfms(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)6953   void Vfms(
6954       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6955     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6956     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6957     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6958     VIXL_ASSERT(allow_macro_instructions_);
6959     VIXL_ASSERT(OutsideITBlock());
6960     MacroEmissionCheckScope guard(this);
6961     ITScope it_scope(this, &cond, guard);
6962     vfms(cond, dt, rd, rn, rm);
6963   }
Vfms(DataType dt,SRegister rd,SRegister rn,SRegister rm)6964   void Vfms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6965     Vfms(al, dt, rd, rn, rm);
6966   }
6967 
Vfnma(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)6968   void Vfnma(
6969       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6970     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6971     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6972     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6973     VIXL_ASSERT(allow_macro_instructions_);
6974     VIXL_ASSERT(OutsideITBlock());
6975     MacroEmissionCheckScope guard(this);
6976     ITScope it_scope(this, &cond, guard);
6977     vfnma(cond, dt, rd, rn, rm);
6978   }
Vfnma(DataType dt,SRegister rd,SRegister rn,SRegister rm)6979   void Vfnma(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
6980     Vfnma(al, dt, rd, rn, rm);
6981   }
6982 
Vfnma(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)6983   void Vfnma(
6984       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6985     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
6986     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
6987     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
6988     VIXL_ASSERT(allow_macro_instructions_);
6989     VIXL_ASSERT(OutsideITBlock());
6990     MacroEmissionCheckScope guard(this);
6991     ITScope it_scope(this, &cond, guard);
6992     vfnma(cond, dt, rd, rn, rm);
6993   }
Vfnma(DataType dt,DRegister rd,DRegister rn,DRegister rm)6994   void Vfnma(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
6995     Vfnma(al, dt, rd, rn, rm);
6996   }
6997 
Vfnms(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)6998   void Vfnms(
6999       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7000     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7001     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7002     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7003     VIXL_ASSERT(allow_macro_instructions_);
7004     VIXL_ASSERT(OutsideITBlock());
7005     MacroEmissionCheckScope guard(this);
7006     ITScope it_scope(this, &cond, guard);
7007     vfnms(cond, dt, rd, rn, rm);
7008   }
Vfnms(DataType dt,SRegister rd,SRegister rn,SRegister rm)7009   void Vfnms(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7010     Vfnms(al, dt, rd, rn, rm);
7011   }
7012 
Vfnms(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)7013   void Vfnms(
7014       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7015     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7016     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7017     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7018     VIXL_ASSERT(allow_macro_instructions_);
7019     VIXL_ASSERT(OutsideITBlock());
7020     MacroEmissionCheckScope guard(this);
7021     ITScope it_scope(this, &cond, guard);
7022     vfnms(cond, dt, rd, rn, rm);
7023   }
Vfnms(DataType dt,DRegister rd,DRegister rn,DRegister rm)7024   void Vfnms(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7025     Vfnms(al, dt, rd, rn, rm);
7026   }
7027 
Vhadd(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)7028   void Vhadd(
7029       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7030     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7031     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7032     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7033     VIXL_ASSERT(allow_macro_instructions_);
7034     VIXL_ASSERT(OutsideITBlock());
7035     MacroEmissionCheckScope guard(this);
7036     ITScope it_scope(this, &cond, guard);
7037     vhadd(cond, dt, rd, rn, rm);
7038   }
Vhadd(DataType dt,DRegister rd,DRegister rn,DRegister rm)7039   void Vhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7040     Vhadd(al, dt, rd, rn, rm);
7041   }
7042 
Vhadd(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)7043   void Vhadd(
7044       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7045     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7046     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7047     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7048     VIXL_ASSERT(allow_macro_instructions_);
7049     VIXL_ASSERT(OutsideITBlock());
7050     MacroEmissionCheckScope guard(this);
7051     ITScope it_scope(this, &cond, guard);
7052     vhadd(cond, dt, rd, rn, rm);
7053   }
Vhadd(DataType dt,QRegister rd,QRegister rn,QRegister rm)7054   void Vhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7055     Vhadd(al, dt, rd, rn, rm);
7056   }
7057 
Vhsub(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)7058   void Vhsub(
7059       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7060     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7061     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7062     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7063     VIXL_ASSERT(allow_macro_instructions_);
7064     VIXL_ASSERT(OutsideITBlock());
7065     MacroEmissionCheckScope guard(this);
7066     ITScope it_scope(this, &cond, guard);
7067     vhsub(cond, dt, rd, rn, rm);
7068   }
Vhsub(DataType dt,DRegister rd,DRegister rn,DRegister rm)7069   void Vhsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7070     Vhsub(al, dt, rd, rn, rm);
7071   }
7072 
Vhsub(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)7073   void Vhsub(
7074       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7075     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7076     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7077     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7078     VIXL_ASSERT(allow_macro_instructions_);
7079     VIXL_ASSERT(OutsideITBlock());
7080     MacroEmissionCheckScope guard(this);
7081     ITScope it_scope(this, &cond, guard);
7082     vhsub(cond, dt, rd, rn, rm);
7083   }
Vhsub(DataType dt,QRegister rd,QRegister rn,QRegister rm)7084   void Vhsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7085     Vhsub(al, dt, rd, rn, rm);
7086   }
7087 
Vld1(Condition cond,DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)7088   void Vld1(Condition cond,
7089             DataType dt,
7090             const NeonRegisterList& nreglist,
7091             const AlignedMemOperand& operand) {
7092     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7093     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7094     VIXL_ASSERT(allow_macro_instructions_);
7095     VIXL_ASSERT(OutsideITBlock());
7096     MacroEmissionCheckScope guard(this);
7097     ITScope it_scope(this, &cond, guard);
7098     vld1(cond, dt, nreglist, operand);
7099   }
Vld1(DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)7100   void Vld1(DataType dt,
7101             const NeonRegisterList& nreglist,
7102             const AlignedMemOperand& operand) {
7103     Vld1(al, dt, nreglist, operand);
7104   }
7105 
Vld2(Condition cond,DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)7106   void Vld2(Condition cond,
7107             DataType dt,
7108             const NeonRegisterList& nreglist,
7109             const AlignedMemOperand& operand) {
7110     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7111     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7112     VIXL_ASSERT(allow_macro_instructions_);
7113     VIXL_ASSERT(OutsideITBlock());
7114     MacroEmissionCheckScope guard(this);
7115     ITScope it_scope(this, &cond, guard);
7116     vld2(cond, dt, nreglist, operand);
7117   }
Vld2(DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)7118   void Vld2(DataType dt,
7119             const NeonRegisterList& nreglist,
7120             const AlignedMemOperand& operand) {
7121     Vld2(al, dt, nreglist, operand);
7122   }
7123 
Vld3(Condition cond,DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)7124   void Vld3(Condition cond,
7125             DataType dt,
7126             const NeonRegisterList& nreglist,
7127             const AlignedMemOperand& operand) {
7128     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7129     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7130     VIXL_ASSERT(allow_macro_instructions_);
7131     VIXL_ASSERT(OutsideITBlock());
7132     MacroEmissionCheckScope guard(this);
7133     ITScope it_scope(this, &cond, guard);
7134     vld3(cond, dt, nreglist, operand);
7135   }
Vld3(DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)7136   void Vld3(DataType dt,
7137             const NeonRegisterList& nreglist,
7138             const AlignedMemOperand& operand) {
7139     Vld3(al, dt, nreglist, operand);
7140   }
7141 
Vld3(Condition cond,DataType dt,const NeonRegisterList & nreglist,const MemOperand & operand)7142   void Vld3(Condition cond,
7143             DataType dt,
7144             const NeonRegisterList& nreglist,
7145             const MemOperand& operand) {
7146     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7147     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7148     VIXL_ASSERT(allow_macro_instructions_);
7149     VIXL_ASSERT(OutsideITBlock());
7150     MacroEmissionCheckScope guard(this);
7151     ITScope it_scope(this, &cond, guard);
7152     vld3(cond, dt, nreglist, operand);
7153   }
Vld3(DataType dt,const NeonRegisterList & nreglist,const MemOperand & operand)7154   void Vld3(DataType dt,
7155             const NeonRegisterList& nreglist,
7156             const MemOperand& operand) {
7157     Vld3(al, dt, nreglist, operand);
7158   }
7159 
Vld4(Condition cond,DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)7160   void Vld4(Condition cond,
7161             DataType dt,
7162             const NeonRegisterList& nreglist,
7163             const AlignedMemOperand& operand) {
7164     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
7165     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7166     VIXL_ASSERT(allow_macro_instructions_);
7167     VIXL_ASSERT(OutsideITBlock());
7168     MacroEmissionCheckScope guard(this);
7169     ITScope it_scope(this, &cond, guard);
7170     vld4(cond, dt, nreglist, operand);
7171   }
Vld4(DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)7172   void Vld4(DataType dt,
7173             const NeonRegisterList& nreglist,
7174             const AlignedMemOperand& operand) {
7175     Vld4(al, dt, nreglist, operand);
7176   }
7177 
Vldm(Condition cond,DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)7178   void Vldm(Condition cond,
7179             DataType dt,
7180             Register rn,
7181             WriteBack write_back,
7182             DRegisterList dreglist) {
7183     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7184     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7185     VIXL_ASSERT(allow_macro_instructions_);
7186     VIXL_ASSERT(OutsideITBlock());
7187     MacroEmissionCheckScope guard(this);
7188     ITScope it_scope(this, &cond, guard);
7189     vldm(cond, dt, rn, write_back, dreglist);
7190   }
Vldm(DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)7191   void Vldm(DataType dt,
7192             Register rn,
7193             WriteBack write_back,
7194             DRegisterList dreglist) {
7195     Vldm(al, dt, rn, write_back, dreglist);
7196   }
Vldm(Condition cond,Register rn,WriteBack write_back,DRegisterList dreglist)7197   void Vldm(Condition cond,
7198             Register rn,
7199             WriteBack write_back,
7200             DRegisterList dreglist) {
7201     Vldm(cond, kDataTypeValueNone, rn, write_back, dreglist);
7202   }
Vldm(Register rn,WriteBack write_back,DRegisterList dreglist)7203   void Vldm(Register rn, WriteBack write_back, DRegisterList dreglist) {
7204     Vldm(al, kDataTypeValueNone, rn, write_back, dreglist);
7205   }
7206 
Vldm(Condition cond,DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)7207   void Vldm(Condition cond,
7208             DataType dt,
7209             Register rn,
7210             WriteBack write_back,
7211             SRegisterList sreglist) {
7212     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7213     VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7214     VIXL_ASSERT(allow_macro_instructions_);
7215     VIXL_ASSERT(OutsideITBlock());
7216     MacroEmissionCheckScope guard(this);
7217     ITScope it_scope(this, &cond, guard);
7218     vldm(cond, dt, rn, write_back, sreglist);
7219   }
Vldm(DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)7220   void Vldm(DataType dt,
7221             Register rn,
7222             WriteBack write_back,
7223             SRegisterList sreglist) {
7224     Vldm(al, dt, rn, write_back, sreglist);
7225   }
Vldm(Condition cond,Register rn,WriteBack write_back,SRegisterList sreglist)7226   void Vldm(Condition cond,
7227             Register rn,
7228             WriteBack write_back,
7229             SRegisterList sreglist) {
7230     Vldm(cond, kDataTypeValueNone, rn, write_back, sreglist);
7231   }
Vldm(Register rn,WriteBack write_back,SRegisterList sreglist)7232   void Vldm(Register rn, WriteBack write_back, SRegisterList sreglist) {
7233     Vldm(al, kDataTypeValueNone, rn, write_back, sreglist);
7234   }
7235 
Vldmdb(Condition cond,DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)7236   void Vldmdb(Condition cond,
7237               DataType dt,
7238               Register rn,
7239               WriteBack write_back,
7240               DRegisterList dreglist) {
7241     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7242     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7243     VIXL_ASSERT(allow_macro_instructions_);
7244     VIXL_ASSERT(OutsideITBlock());
7245     MacroEmissionCheckScope guard(this);
7246     ITScope it_scope(this, &cond, guard);
7247     vldmdb(cond, dt, rn, write_back, dreglist);
7248   }
Vldmdb(DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)7249   void Vldmdb(DataType dt,
7250               Register rn,
7251               WriteBack write_back,
7252               DRegisterList dreglist) {
7253     Vldmdb(al, dt, rn, write_back, dreglist);
7254   }
Vldmdb(Condition cond,Register rn,WriteBack write_back,DRegisterList dreglist)7255   void Vldmdb(Condition cond,
7256               Register rn,
7257               WriteBack write_back,
7258               DRegisterList dreglist) {
7259     Vldmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
7260   }
Vldmdb(Register rn,WriteBack write_back,DRegisterList dreglist)7261   void Vldmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
7262     Vldmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
7263   }
7264 
Vldmdb(Condition cond,DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)7265   void Vldmdb(Condition cond,
7266               DataType dt,
7267               Register rn,
7268               WriteBack write_back,
7269               SRegisterList sreglist) {
7270     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7271     VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7272     VIXL_ASSERT(allow_macro_instructions_);
7273     VIXL_ASSERT(OutsideITBlock());
7274     MacroEmissionCheckScope guard(this);
7275     ITScope it_scope(this, &cond, guard);
7276     vldmdb(cond, dt, rn, write_back, sreglist);
7277   }
Vldmdb(DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)7278   void Vldmdb(DataType dt,
7279               Register rn,
7280               WriteBack write_back,
7281               SRegisterList sreglist) {
7282     Vldmdb(al, dt, rn, write_back, sreglist);
7283   }
Vldmdb(Condition cond,Register rn,WriteBack write_back,SRegisterList sreglist)7284   void Vldmdb(Condition cond,
7285               Register rn,
7286               WriteBack write_back,
7287               SRegisterList sreglist) {
7288     Vldmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
7289   }
Vldmdb(Register rn,WriteBack write_back,SRegisterList sreglist)7290   void Vldmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
7291     Vldmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
7292   }
7293 
Vldmia(Condition cond,DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)7294   void Vldmia(Condition cond,
7295               DataType dt,
7296               Register rn,
7297               WriteBack write_back,
7298               DRegisterList dreglist) {
7299     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7300     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
7301     VIXL_ASSERT(allow_macro_instructions_);
7302     VIXL_ASSERT(OutsideITBlock());
7303     MacroEmissionCheckScope guard(this);
7304     ITScope it_scope(this, &cond, guard);
7305     vldmia(cond, dt, rn, write_back, dreglist);
7306   }
Vldmia(DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)7307   void Vldmia(DataType dt,
7308               Register rn,
7309               WriteBack write_back,
7310               DRegisterList dreglist) {
7311     Vldmia(al, dt, rn, write_back, dreglist);
7312   }
Vldmia(Condition cond,Register rn,WriteBack write_back,DRegisterList dreglist)7313   void Vldmia(Condition cond,
7314               Register rn,
7315               WriteBack write_back,
7316               DRegisterList dreglist) {
7317     Vldmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
7318   }
Vldmia(Register rn,WriteBack write_back,DRegisterList dreglist)7319   void Vldmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
7320     Vldmia(al, kDataTypeValueNone, rn, write_back, dreglist);
7321   }
7322 
Vldmia(Condition cond,DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)7323   void Vldmia(Condition cond,
7324               DataType dt,
7325               Register rn,
7326               WriteBack write_back,
7327               SRegisterList sreglist) {
7328     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7329     VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
7330     VIXL_ASSERT(allow_macro_instructions_);
7331     VIXL_ASSERT(OutsideITBlock());
7332     MacroEmissionCheckScope guard(this);
7333     ITScope it_scope(this, &cond, guard);
7334     vldmia(cond, dt, rn, write_back, sreglist);
7335   }
Vldmia(DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)7336   void Vldmia(DataType dt,
7337               Register rn,
7338               WriteBack write_back,
7339               SRegisterList sreglist) {
7340     Vldmia(al, dt, rn, write_back, sreglist);
7341   }
Vldmia(Condition cond,Register rn,WriteBack write_back,SRegisterList sreglist)7342   void Vldmia(Condition cond,
7343               Register rn,
7344               WriteBack write_back,
7345               SRegisterList sreglist) {
7346     Vldmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
7347   }
Vldmia(Register rn,WriteBack write_back,SRegisterList sreglist)7348   void Vldmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
7349     Vldmia(al, kDataTypeValueNone, rn, write_back, sreglist);
7350   }
7351 
7352 
Vldr(Condition cond,DataType dt,DRegister rd,const MemOperand & operand)7353   void Vldr(Condition cond,
7354             DataType dt,
7355             DRegister rd,
7356             const MemOperand& operand) {
7357     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7358     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7359     VIXL_ASSERT(allow_macro_instructions_);
7360     VIXL_ASSERT(OutsideITBlock());
7361     MacroEmissionCheckScope guard(this);
7362     ITScope it_scope(this, &cond, guard);
7363     vldr(cond, dt, rd, operand);
7364   }
Vldr(DataType dt,DRegister rd,const MemOperand & operand)7365   void Vldr(DataType dt, DRegister rd, const MemOperand& operand) {
7366     Vldr(al, dt, rd, operand);
7367   }
Vldr(Condition cond,DRegister rd,const MemOperand & operand)7368   void Vldr(Condition cond, DRegister rd, const MemOperand& operand) {
7369     Vldr(cond, Untyped64, rd, operand);
7370   }
Vldr(DRegister rd,const MemOperand & operand)7371   void Vldr(DRegister rd, const MemOperand& operand) {
7372     Vldr(al, Untyped64, rd, operand);
7373   }
7374 
7375 
Vldr(Condition cond,DataType dt,SRegister rd,const MemOperand & operand)7376   void Vldr(Condition cond,
7377             DataType dt,
7378             SRegister rd,
7379             const MemOperand& operand) {
7380     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7381     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7382     VIXL_ASSERT(allow_macro_instructions_);
7383     VIXL_ASSERT(OutsideITBlock());
7384     MacroEmissionCheckScope guard(this);
7385     ITScope it_scope(this, &cond, guard);
7386     vldr(cond, dt, rd, operand);
7387   }
Vldr(DataType dt,SRegister rd,const MemOperand & operand)7388   void Vldr(DataType dt, SRegister rd, const MemOperand& operand) {
7389     Vldr(al, dt, rd, operand);
7390   }
Vldr(Condition cond,SRegister rd,const MemOperand & operand)7391   void Vldr(Condition cond, SRegister rd, const MemOperand& operand) {
7392     Vldr(cond, Untyped32, rd, operand);
7393   }
Vldr(SRegister rd,const MemOperand & operand)7394   void Vldr(SRegister rd, const MemOperand& operand) {
7395     Vldr(al, Untyped32, rd, operand);
7396   }
7397 
Vmax(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)7398   void Vmax(
7399       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7400     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7401     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7402     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7403     VIXL_ASSERT(allow_macro_instructions_);
7404     VIXL_ASSERT(OutsideITBlock());
7405     MacroEmissionCheckScope guard(this);
7406     ITScope it_scope(this, &cond, guard);
7407     vmax(cond, dt, rd, rn, rm);
7408   }
Vmax(DataType dt,DRegister rd,DRegister rn,DRegister rm)7409   void Vmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7410     Vmax(al, dt, rd, rn, rm);
7411   }
7412 
Vmax(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)7413   void Vmax(
7414       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7415     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7416     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7417     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7418     VIXL_ASSERT(allow_macro_instructions_);
7419     VIXL_ASSERT(OutsideITBlock());
7420     MacroEmissionCheckScope guard(this);
7421     ITScope it_scope(this, &cond, guard);
7422     vmax(cond, dt, rd, rn, rm);
7423   }
Vmax(DataType dt,QRegister rd,QRegister rn,QRegister rm)7424   void Vmax(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7425     Vmax(al, dt, rd, rn, rm);
7426   }
7427 
Vmaxnm(DataType dt,DRegister rd,DRegister rn,DRegister rm)7428   void Vmaxnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7429     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7430     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7431     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7432     VIXL_ASSERT(allow_macro_instructions_);
7433     VIXL_ASSERT(OutsideITBlock());
7434     MacroEmissionCheckScope guard(this);
7435     vmaxnm(dt, rd, rn, rm);
7436   }
7437 
Vmaxnm(DataType dt,QRegister rd,QRegister rn,QRegister rm)7438   void Vmaxnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7439     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7440     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7441     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7442     VIXL_ASSERT(allow_macro_instructions_);
7443     VIXL_ASSERT(OutsideITBlock());
7444     MacroEmissionCheckScope guard(this);
7445     vmaxnm(dt, rd, rn, rm);
7446   }
7447 
Vmaxnm(DataType dt,SRegister rd,SRegister rn,SRegister rm)7448   void Vmaxnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7449     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7450     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7451     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7452     VIXL_ASSERT(allow_macro_instructions_);
7453     VIXL_ASSERT(OutsideITBlock());
7454     MacroEmissionCheckScope guard(this);
7455     vmaxnm(dt, rd, rn, rm);
7456   }
7457 
Vmin(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)7458   void Vmin(
7459       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7460     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7461     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7462     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7463     VIXL_ASSERT(allow_macro_instructions_);
7464     VIXL_ASSERT(OutsideITBlock());
7465     MacroEmissionCheckScope guard(this);
7466     ITScope it_scope(this, &cond, guard);
7467     vmin(cond, dt, rd, rn, rm);
7468   }
Vmin(DataType dt,DRegister rd,DRegister rn,DRegister rm)7469   void Vmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7470     Vmin(al, dt, rd, rn, rm);
7471   }
7472 
Vmin(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)7473   void Vmin(
7474       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7475     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7476     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7477     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7478     VIXL_ASSERT(allow_macro_instructions_);
7479     VIXL_ASSERT(OutsideITBlock());
7480     MacroEmissionCheckScope guard(this);
7481     ITScope it_scope(this, &cond, guard);
7482     vmin(cond, dt, rd, rn, rm);
7483   }
Vmin(DataType dt,QRegister rd,QRegister rn,QRegister rm)7484   void Vmin(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7485     Vmin(al, dt, rd, rn, rm);
7486   }
7487 
Vminnm(DataType dt,DRegister rd,DRegister rn,DRegister rm)7488   void Vminnm(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7489     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7490     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7491     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7492     VIXL_ASSERT(allow_macro_instructions_);
7493     VIXL_ASSERT(OutsideITBlock());
7494     MacroEmissionCheckScope guard(this);
7495     vminnm(dt, rd, rn, rm);
7496   }
7497 
Vminnm(DataType dt,QRegister rd,QRegister rn,QRegister rm)7498   void Vminnm(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7499     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7500     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7501     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7502     VIXL_ASSERT(allow_macro_instructions_);
7503     VIXL_ASSERT(OutsideITBlock());
7504     MacroEmissionCheckScope guard(this);
7505     vminnm(dt, rd, rn, rm);
7506   }
7507 
Vminnm(DataType dt,SRegister rd,SRegister rn,SRegister rm)7508   void Vminnm(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7509     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7510     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7511     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7512     VIXL_ASSERT(allow_macro_instructions_);
7513     VIXL_ASSERT(OutsideITBlock());
7514     MacroEmissionCheckScope guard(this);
7515     vminnm(dt, rd, rn, rm);
7516   }
7517 
Vmla(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegisterLane rm)7518   void Vmla(Condition cond,
7519             DataType dt,
7520             DRegister rd,
7521             DRegister rn,
7522             DRegisterLane rm) {
7523     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7524     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7525     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7526     VIXL_ASSERT(allow_macro_instructions_);
7527     VIXL_ASSERT(OutsideITBlock());
7528     MacroEmissionCheckScope guard(this);
7529     ITScope it_scope(this, &cond, guard);
7530     vmla(cond, dt, rd, rn, rm);
7531   }
Vmla(DataType dt,DRegister rd,DRegister rn,DRegisterLane rm)7532   void Vmla(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7533     Vmla(al, dt, rd, rn, rm);
7534   }
7535 
Vmla(Condition cond,DataType dt,QRegister rd,QRegister rn,DRegisterLane rm)7536   void Vmla(Condition cond,
7537             DataType dt,
7538             QRegister rd,
7539             QRegister rn,
7540             DRegisterLane rm) {
7541     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7542     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7543     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7544     VIXL_ASSERT(allow_macro_instructions_);
7545     VIXL_ASSERT(OutsideITBlock());
7546     MacroEmissionCheckScope guard(this);
7547     ITScope it_scope(this, &cond, guard);
7548     vmla(cond, dt, rd, rn, rm);
7549   }
Vmla(DataType dt,QRegister rd,QRegister rn,DRegisterLane rm)7550   void Vmla(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7551     Vmla(al, dt, rd, rn, rm);
7552   }
7553 
Vmla(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)7554   void Vmla(
7555       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7556     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7557     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7558     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7559     VIXL_ASSERT(allow_macro_instructions_);
7560     VIXL_ASSERT(OutsideITBlock());
7561     MacroEmissionCheckScope guard(this);
7562     ITScope it_scope(this, &cond, guard);
7563     vmla(cond, dt, rd, rn, rm);
7564   }
Vmla(DataType dt,DRegister rd,DRegister rn,DRegister rm)7565   void Vmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7566     Vmla(al, dt, rd, rn, rm);
7567   }
7568 
Vmla(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)7569   void Vmla(
7570       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7571     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7572     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7573     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7574     VIXL_ASSERT(allow_macro_instructions_);
7575     VIXL_ASSERT(OutsideITBlock());
7576     MacroEmissionCheckScope guard(this);
7577     ITScope it_scope(this, &cond, guard);
7578     vmla(cond, dt, rd, rn, rm);
7579   }
Vmla(DataType dt,QRegister rd,QRegister rn,QRegister rm)7580   void Vmla(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7581     Vmla(al, dt, rd, rn, rm);
7582   }
7583 
Vmla(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)7584   void Vmla(
7585       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7586     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7587     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7588     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7589     VIXL_ASSERT(allow_macro_instructions_);
7590     VIXL_ASSERT(OutsideITBlock());
7591     MacroEmissionCheckScope guard(this);
7592     ITScope it_scope(this, &cond, guard);
7593     vmla(cond, dt, rd, rn, rm);
7594   }
Vmla(DataType dt,SRegister rd,SRegister rn,SRegister rm)7595   void Vmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7596     Vmla(al, dt, rd, rn, rm);
7597   }
7598 
Vmlal(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegisterLane rm)7599   void Vmlal(Condition cond,
7600              DataType dt,
7601              QRegister rd,
7602              DRegister rn,
7603              DRegisterLane rm) {
7604     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7605     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7606     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7607     VIXL_ASSERT(allow_macro_instructions_);
7608     VIXL_ASSERT(OutsideITBlock());
7609     MacroEmissionCheckScope guard(this);
7610     ITScope it_scope(this, &cond, guard);
7611     vmlal(cond, dt, rd, rn, rm);
7612   }
Vmlal(DataType dt,QRegister rd,DRegister rn,DRegisterLane rm)7613   void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7614     Vmlal(al, dt, rd, rn, rm);
7615   }
7616 
Vmlal(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister rm)7617   void Vmlal(
7618       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7619     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7620     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7621     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7622     VIXL_ASSERT(allow_macro_instructions_);
7623     VIXL_ASSERT(OutsideITBlock());
7624     MacroEmissionCheckScope guard(this);
7625     ITScope it_scope(this, &cond, guard);
7626     vmlal(cond, dt, rd, rn, rm);
7627   }
Vmlal(DataType dt,QRegister rd,DRegister rn,DRegister rm)7628   void Vmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7629     Vmlal(al, dt, rd, rn, rm);
7630   }
7631 
Vmls(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegisterLane rm)7632   void Vmls(Condition cond,
7633             DataType dt,
7634             DRegister rd,
7635             DRegister rn,
7636             DRegisterLane rm) {
7637     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7638     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7639     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7640     VIXL_ASSERT(allow_macro_instructions_);
7641     VIXL_ASSERT(OutsideITBlock());
7642     MacroEmissionCheckScope guard(this);
7643     ITScope it_scope(this, &cond, guard);
7644     vmls(cond, dt, rd, rn, rm);
7645   }
Vmls(DataType dt,DRegister rd,DRegister rn,DRegisterLane rm)7646   void Vmls(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
7647     Vmls(al, dt, rd, rn, rm);
7648   }
7649 
Vmls(Condition cond,DataType dt,QRegister rd,QRegister rn,DRegisterLane rm)7650   void Vmls(Condition cond,
7651             DataType dt,
7652             QRegister rd,
7653             QRegister rn,
7654             DRegisterLane rm) {
7655     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7656     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7657     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7658     VIXL_ASSERT(allow_macro_instructions_);
7659     VIXL_ASSERT(OutsideITBlock());
7660     MacroEmissionCheckScope guard(this);
7661     ITScope it_scope(this, &cond, guard);
7662     vmls(cond, dt, rd, rn, rm);
7663   }
Vmls(DataType dt,QRegister rd,QRegister rn,DRegisterLane rm)7664   void Vmls(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
7665     Vmls(al, dt, rd, rn, rm);
7666   }
7667 
Vmls(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)7668   void Vmls(
7669       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7670     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7671     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7672     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7673     VIXL_ASSERT(allow_macro_instructions_);
7674     VIXL_ASSERT(OutsideITBlock());
7675     MacroEmissionCheckScope guard(this);
7676     ITScope it_scope(this, &cond, guard);
7677     vmls(cond, dt, rd, rn, rm);
7678   }
Vmls(DataType dt,DRegister rd,DRegister rn,DRegister rm)7679   void Vmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7680     Vmls(al, dt, rd, rn, rm);
7681   }
7682 
Vmls(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)7683   void Vmls(
7684       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7685     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7686     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7687     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7688     VIXL_ASSERT(allow_macro_instructions_);
7689     VIXL_ASSERT(OutsideITBlock());
7690     MacroEmissionCheckScope guard(this);
7691     ITScope it_scope(this, &cond, guard);
7692     vmls(cond, dt, rd, rn, rm);
7693   }
Vmls(DataType dt,QRegister rd,QRegister rn,QRegister rm)7694   void Vmls(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
7695     Vmls(al, dt, rd, rn, rm);
7696   }
7697 
Vmls(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)7698   void Vmls(
7699       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7700     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7701     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7702     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7703     VIXL_ASSERT(allow_macro_instructions_);
7704     VIXL_ASSERT(OutsideITBlock());
7705     MacroEmissionCheckScope guard(this);
7706     ITScope it_scope(this, &cond, guard);
7707     vmls(cond, dt, rd, rn, rm);
7708   }
Vmls(DataType dt,SRegister rd,SRegister rn,SRegister rm)7709   void Vmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
7710     Vmls(al, dt, rd, rn, rm);
7711   }
7712 
Vmlsl(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegisterLane rm)7713   void Vmlsl(Condition cond,
7714              DataType dt,
7715              QRegister rd,
7716              DRegister rn,
7717              DRegisterLane rm) {
7718     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7719     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7720     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7721     VIXL_ASSERT(allow_macro_instructions_);
7722     VIXL_ASSERT(OutsideITBlock());
7723     MacroEmissionCheckScope guard(this);
7724     ITScope it_scope(this, &cond, guard);
7725     vmlsl(cond, dt, rd, rn, rm);
7726   }
Vmlsl(DataType dt,QRegister rd,DRegister rn,DRegisterLane rm)7727   void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
7728     Vmlsl(al, dt, rd, rn, rm);
7729   }
7730 
Vmlsl(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister rm)7731   void Vmlsl(
7732       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7733     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7734     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7735     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7736     VIXL_ASSERT(allow_macro_instructions_);
7737     VIXL_ASSERT(OutsideITBlock());
7738     MacroEmissionCheckScope guard(this);
7739     ITScope it_scope(this, &cond, guard);
7740     vmlsl(cond, dt, rd, rn, rm);
7741   }
Vmlsl(DataType dt,QRegister rd,DRegister rn,DRegister rm)7742   void Vmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
7743     Vmlsl(al, dt, rd, rn, rm);
7744   }
7745 
Vmov(Condition cond,Register rt,SRegister rn)7746   void Vmov(Condition cond, Register rt, SRegister rn) {
7747     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7748     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7749     VIXL_ASSERT(allow_macro_instructions_);
7750     VIXL_ASSERT(OutsideITBlock());
7751     MacroEmissionCheckScope guard(this);
7752     ITScope it_scope(this, &cond, guard);
7753     vmov(cond, rt, rn);
7754   }
Vmov(Register rt,SRegister rn)7755   void Vmov(Register rt, SRegister rn) { Vmov(al, rt, rn); }
7756 
Vmov(Condition cond,SRegister rn,Register rt)7757   void Vmov(Condition cond, SRegister rn, Register rt) {
7758     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7759     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7760     VIXL_ASSERT(allow_macro_instructions_);
7761     VIXL_ASSERT(OutsideITBlock());
7762     MacroEmissionCheckScope guard(this);
7763     ITScope it_scope(this, &cond, guard);
7764     vmov(cond, rn, rt);
7765   }
Vmov(SRegister rn,Register rt)7766   void Vmov(SRegister rn, Register rt) { Vmov(al, rn, rt); }
7767 
Vmov(Condition cond,Register rt,Register rt2,DRegister rm)7768   void Vmov(Condition cond, Register rt, Register rt2, DRegister rm) {
7769     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7770     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7771     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7772     VIXL_ASSERT(allow_macro_instructions_);
7773     VIXL_ASSERT(OutsideITBlock());
7774     MacroEmissionCheckScope guard(this);
7775     ITScope it_scope(this, &cond, guard);
7776     vmov(cond, rt, rt2, rm);
7777   }
Vmov(Register rt,Register rt2,DRegister rm)7778   void Vmov(Register rt, Register rt2, DRegister rm) { Vmov(al, rt, rt2, rm); }
7779 
Vmov(Condition cond,DRegister rm,Register rt,Register rt2)7780   void Vmov(Condition cond, DRegister rm, Register rt, Register rt2) {
7781     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7782     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7783     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7784     VIXL_ASSERT(allow_macro_instructions_);
7785     VIXL_ASSERT(OutsideITBlock());
7786     MacroEmissionCheckScope guard(this);
7787     ITScope it_scope(this, &cond, guard);
7788     vmov(cond, rm, rt, rt2);
7789   }
Vmov(DRegister rm,Register rt,Register rt2)7790   void Vmov(DRegister rm, Register rt, Register rt2) { Vmov(al, rm, rt, rt2); }
7791 
Vmov(Condition cond,Register rt,Register rt2,SRegister rm,SRegister rm1)7792   void Vmov(
7793       Condition cond, Register rt, Register rt2, SRegister rm, SRegister rm1) {
7794     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7795     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7796     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7797     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7798     VIXL_ASSERT(allow_macro_instructions_);
7799     VIXL_ASSERT(OutsideITBlock());
7800     MacroEmissionCheckScope guard(this);
7801     ITScope it_scope(this, &cond, guard);
7802     vmov(cond, rt, rt2, rm, rm1);
7803   }
Vmov(Register rt,Register rt2,SRegister rm,SRegister rm1)7804   void Vmov(Register rt, Register rt2, SRegister rm, SRegister rm1) {
7805     Vmov(al, rt, rt2, rm, rm1);
7806   }
7807 
Vmov(Condition cond,SRegister rm,SRegister rm1,Register rt,Register rt2)7808   void Vmov(
7809       Condition cond, SRegister rm, SRegister rm1, Register rt, Register rt2) {
7810     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7811     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm1));
7812     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7813     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt2));
7814     VIXL_ASSERT(allow_macro_instructions_);
7815     VIXL_ASSERT(OutsideITBlock());
7816     MacroEmissionCheckScope guard(this);
7817     ITScope it_scope(this, &cond, guard);
7818     vmov(cond, rm, rm1, rt, rt2);
7819   }
Vmov(SRegister rm,SRegister rm1,Register rt,Register rt2)7820   void Vmov(SRegister rm, SRegister rm1, Register rt, Register rt2) {
7821     Vmov(al, rm, rm1, rt, rt2);
7822   }
7823 
Vmov(Condition cond,DataType dt,DRegisterLane rd,Register rt)7824   void Vmov(Condition cond, DataType dt, DRegisterLane rd, Register rt) {
7825     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7826     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7827     VIXL_ASSERT(allow_macro_instructions_);
7828     VIXL_ASSERT(OutsideITBlock());
7829     MacroEmissionCheckScope guard(this);
7830     ITScope it_scope(this, &cond, guard);
7831     vmov(cond, dt, rd, rt);
7832   }
Vmov(DataType dt,DRegisterLane rd,Register rt)7833   void Vmov(DataType dt, DRegisterLane rd, Register rt) {
7834     Vmov(al, dt, rd, rt);
7835   }
Vmov(Condition cond,DRegisterLane rd,Register rt)7836   void Vmov(Condition cond, DRegisterLane rd, Register rt) {
7837     Vmov(cond, kDataTypeValueNone, rd, rt);
7838   }
Vmov(DRegisterLane rd,Register rt)7839   void Vmov(DRegisterLane rd, Register rt) {
7840     Vmov(al, kDataTypeValueNone, rd, rt);
7841   }
7842 
Vmov(Condition cond,DataType dt,DRegister rd,const DOperand & operand)7843   void Vmov(Condition cond,
7844             DataType dt,
7845             DRegister rd,
7846             const DOperand& operand) {
7847     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7848     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7849     VIXL_ASSERT(allow_macro_instructions_);
7850     VIXL_ASSERT(OutsideITBlock());
7851     MacroEmissionCheckScope guard(this);
7852     ITScope it_scope(this, &cond, guard);
7853     vmov(cond, dt, rd, operand);
7854   }
Vmov(DataType dt,DRegister rd,const DOperand & operand)7855   void Vmov(DataType dt, DRegister rd, const DOperand& operand) {
7856     Vmov(al, dt, rd, operand);
7857   }
7858 
Vmov(Condition cond,DataType dt,QRegister rd,const QOperand & operand)7859   void Vmov(Condition cond,
7860             DataType dt,
7861             QRegister rd,
7862             const QOperand& operand) {
7863     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7864     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7865     VIXL_ASSERT(allow_macro_instructions_);
7866     VIXL_ASSERT(OutsideITBlock());
7867     MacroEmissionCheckScope guard(this);
7868     ITScope it_scope(this, &cond, guard);
7869     vmov(cond, dt, rd, operand);
7870   }
Vmov(DataType dt,QRegister rd,const QOperand & operand)7871   void Vmov(DataType dt, QRegister rd, const QOperand& operand) {
7872     Vmov(al, dt, rd, operand);
7873   }
7874 
Vmov(Condition cond,DataType dt,SRegister rd,const SOperand & operand)7875   void Vmov(Condition cond,
7876             DataType dt,
7877             SRegister rd,
7878             const SOperand& operand) {
7879     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7880     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
7881     VIXL_ASSERT(allow_macro_instructions_);
7882     VIXL_ASSERT(OutsideITBlock());
7883     MacroEmissionCheckScope guard(this);
7884     ITScope it_scope(this, &cond, guard);
7885     vmov(cond, dt, rd, operand);
7886   }
Vmov(DataType dt,SRegister rd,const SOperand & operand)7887   void Vmov(DataType dt, SRegister rd, const SOperand& operand) {
7888     Vmov(al, dt, rd, operand);
7889   }
7890 
Vmov(Condition cond,DataType dt,Register rt,DRegisterLane rn)7891   void Vmov(Condition cond, DataType dt, Register rt, DRegisterLane rn) {
7892     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7893     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7894     VIXL_ASSERT(allow_macro_instructions_);
7895     VIXL_ASSERT(OutsideITBlock());
7896     MacroEmissionCheckScope guard(this);
7897     ITScope it_scope(this, &cond, guard);
7898     vmov(cond, dt, rt, rn);
7899   }
Vmov(DataType dt,Register rt,DRegisterLane rn)7900   void Vmov(DataType dt, Register rt, DRegisterLane rn) {
7901     Vmov(al, dt, rt, rn);
7902   }
Vmov(Condition cond,Register rt,DRegisterLane rn)7903   void Vmov(Condition cond, Register rt, DRegisterLane rn) {
7904     Vmov(cond, kDataTypeValueNone, rt, rn);
7905   }
Vmov(Register rt,DRegisterLane rn)7906   void Vmov(Register rt, DRegisterLane rn) {
7907     Vmov(al, kDataTypeValueNone, rt, rn);
7908   }
7909 
Vmovl(Condition cond,DataType dt,QRegister rd,DRegister rm)7910   void Vmovl(Condition cond, DataType dt, QRegister rd, DRegister rm) {
7911     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7912     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7913     VIXL_ASSERT(allow_macro_instructions_);
7914     VIXL_ASSERT(OutsideITBlock());
7915     MacroEmissionCheckScope guard(this);
7916     ITScope it_scope(this, &cond, guard);
7917     vmovl(cond, dt, rd, rm);
7918   }
Vmovl(DataType dt,QRegister rd,DRegister rm)7919   void Vmovl(DataType dt, QRegister rd, DRegister rm) { Vmovl(al, dt, rd, rm); }
7920 
Vmovn(Condition cond,DataType dt,DRegister rd,QRegister rm)7921   void Vmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
7922     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7923     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
7924     VIXL_ASSERT(allow_macro_instructions_);
7925     VIXL_ASSERT(OutsideITBlock());
7926     MacroEmissionCheckScope guard(this);
7927     ITScope it_scope(this, &cond, guard);
7928     vmovn(cond, dt, rd, rm);
7929   }
Vmovn(DataType dt,DRegister rd,QRegister rm)7930   void Vmovn(DataType dt, DRegister rd, QRegister rm) { Vmovn(al, dt, rd, rm); }
7931 
Vmrs(Condition cond,RegisterOrAPSR_nzcv rt,SpecialFPRegister spec_reg)7932   void Vmrs(Condition cond,
7933             RegisterOrAPSR_nzcv rt,
7934             SpecialFPRegister spec_reg) {
7935     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7936     VIXL_ASSERT(allow_macro_instructions_);
7937     VIXL_ASSERT(OutsideITBlock());
7938     MacroEmissionCheckScope guard(this);
7939     ITScope it_scope(this, &cond, guard);
7940     vmrs(cond, rt, spec_reg);
7941   }
Vmrs(RegisterOrAPSR_nzcv rt,SpecialFPRegister spec_reg)7942   void Vmrs(RegisterOrAPSR_nzcv rt, SpecialFPRegister spec_reg) {
7943     Vmrs(al, rt, spec_reg);
7944   }
7945 
Vmsr(Condition cond,SpecialFPRegister spec_reg,Register rt)7946   void Vmsr(Condition cond, SpecialFPRegister spec_reg, Register rt) {
7947     VIXL_ASSERT(!AliasesAvailableScratchRegister(rt));
7948     VIXL_ASSERT(allow_macro_instructions_);
7949     VIXL_ASSERT(OutsideITBlock());
7950     MacroEmissionCheckScope guard(this);
7951     ITScope it_scope(this, &cond, guard);
7952     vmsr(cond, spec_reg, rt);
7953   }
Vmsr(SpecialFPRegister spec_reg,Register rt)7954   void Vmsr(SpecialFPRegister spec_reg, Register rt) { Vmsr(al, spec_reg, rt); }
7955 
Vmul(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister dm,unsigned index)7956   void Vmul(Condition cond,
7957             DataType dt,
7958             DRegister rd,
7959             DRegister rn,
7960             DRegister dm,
7961             unsigned index) {
7962     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7963     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7964     VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
7965     VIXL_ASSERT(allow_macro_instructions_);
7966     VIXL_ASSERT(OutsideITBlock());
7967     MacroEmissionCheckScope guard(this);
7968     ITScope it_scope(this, &cond, guard);
7969     vmul(cond, dt, rd, rn, dm, index);
7970   }
Vmul(DataType dt,DRegister rd,DRegister rn,DRegister dm,unsigned index)7971   void Vmul(
7972       DataType dt, DRegister rd, DRegister rn, DRegister dm, unsigned index) {
7973     Vmul(al, dt, rd, rn, dm, index);
7974   }
7975 
Vmul(Condition cond,DataType dt,QRegister rd,QRegister rn,DRegister dm,unsigned index)7976   void Vmul(Condition cond,
7977             DataType dt,
7978             QRegister rd,
7979             QRegister rn,
7980             DRegister dm,
7981             unsigned index) {
7982     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7983     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
7984     VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
7985     VIXL_ASSERT(allow_macro_instructions_);
7986     VIXL_ASSERT(OutsideITBlock());
7987     MacroEmissionCheckScope guard(this);
7988     ITScope it_scope(this, &cond, guard);
7989     vmul(cond, dt, rd, rn, dm, index);
7990   }
Vmul(DataType dt,QRegister rd,QRegister rn,DRegister dm,unsigned index)7991   void Vmul(
7992       DataType dt, QRegister rd, QRegister rn, DRegister dm, unsigned index) {
7993     Vmul(al, dt, rd, rn, dm, index);
7994   }
7995 
Vmul(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)7996   void Vmul(
7997       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
7998     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
7999     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8000     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8001     VIXL_ASSERT(allow_macro_instructions_);
8002     VIXL_ASSERT(OutsideITBlock());
8003     MacroEmissionCheckScope guard(this);
8004     ITScope it_scope(this, &cond, guard);
8005     vmul(cond, dt, rd, rn, rm);
8006   }
Vmul(DataType dt,DRegister rd,DRegister rn,DRegister rm)8007   void Vmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8008     Vmul(al, dt, rd, rn, rm);
8009   }
8010 
Vmul(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)8011   void Vmul(
8012       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8013     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8014     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8015     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8016     VIXL_ASSERT(allow_macro_instructions_);
8017     VIXL_ASSERT(OutsideITBlock());
8018     MacroEmissionCheckScope guard(this);
8019     ITScope it_scope(this, &cond, guard);
8020     vmul(cond, dt, rd, rn, rm);
8021   }
Vmul(DataType dt,QRegister rd,QRegister rn,QRegister rm)8022   void Vmul(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8023     Vmul(al, dt, rd, rn, rm);
8024   }
8025 
Vmul(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)8026   void Vmul(
8027       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8028     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8029     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8030     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8031     VIXL_ASSERT(allow_macro_instructions_);
8032     VIXL_ASSERT(OutsideITBlock());
8033     MacroEmissionCheckScope guard(this);
8034     ITScope it_scope(this, &cond, guard);
8035     vmul(cond, dt, rd, rn, rm);
8036   }
Vmul(DataType dt,SRegister rd,SRegister rn,SRegister rm)8037   void Vmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8038     Vmul(al, dt, rd, rn, rm);
8039   }
8040 
Vmull(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister dm,unsigned index)8041   void Vmull(Condition cond,
8042              DataType dt,
8043              QRegister rd,
8044              DRegister rn,
8045              DRegister dm,
8046              unsigned index) {
8047     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8048     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8049     VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8050     VIXL_ASSERT(allow_macro_instructions_);
8051     VIXL_ASSERT(OutsideITBlock());
8052     MacroEmissionCheckScope guard(this);
8053     ITScope it_scope(this, &cond, guard);
8054     vmull(cond, dt, rd, rn, dm, index);
8055   }
Vmull(DataType dt,QRegister rd,DRegister rn,DRegister dm,unsigned index)8056   void Vmull(
8057       DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8058     Vmull(al, dt, rd, rn, dm, index);
8059   }
8060 
Vmull(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister rm)8061   void Vmull(
8062       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8063     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8064     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8065     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8066     VIXL_ASSERT(allow_macro_instructions_);
8067     VIXL_ASSERT(OutsideITBlock());
8068     MacroEmissionCheckScope guard(this);
8069     ITScope it_scope(this, &cond, guard);
8070     vmull(cond, dt, rd, rn, rm);
8071   }
Vmull(DataType dt,QRegister rd,DRegister rn,DRegister rm)8072   void Vmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8073     Vmull(al, dt, rd, rn, rm);
8074   }
8075 
Vmvn(Condition cond,DataType dt,DRegister rd,const DOperand & operand)8076   void Vmvn(Condition cond,
8077             DataType dt,
8078             DRegister rd,
8079             const DOperand& operand) {
8080     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8081     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8082     VIXL_ASSERT(allow_macro_instructions_);
8083     VIXL_ASSERT(OutsideITBlock());
8084     MacroEmissionCheckScope guard(this);
8085     ITScope it_scope(this, &cond, guard);
8086     vmvn(cond, dt, rd, operand);
8087   }
Vmvn(DataType dt,DRegister rd,const DOperand & operand)8088   void Vmvn(DataType dt, DRegister rd, const DOperand& operand) {
8089     Vmvn(al, dt, rd, operand);
8090   }
8091 
Vmvn(Condition cond,DataType dt,QRegister rd,const QOperand & operand)8092   void Vmvn(Condition cond,
8093             DataType dt,
8094             QRegister rd,
8095             const QOperand& operand) {
8096     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8097     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8098     VIXL_ASSERT(allow_macro_instructions_);
8099     VIXL_ASSERT(OutsideITBlock());
8100     MacroEmissionCheckScope guard(this);
8101     ITScope it_scope(this, &cond, guard);
8102     vmvn(cond, dt, rd, operand);
8103   }
Vmvn(DataType dt,QRegister rd,const QOperand & operand)8104   void Vmvn(DataType dt, QRegister rd, const QOperand& operand) {
8105     Vmvn(al, dt, rd, operand);
8106   }
8107 
Vneg(Condition cond,DataType dt,DRegister rd,DRegister rm)8108   void Vneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8109     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8110     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8111     VIXL_ASSERT(allow_macro_instructions_);
8112     VIXL_ASSERT(OutsideITBlock());
8113     MacroEmissionCheckScope guard(this);
8114     ITScope it_scope(this, &cond, guard);
8115     vneg(cond, dt, rd, rm);
8116   }
Vneg(DataType dt,DRegister rd,DRegister rm)8117   void Vneg(DataType dt, DRegister rd, DRegister rm) { Vneg(al, dt, rd, rm); }
8118 
Vneg(Condition cond,DataType dt,QRegister rd,QRegister rm)8119   void Vneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8120     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8121     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8122     VIXL_ASSERT(allow_macro_instructions_);
8123     VIXL_ASSERT(OutsideITBlock());
8124     MacroEmissionCheckScope guard(this);
8125     ITScope it_scope(this, &cond, guard);
8126     vneg(cond, dt, rd, rm);
8127   }
Vneg(DataType dt,QRegister rd,QRegister rm)8128   void Vneg(DataType dt, QRegister rd, QRegister rm) { Vneg(al, dt, rd, rm); }
8129 
Vneg(Condition cond,DataType dt,SRegister rd,SRegister rm)8130   void Vneg(Condition cond, DataType dt, SRegister rd, SRegister rm) {
8131     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8132     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8133     VIXL_ASSERT(allow_macro_instructions_);
8134     VIXL_ASSERT(OutsideITBlock());
8135     MacroEmissionCheckScope guard(this);
8136     ITScope it_scope(this, &cond, guard);
8137     vneg(cond, dt, rd, rm);
8138   }
Vneg(DataType dt,SRegister rd,SRegister rm)8139   void Vneg(DataType dt, SRegister rd, SRegister rm) { Vneg(al, dt, rd, rm); }
8140 
Vnmla(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)8141   void Vnmla(
8142       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8143     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8144     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8145     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8146     VIXL_ASSERT(allow_macro_instructions_);
8147     VIXL_ASSERT(OutsideITBlock());
8148     MacroEmissionCheckScope guard(this);
8149     ITScope it_scope(this, &cond, guard);
8150     vnmla(cond, dt, rd, rn, rm);
8151   }
Vnmla(DataType dt,SRegister rd,SRegister rn,SRegister rm)8152   void Vnmla(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8153     Vnmla(al, dt, rd, rn, rm);
8154   }
8155 
Vnmla(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)8156   void Vnmla(
8157       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8158     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8159     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8160     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8161     VIXL_ASSERT(allow_macro_instructions_);
8162     VIXL_ASSERT(OutsideITBlock());
8163     MacroEmissionCheckScope guard(this);
8164     ITScope it_scope(this, &cond, guard);
8165     vnmla(cond, dt, rd, rn, rm);
8166   }
Vnmla(DataType dt,DRegister rd,DRegister rn,DRegister rm)8167   void Vnmla(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8168     Vnmla(al, dt, rd, rn, rm);
8169   }
8170 
Vnmls(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)8171   void Vnmls(
8172       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8173     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8174     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8175     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8176     VIXL_ASSERT(allow_macro_instructions_);
8177     VIXL_ASSERT(OutsideITBlock());
8178     MacroEmissionCheckScope guard(this);
8179     ITScope it_scope(this, &cond, guard);
8180     vnmls(cond, dt, rd, rn, rm);
8181   }
Vnmls(DataType dt,SRegister rd,SRegister rn,SRegister rm)8182   void Vnmls(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8183     Vnmls(al, dt, rd, rn, rm);
8184   }
8185 
Vnmls(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)8186   void Vnmls(
8187       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8188     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8189     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8190     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8191     VIXL_ASSERT(allow_macro_instructions_);
8192     VIXL_ASSERT(OutsideITBlock());
8193     MacroEmissionCheckScope guard(this);
8194     ITScope it_scope(this, &cond, guard);
8195     vnmls(cond, dt, rd, rn, rm);
8196   }
Vnmls(DataType dt,DRegister rd,DRegister rn,DRegister rm)8197   void Vnmls(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8198     Vnmls(al, dt, rd, rn, rm);
8199   }
8200 
Vnmul(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)8201   void Vnmul(
8202       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8203     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8204     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8205     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8206     VIXL_ASSERT(allow_macro_instructions_);
8207     VIXL_ASSERT(OutsideITBlock());
8208     MacroEmissionCheckScope guard(this);
8209     ITScope it_scope(this, &cond, guard);
8210     vnmul(cond, dt, rd, rn, rm);
8211   }
Vnmul(DataType dt,SRegister rd,SRegister rn,SRegister rm)8212   void Vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
8213     Vnmul(al, dt, rd, rn, rm);
8214   }
8215 
Vnmul(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)8216   void Vnmul(
8217       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8218     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8219     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8220     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8221     VIXL_ASSERT(allow_macro_instructions_);
8222     VIXL_ASSERT(OutsideITBlock());
8223     MacroEmissionCheckScope guard(this);
8224     ITScope it_scope(this, &cond, guard);
8225     vnmul(cond, dt, rd, rn, rm);
8226   }
Vnmul(DataType dt,DRegister rd,DRegister rn,DRegister rm)8227   void Vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8228     Vnmul(al, dt, rd, rn, rm);
8229   }
8230 
Vorn(Condition cond,DataType dt,DRegister rd,DRegister rn,const DOperand & operand)8231   void Vorn(Condition cond,
8232             DataType dt,
8233             DRegister rd,
8234             DRegister rn,
8235             const DOperand& operand) {
8236     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8237     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8238     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8239     VIXL_ASSERT(allow_macro_instructions_);
8240     VIXL_ASSERT(OutsideITBlock());
8241     MacroEmissionCheckScope guard(this);
8242     ITScope it_scope(this, &cond, guard);
8243     vorn(cond, dt, rd, rn, operand);
8244   }
Vorn(DataType dt,DRegister rd,DRegister rn,const DOperand & operand)8245   void Vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8246     Vorn(al, dt, rd, rn, operand);
8247   }
8248 
Vorn(Condition cond,DataType dt,QRegister rd,QRegister rn,const QOperand & operand)8249   void Vorn(Condition cond,
8250             DataType dt,
8251             QRegister rd,
8252             QRegister rn,
8253             const QOperand& operand) {
8254     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8255     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8256     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8257     VIXL_ASSERT(allow_macro_instructions_);
8258     VIXL_ASSERT(OutsideITBlock());
8259     MacroEmissionCheckScope guard(this);
8260     ITScope it_scope(this, &cond, guard);
8261     vorn(cond, dt, rd, rn, operand);
8262   }
Vorn(DataType dt,QRegister rd,QRegister rn,const QOperand & operand)8263   void Vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8264     Vorn(al, dt, rd, rn, operand);
8265   }
8266 
Vorr(Condition cond,DataType dt,DRegister rd,DRegister rn,const DOperand & operand)8267   void Vorr(Condition cond,
8268             DataType dt,
8269             DRegister rd,
8270             DRegister rn,
8271             const DOperand& operand) {
8272     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8273     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8274     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8275     VIXL_ASSERT(allow_macro_instructions_);
8276     VIXL_ASSERT(OutsideITBlock());
8277     MacroEmissionCheckScope guard(this);
8278     ITScope it_scope(this, &cond, guard);
8279     vorr(cond, dt, rd, rn, operand);
8280   }
Vorr(DataType dt,DRegister rd,DRegister rn,const DOperand & operand)8281   void Vorr(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) {
8282     Vorr(al, dt, rd, rn, operand);
8283   }
Vorr(Condition cond,DRegister rd,DRegister rn,const DOperand & operand)8284   void Vorr(Condition cond,
8285             DRegister rd,
8286             DRegister rn,
8287             const DOperand& operand) {
8288     Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8289   }
Vorr(DRegister rd,DRegister rn,const DOperand & operand)8290   void Vorr(DRegister rd, DRegister rn, const DOperand& operand) {
8291     Vorr(al, kDataTypeValueNone, rd, rn, operand);
8292   }
8293 
Vorr(Condition cond,DataType dt,QRegister rd,QRegister rn,const QOperand & operand)8294   void Vorr(Condition cond,
8295             DataType dt,
8296             QRegister rd,
8297             QRegister rn,
8298             const QOperand& operand) {
8299     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8300     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8301     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8302     VIXL_ASSERT(allow_macro_instructions_);
8303     VIXL_ASSERT(OutsideITBlock());
8304     MacroEmissionCheckScope guard(this);
8305     ITScope it_scope(this, &cond, guard);
8306     vorr(cond, dt, rd, rn, operand);
8307   }
Vorr(DataType dt,QRegister rd,QRegister rn,const QOperand & operand)8308   void Vorr(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) {
8309     Vorr(al, dt, rd, rn, operand);
8310   }
Vorr(Condition cond,QRegister rd,QRegister rn,const QOperand & operand)8311   void Vorr(Condition cond,
8312             QRegister rd,
8313             QRegister rn,
8314             const QOperand& operand) {
8315     Vorr(cond, kDataTypeValueNone, rd, rn, operand);
8316   }
Vorr(QRegister rd,QRegister rn,const QOperand & operand)8317   void Vorr(QRegister rd, QRegister rn, const QOperand& operand) {
8318     Vorr(al, kDataTypeValueNone, rd, rn, operand);
8319   }
8320 
Vpadal(Condition cond,DataType dt,DRegister rd,DRegister rm)8321   void Vpadal(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8322     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8323     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8324     VIXL_ASSERT(allow_macro_instructions_);
8325     VIXL_ASSERT(OutsideITBlock());
8326     MacroEmissionCheckScope guard(this);
8327     ITScope it_scope(this, &cond, guard);
8328     vpadal(cond, dt, rd, rm);
8329   }
Vpadal(DataType dt,DRegister rd,DRegister rm)8330   void Vpadal(DataType dt, DRegister rd, DRegister rm) {
8331     Vpadal(al, dt, rd, rm);
8332   }
8333 
Vpadal(Condition cond,DataType dt,QRegister rd,QRegister rm)8334   void Vpadal(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8335     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8336     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8337     VIXL_ASSERT(allow_macro_instructions_);
8338     VIXL_ASSERT(OutsideITBlock());
8339     MacroEmissionCheckScope guard(this);
8340     ITScope it_scope(this, &cond, guard);
8341     vpadal(cond, dt, rd, rm);
8342   }
Vpadal(DataType dt,QRegister rd,QRegister rm)8343   void Vpadal(DataType dt, QRegister rd, QRegister rm) {
8344     Vpadal(al, dt, rd, rm);
8345   }
8346 
Vpadd(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)8347   void Vpadd(
8348       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8349     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8350     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8351     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8352     VIXL_ASSERT(allow_macro_instructions_);
8353     VIXL_ASSERT(OutsideITBlock());
8354     MacroEmissionCheckScope guard(this);
8355     ITScope it_scope(this, &cond, guard);
8356     vpadd(cond, dt, rd, rn, rm);
8357   }
Vpadd(DataType dt,DRegister rd,DRegister rn,DRegister rm)8358   void Vpadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8359     Vpadd(al, dt, rd, rn, rm);
8360   }
8361 
Vpaddl(Condition cond,DataType dt,DRegister rd,DRegister rm)8362   void Vpaddl(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8363     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8364     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8365     VIXL_ASSERT(allow_macro_instructions_);
8366     VIXL_ASSERT(OutsideITBlock());
8367     MacroEmissionCheckScope guard(this);
8368     ITScope it_scope(this, &cond, guard);
8369     vpaddl(cond, dt, rd, rm);
8370   }
Vpaddl(DataType dt,DRegister rd,DRegister rm)8371   void Vpaddl(DataType dt, DRegister rd, DRegister rm) {
8372     Vpaddl(al, dt, rd, rm);
8373   }
8374 
Vpaddl(Condition cond,DataType dt,QRegister rd,QRegister rm)8375   void Vpaddl(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8376     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8377     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8378     VIXL_ASSERT(allow_macro_instructions_);
8379     VIXL_ASSERT(OutsideITBlock());
8380     MacroEmissionCheckScope guard(this);
8381     ITScope it_scope(this, &cond, guard);
8382     vpaddl(cond, dt, rd, rm);
8383   }
Vpaddl(DataType dt,QRegister rd,QRegister rm)8384   void Vpaddl(DataType dt, QRegister rd, QRegister rm) {
8385     Vpaddl(al, dt, rd, rm);
8386   }
8387 
Vpmax(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)8388   void Vpmax(
8389       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8390     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8391     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8392     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8393     VIXL_ASSERT(allow_macro_instructions_);
8394     VIXL_ASSERT(OutsideITBlock());
8395     MacroEmissionCheckScope guard(this);
8396     ITScope it_scope(this, &cond, guard);
8397     vpmax(cond, dt, rd, rn, rm);
8398   }
Vpmax(DataType dt,DRegister rd,DRegister rn,DRegister rm)8399   void Vpmax(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8400     Vpmax(al, dt, rd, rn, rm);
8401   }
8402 
Vpmin(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)8403   void Vpmin(
8404       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8405     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8406     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8407     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8408     VIXL_ASSERT(allow_macro_instructions_);
8409     VIXL_ASSERT(OutsideITBlock());
8410     MacroEmissionCheckScope guard(this);
8411     ITScope it_scope(this, &cond, guard);
8412     vpmin(cond, dt, rd, rn, rm);
8413   }
Vpmin(DataType dt,DRegister rd,DRegister rn,DRegister rm)8414   void Vpmin(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8415     Vpmin(al, dt, rd, rn, rm);
8416   }
8417 
Vpop(Condition cond,DataType dt,DRegisterList dreglist)8418   void Vpop(Condition cond, DataType dt, DRegisterList dreglist) {
8419     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8420     VIXL_ASSERT(allow_macro_instructions_);
8421     VIXL_ASSERT(OutsideITBlock());
8422     MacroEmissionCheckScope guard(this);
8423     ITScope it_scope(this, &cond, guard);
8424     vpop(cond, dt, dreglist);
8425   }
Vpop(DataType dt,DRegisterList dreglist)8426   void Vpop(DataType dt, DRegisterList dreglist) { Vpop(al, dt, dreglist); }
Vpop(Condition cond,DRegisterList dreglist)8427   void Vpop(Condition cond, DRegisterList dreglist) {
8428     Vpop(cond, kDataTypeValueNone, dreglist);
8429   }
Vpop(DRegisterList dreglist)8430   void Vpop(DRegisterList dreglist) { Vpop(al, kDataTypeValueNone, dreglist); }
8431 
Vpop(Condition cond,DataType dt,SRegisterList sreglist)8432   void Vpop(Condition cond, DataType dt, SRegisterList sreglist) {
8433     VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8434     VIXL_ASSERT(allow_macro_instructions_);
8435     VIXL_ASSERT(OutsideITBlock());
8436     MacroEmissionCheckScope guard(this);
8437     ITScope it_scope(this, &cond, guard);
8438     vpop(cond, dt, sreglist);
8439   }
Vpop(DataType dt,SRegisterList sreglist)8440   void Vpop(DataType dt, SRegisterList sreglist) { Vpop(al, dt, sreglist); }
Vpop(Condition cond,SRegisterList sreglist)8441   void Vpop(Condition cond, SRegisterList sreglist) {
8442     Vpop(cond, kDataTypeValueNone, sreglist);
8443   }
Vpop(SRegisterList sreglist)8444   void Vpop(SRegisterList sreglist) { Vpop(al, kDataTypeValueNone, sreglist); }
8445 
Vpush(Condition cond,DataType dt,DRegisterList dreglist)8446   void Vpush(Condition cond, DataType dt, DRegisterList dreglist) {
8447     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
8448     VIXL_ASSERT(allow_macro_instructions_);
8449     VIXL_ASSERT(OutsideITBlock());
8450     MacroEmissionCheckScope guard(this);
8451     ITScope it_scope(this, &cond, guard);
8452     vpush(cond, dt, dreglist);
8453   }
Vpush(DataType dt,DRegisterList dreglist)8454   void Vpush(DataType dt, DRegisterList dreglist) { Vpush(al, dt, dreglist); }
Vpush(Condition cond,DRegisterList dreglist)8455   void Vpush(Condition cond, DRegisterList dreglist) {
8456     Vpush(cond, kDataTypeValueNone, dreglist);
8457   }
Vpush(DRegisterList dreglist)8458   void Vpush(DRegisterList dreglist) {
8459     Vpush(al, kDataTypeValueNone, dreglist);
8460   }
8461 
Vpush(Condition cond,DataType dt,SRegisterList sreglist)8462   void Vpush(Condition cond, DataType dt, SRegisterList sreglist) {
8463     VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
8464     VIXL_ASSERT(allow_macro_instructions_);
8465     VIXL_ASSERT(OutsideITBlock());
8466     MacroEmissionCheckScope guard(this);
8467     ITScope it_scope(this, &cond, guard);
8468     vpush(cond, dt, sreglist);
8469   }
Vpush(DataType dt,SRegisterList sreglist)8470   void Vpush(DataType dt, SRegisterList sreglist) { Vpush(al, dt, sreglist); }
Vpush(Condition cond,SRegisterList sreglist)8471   void Vpush(Condition cond, SRegisterList sreglist) {
8472     Vpush(cond, kDataTypeValueNone, sreglist);
8473   }
Vpush(SRegisterList sreglist)8474   void Vpush(SRegisterList sreglist) {
8475     Vpush(al, kDataTypeValueNone, sreglist);
8476   }
8477 
Vqabs(Condition cond,DataType dt,DRegister rd,DRegister rm)8478   void Vqabs(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8479     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8480     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8481     VIXL_ASSERT(allow_macro_instructions_);
8482     VIXL_ASSERT(OutsideITBlock());
8483     MacroEmissionCheckScope guard(this);
8484     ITScope it_scope(this, &cond, guard);
8485     vqabs(cond, dt, rd, rm);
8486   }
Vqabs(DataType dt,DRegister rd,DRegister rm)8487   void Vqabs(DataType dt, DRegister rd, DRegister rm) { Vqabs(al, dt, rd, rm); }
8488 
Vqabs(Condition cond,DataType dt,QRegister rd,QRegister rm)8489   void Vqabs(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8490     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8491     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8492     VIXL_ASSERT(allow_macro_instructions_);
8493     VIXL_ASSERT(OutsideITBlock());
8494     MacroEmissionCheckScope guard(this);
8495     ITScope it_scope(this, &cond, guard);
8496     vqabs(cond, dt, rd, rm);
8497   }
Vqabs(DataType dt,QRegister rd,QRegister rm)8498   void Vqabs(DataType dt, QRegister rd, QRegister rm) { Vqabs(al, dt, rd, rm); }
8499 
Vqadd(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)8500   void Vqadd(
8501       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8502     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8503     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8504     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8505     VIXL_ASSERT(allow_macro_instructions_);
8506     VIXL_ASSERT(OutsideITBlock());
8507     MacroEmissionCheckScope guard(this);
8508     ITScope it_scope(this, &cond, guard);
8509     vqadd(cond, dt, rd, rn, rm);
8510   }
Vqadd(DataType dt,DRegister rd,DRegister rn,DRegister rm)8511   void Vqadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8512     Vqadd(al, dt, rd, rn, rm);
8513   }
8514 
Vqadd(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)8515   void Vqadd(
8516       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8517     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8518     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8519     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8520     VIXL_ASSERT(allow_macro_instructions_);
8521     VIXL_ASSERT(OutsideITBlock());
8522     MacroEmissionCheckScope guard(this);
8523     ITScope it_scope(this, &cond, guard);
8524     vqadd(cond, dt, rd, rn, rm);
8525   }
Vqadd(DataType dt,QRegister rd,QRegister rn,QRegister rm)8526   void Vqadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8527     Vqadd(al, dt, rd, rn, rm);
8528   }
8529 
Vqdmlal(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister rm)8530   void Vqdmlal(
8531       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8532     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8533     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8534     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8535     VIXL_ASSERT(allow_macro_instructions_);
8536     VIXL_ASSERT(OutsideITBlock());
8537     MacroEmissionCheckScope guard(this);
8538     ITScope it_scope(this, &cond, guard);
8539     vqdmlal(cond, dt, rd, rn, rm);
8540   }
Vqdmlal(DataType dt,QRegister rd,DRegister rn,DRegister rm)8541   void Vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8542     Vqdmlal(al, dt, rd, rn, rm);
8543   }
8544 
Vqdmlal(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister dm,unsigned index)8545   void Vqdmlal(Condition cond,
8546                DataType dt,
8547                QRegister rd,
8548                DRegister rn,
8549                DRegister dm,
8550                unsigned index) {
8551     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8552     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8553     VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8554     VIXL_ASSERT(allow_macro_instructions_);
8555     VIXL_ASSERT(OutsideITBlock());
8556     MacroEmissionCheckScope guard(this);
8557     ITScope it_scope(this, &cond, guard);
8558     vqdmlal(cond, dt, rd, rn, dm, index);
8559   }
Vqdmlal(DataType dt,QRegister rd,DRegister rn,DRegister dm,unsigned index)8560   void Vqdmlal(
8561       DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8562     Vqdmlal(al, dt, rd, rn, dm, index);
8563   }
8564 
Vqdmlsl(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister rm)8565   void Vqdmlsl(
8566       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8567     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8568     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8569     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8570     VIXL_ASSERT(allow_macro_instructions_);
8571     VIXL_ASSERT(OutsideITBlock());
8572     MacroEmissionCheckScope guard(this);
8573     ITScope it_scope(this, &cond, guard);
8574     vqdmlsl(cond, dt, rd, rn, rm);
8575   }
Vqdmlsl(DataType dt,QRegister rd,DRegister rn,DRegister rm)8576   void Vqdmlsl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8577     Vqdmlsl(al, dt, rd, rn, rm);
8578   }
8579 
Vqdmlsl(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister dm,unsigned index)8580   void Vqdmlsl(Condition cond,
8581                DataType dt,
8582                QRegister rd,
8583                DRegister rn,
8584                DRegister dm,
8585                unsigned index) {
8586     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8587     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8588     VIXL_ASSERT(!AliasesAvailableScratchRegister(dm));
8589     VIXL_ASSERT(allow_macro_instructions_);
8590     VIXL_ASSERT(OutsideITBlock());
8591     MacroEmissionCheckScope guard(this);
8592     ITScope it_scope(this, &cond, guard);
8593     vqdmlsl(cond, dt, rd, rn, dm, index);
8594   }
Vqdmlsl(DataType dt,QRegister rd,DRegister rn,DRegister dm,unsigned index)8595   void Vqdmlsl(
8596       DataType dt, QRegister rd, DRegister rn, DRegister dm, unsigned index) {
8597     Vqdmlsl(al, dt, rd, rn, dm, index);
8598   }
8599 
Vqdmulh(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)8600   void Vqdmulh(
8601       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8602     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8603     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8604     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8605     VIXL_ASSERT(allow_macro_instructions_);
8606     VIXL_ASSERT(OutsideITBlock());
8607     MacroEmissionCheckScope guard(this);
8608     ITScope it_scope(this, &cond, guard);
8609     vqdmulh(cond, dt, rd, rn, rm);
8610   }
Vqdmulh(DataType dt,DRegister rd,DRegister rn,DRegister rm)8611   void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8612     Vqdmulh(al, dt, rd, rn, rm);
8613   }
8614 
Vqdmulh(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)8615   void Vqdmulh(
8616       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8617     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8618     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8619     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8620     VIXL_ASSERT(allow_macro_instructions_);
8621     VIXL_ASSERT(OutsideITBlock());
8622     MacroEmissionCheckScope guard(this);
8623     ITScope it_scope(this, &cond, guard);
8624     vqdmulh(cond, dt, rd, rn, rm);
8625   }
Vqdmulh(DataType dt,QRegister rd,QRegister rn,QRegister rm)8626   void Vqdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8627     Vqdmulh(al, dt, rd, rn, rm);
8628   }
8629 
Vqdmulh(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegisterLane rm)8630   void Vqdmulh(Condition cond,
8631                DataType dt,
8632                DRegister rd,
8633                DRegister rn,
8634                DRegisterLane rm) {
8635     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8636     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8637     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8638     VIXL_ASSERT(allow_macro_instructions_);
8639     VIXL_ASSERT(OutsideITBlock());
8640     MacroEmissionCheckScope guard(this);
8641     ITScope it_scope(this, &cond, guard);
8642     vqdmulh(cond, dt, rd, rn, rm);
8643   }
Vqdmulh(DataType dt,DRegister rd,DRegister rn,DRegisterLane rm)8644   void Vqdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8645     Vqdmulh(al, dt, rd, rn, rm);
8646   }
8647 
Vqdmulh(Condition cond,DataType dt,QRegister rd,QRegister rn,DRegisterLane rm)8648   void Vqdmulh(Condition cond,
8649                DataType dt,
8650                QRegister rd,
8651                QRegister rn,
8652                DRegisterLane rm) {
8653     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8654     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8655     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8656     VIXL_ASSERT(allow_macro_instructions_);
8657     VIXL_ASSERT(OutsideITBlock());
8658     MacroEmissionCheckScope guard(this);
8659     ITScope it_scope(this, &cond, guard);
8660     vqdmulh(cond, dt, rd, rn, rm);
8661   }
Vqdmulh(DataType dt,QRegister rd,QRegister rn,DRegisterLane rm)8662   void Vqdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8663     Vqdmulh(al, dt, rd, rn, rm);
8664   }
8665 
Vqdmull(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister rm)8666   void Vqdmull(
8667       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8668     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8669     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8670     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8671     VIXL_ASSERT(allow_macro_instructions_);
8672     VIXL_ASSERT(OutsideITBlock());
8673     MacroEmissionCheckScope guard(this);
8674     ITScope it_scope(this, &cond, guard);
8675     vqdmull(cond, dt, rd, rn, rm);
8676   }
Vqdmull(DataType dt,QRegister rd,DRegister rn,DRegister rm)8677   void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
8678     Vqdmull(al, dt, rd, rn, rm);
8679   }
8680 
Vqdmull(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegisterLane rm)8681   void Vqdmull(Condition cond,
8682                DataType dt,
8683                QRegister rd,
8684                DRegister rn,
8685                DRegisterLane rm) {
8686     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8687     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8688     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8689     VIXL_ASSERT(allow_macro_instructions_);
8690     VIXL_ASSERT(OutsideITBlock());
8691     MacroEmissionCheckScope guard(this);
8692     ITScope it_scope(this, &cond, guard);
8693     vqdmull(cond, dt, rd, rn, rm);
8694   }
Vqdmull(DataType dt,QRegister rd,DRegister rn,DRegisterLane rm)8695   void Vqdmull(DataType dt, QRegister rd, DRegister rn, DRegisterLane rm) {
8696     Vqdmull(al, dt, rd, rn, rm);
8697   }
8698 
Vqmovn(Condition cond,DataType dt,DRegister rd,QRegister rm)8699   void Vqmovn(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8700     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8701     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8702     VIXL_ASSERT(allow_macro_instructions_);
8703     VIXL_ASSERT(OutsideITBlock());
8704     MacroEmissionCheckScope guard(this);
8705     ITScope it_scope(this, &cond, guard);
8706     vqmovn(cond, dt, rd, rm);
8707   }
Vqmovn(DataType dt,DRegister rd,QRegister rm)8708   void Vqmovn(DataType dt, DRegister rd, QRegister rm) {
8709     Vqmovn(al, dt, rd, rm);
8710   }
8711 
Vqmovun(Condition cond,DataType dt,DRegister rd,QRegister rm)8712   void Vqmovun(Condition cond, DataType dt, DRegister rd, QRegister rm) {
8713     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8714     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8715     VIXL_ASSERT(allow_macro_instructions_);
8716     VIXL_ASSERT(OutsideITBlock());
8717     MacroEmissionCheckScope guard(this);
8718     ITScope it_scope(this, &cond, guard);
8719     vqmovun(cond, dt, rd, rm);
8720   }
Vqmovun(DataType dt,DRegister rd,QRegister rm)8721   void Vqmovun(DataType dt, DRegister rd, QRegister rm) {
8722     Vqmovun(al, dt, rd, rm);
8723   }
8724 
Vqneg(Condition cond,DataType dt,DRegister rd,DRegister rm)8725   void Vqneg(Condition cond, DataType dt, DRegister rd, DRegister rm) {
8726     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8727     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8728     VIXL_ASSERT(allow_macro_instructions_);
8729     VIXL_ASSERT(OutsideITBlock());
8730     MacroEmissionCheckScope guard(this);
8731     ITScope it_scope(this, &cond, guard);
8732     vqneg(cond, dt, rd, rm);
8733   }
Vqneg(DataType dt,DRegister rd,DRegister rm)8734   void Vqneg(DataType dt, DRegister rd, DRegister rm) { Vqneg(al, dt, rd, rm); }
8735 
Vqneg(Condition cond,DataType dt,QRegister rd,QRegister rm)8736   void Vqneg(Condition cond, DataType dt, QRegister rd, QRegister rm) {
8737     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8738     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8739     VIXL_ASSERT(allow_macro_instructions_);
8740     VIXL_ASSERT(OutsideITBlock());
8741     MacroEmissionCheckScope guard(this);
8742     ITScope it_scope(this, &cond, guard);
8743     vqneg(cond, dt, rd, rm);
8744   }
Vqneg(DataType dt,QRegister rd,QRegister rm)8745   void Vqneg(DataType dt, QRegister rd, QRegister rm) { Vqneg(al, dt, rd, rm); }
8746 
Vqrdmulh(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)8747   void Vqrdmulh(
8748       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8749     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8750     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8751     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8752     VIXL_ASSERT(allow_macro_instructions_);
8753     VIXL_ASSERT(OutsideITBlock());
8754     MacroEmissionCheckScope guard(this);
8755     ITScope it_scope(this, &cond, guard);
8756     vqrdmulh(cond, dt, rd, rn, rm);
8757   }
Vqrdmulh(DataType dt,DRegister rd,DRegister rn,DRegister rm)8758   void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
8759     Vqrdmulh(al, dt, rd, rn, rm);
8760   }
8761 
Vqrdmulh(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)8762   void Vqrdmulh(
8763       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8764     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8765     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8766     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8767     VIXL_ASSERT(allow_macro_instructions_);
8768     VIXL_ASSERT(OutsideITBlock());
8769     MacroEmissionCheckScope guard(this);
8770     ITScope it_scope(this, &cond, guard);
8771     vqrdmulh(cond, dt, rd, rn, rm);
8772   }
Vqrdmulh(DataType dt,QRegister rd,QRegister rn,QRegister rm)8773   void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
8774     Vqrdmulh(al, dt, rd, rn, rm);
8775   }
8776 
Vqrdmulh(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegisterLane rm)8777   void Vqrdmulh(Condition cond,
8778                 DataType dt,
8779                 DRegister rd,
8780                 DRegister rn,
8781                 DRegisterLane rm) {
8782     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8783     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8784     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8785     VIXL_ASSERT(allow_macro_instructions_);
8786     VIXL_ASSERT(OutsideITBlock());
8787     MacroEmissionCheckScope guard(this);
8788     ITScope it_scope(this, &cond, guard);
8789     vqrdmulh(cond, dt, rd, rn, rm);
8790   }
Vqrdmulh(DataType dt,DRegister rd,DRegister rn,DRegisterLane rm)8791   void Vqrdmulh(DataType dt, DRegister rd, DRegister rn, DRegisterLane rm) {
8792     Vqrdmulh(al, dt, rd, rn, rm);
8793   }
8794 
Vqrdmulh(Condition cond,DataType dt,QRegister rd,QRegister rn,DRegisterLane rm)8795   void Vqrdmulh(Condition cond,
8796                 DataType dt,
8797                 QRegister rd,
8798                 QRegister rn,
8799                 DRegisterLane rm) {
8800     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8801     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8802     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8803     VIXL_ASSERT(allow_macro_instructions_);
8804     VIXL_ASSERT(OutsideITBlock());
8805     MacroEmissionCheckScope guard(this);
8806     ITScope it_scope(this, &cond, guard);
8807     vqrdmulh(cond, dt, rd, rn, rm);
8808   }
Vqrdmulh(DataType dt,QRegister rd,QRegister rn,DRegisterLane rm)8809   void Vqrdmulh(DataType dt, QRegister rd, QRegister rn, DRegisterLane rm) {
8810     Vqrdmulh(al, dt, rd, rn, rm);
8811   }
8812 
Vqrshl(Condition cond,DataType dt,DRegister rd,DRegister rm,DRegister rn)8813   void Vqrshl(
8814       Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8815     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8816     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8817     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8818     VIXL_ASSERT(allow_macro_instructions_);
8819     VIXL_ASSERT(OutsideITBlock());
8820     MacroEmissionCheckScope guard(this);
8821     ITScope it_scope(this, &cond, guard);
8822     vqrshl(cond, dt, rd, rm, rn);
8823   }
Vqrshl(DataType dt,DRegister rd,DRegister rm,DRegister rn)8824   void Vqrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
8825     Vqrshl(al, dt, rd, rm, rn);
8826   }
8827 
Vqrshl(Condition cond,DataType dt,QRegister rd,QRegister rm,QRegister rn)8828   void Vqrshl(
8829       Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8830     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8831     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8832     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
8833     VIXL_ASSERT(allow_macro_instructions_);
8834     VIXL_ASSERT(OutsideITBlock());
8835     MacroEmissionCheckScope guard(this);
8836     ITScope it_scope(this, &cond, guard);
8837     vqrshl(cond, dt, rd, rm, rn);
8838   }
Vqrshl(DataType dt,QRegister rd,QRegister rm,QRegister rn)8839   void Vqrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
8840     Vqrshl(al, dt, rd, rm, rn);
8841   }
8842 
Vqrshrn(Condition cond,DataType dt,DRegister rd,QRegister rm,const QOperand & operand)8843   void Vqrshrn(Condition cond,
8844                DataType dt,
8845                DRegister rd,
8846                QRegister rm,
8847                const QOperand& operand) {
8848     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8849     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8850     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8851     VIXL_ASSERT(allow_macro_instructions_);
8852     VIXL_ASSERT(OutsideITBlock());
8853     MacroEmissionCheckScope guard(this);
8854     ITScope it_scope(this, &cond, guard);
8855     vqrshrn(cond, dt, rd, rm, operand);
8856   }
Vqrshrn(DataType dt,DRegister rd,QRegister rm,const QOperand & operand)8857   void Vqrshrn(DataType dt,
8858                DRegister rd,
8859                QRegister rm,
8860                const QOperand& operand) {
8861     Vqrshrn(al, dt, rd, rm, operand);
8862   }
8863 
Vqrshrun(Condition cond,DataType dt,DRegister rd,QRegister rm,const QOperand & operand)8864   void Vqrshrun(Condition cond,
8865                 DataType dt,
8866                 DRegister rd,
8867                 QRegister rm,
8868                 const QOperand& operand) {
8869     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8870     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8871     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8872     VIXL_ASSERT(allow_macro_instructions_);
8873     VIXL_ASSERT(OutsideITBlock());
8874     MacroEmissionCheckScope guard(this);
8875     ITScope it_scope(this, &cond, guard);
8876     vqrshrun(cond, dt, rd, rm, operand);
8877   }
Vqrshrun(DataType dt,DRegister rd,QRegister rm,const QOperand & operand)8878   void Vqrshrun(DataType dt,
8879                 DRegister rd,
8880                 QRegister rm,
8881                 const QOperand& operand) {
8882     Vqrshrun(al, dt, rd, rm, operand);
8883   }
8884 
Vqshl(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)8885   void Vqshl(Condition cond,
8886              DataType dt,
8887              DRegister rd,
8888              DRegister rm,
8889              const DOperand& operand) {
8890     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8891     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8892     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8893     VIXL_ASSERT(allow_macro_instructions_);
8894     VIXL_ASSERT(OutsideITBlock());
8895     MacroEmissionCheckScope guard(this);
8896     ITScope it_scope(this, &cond, guard);
8897     vqshl(cond, dt, rd, rm, operand);
8898   }
Vqshl(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)8899   void Vqshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
8900     Vqshl(al, dt, rd, rm, operand);
8901   }
8902 
Vqshl(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)8903   void Vqshl(Condition cond,
8904              DataType dt,
8905              QRegister rd,
8906              QRegister rm,
8907              const QOperand& operand) {
8908     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8909     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8910     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8911     VIXL_ASSERT(allow_macro_instructions_);
8912     VIXL_ASSERT(OutsideITBlock());
8913     MacroEmissionCheckScope guard(this);
8914     ITScope it_scope(this, &cond, guard);
8915     vqshl(cond, dt, rd, rm, operand);
8916   }
Vqshl(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)8917   void Vqshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
8918     Vqshl(al, dt, rd, rm, operand);
8919   }
8920 
Vqshlu(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)8921   void Vqshlu(Condition cond,
8922               DataType dt,
8923               DRegister rd,
8924               DRegister rm,
8925               const DOperand& operand) {
8926     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8927     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8928     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8929     VIXL_ASSERT(allow_macro_instructions_);
8930     VIXL_ASSERT(OutsideITBlock());
8931     MacroEmissionCheckScope guard(this);
8932     ITScope it_scope(this, &cond, guard);
8933     vqshlu(cond, dt, rd, rm, operand);
8934   }
Vqshlu(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)8935   void Vqshlu(DataType dt,
8936               DRegister rd,
8937               DRegister rm,
8938               const DOperand& operand) {
8939     Vqshlu(al, dt, rd, rm, operand);
8940   }
8941 
Vqshlu(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)8942   void Vqshlu(Condition cond,
8943               DataType dt,
8944               QRegister rd,
8945               QRegister rm,
8946               const QOperand& operand) {
8947     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8948     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8949     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8950     VIXL_ASSERT(allow_macro_instructions_);
8951     VIXL_ASSERT(OutsideITBlock());
8952     MacroEmissionCheckScope guard(this);
8953     ITScope it_scope(this, &cond, guard);
8954     vqshlu(cond, dt, rd, rm, operand);
8955   }
Vqshlu(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)8956   void Vqshlu(DataType dt,
8957               QRegister rd,
8958               QRegister rm,
8959               const QOperand& operand) {
8960     Vqshlu(al, dt, rd, rm, operand);
8961   }
8962 
Vqshrn(Condition cond,DataType dt,DRegister rd,QRegister rm,const QOperand & operand)8963   void Vqshrn(Condition cond,
8964               DataType dt,
8965               DRegister rd,
8966               QRegister rm,
8967               const QOperand& operand) {
8968     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8969     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8970     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8971     VIXL_ASSERT(allow_macro_instructions_);
8972     VIXL_ASSERT(OutsideITBlock());
8973     MacroEmissionCheckScope guard(this);
8974     ITScope it_scope(this, &cond, guard);
8975     vqshrn(cond, dt, rd, rm, operand);
8976   }
Vqshrn(DataType dt,DRegister rd,QRegister rm,const QOperand & operand)8977   void Vqshrn(DataType dt,
8978               DRegister rd,
8979               QRegister rm,
8980               const QOperand& operand) {
8981     Vqshrn(al, dt, rd, rm, operand);
8982   }
8983 
Vqshrun(Condition cond,DataType dt,DRegister rd,QRegister rm,const QOperand & operand)8984   void Vqshrun(Condition cond,
8985                DataType dt,
8986                DRegister rd,
8987                QRegister rm,
8988                const QOperand& operand) {
8989     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
8990     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
8991     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
8992     VIXL_ASSERT(allow_macro_instructions_);
8993     VIXL_ASSERT(OutsideITBlock());
8994     MacroEmissionCheckScope guard(this);
8995     ITScope it_scope(this, &cond, guard);
8996     vqshrun(cond, dt, rd, rm, operand);
8997   }
Vqshrun(DataType dt,DRegister rd,QRegister rm,const QOperand & operand)8998   void Vqshrun(DataType dt,
8999                DRegister rd,
9000                QRegister rm,
9001                const QOperand& operand) {
9002     Vqshrun(al, dt, rd, rm, operand);
9003   }
9004 
Vqsub(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)9005   void Vqsub(
9006       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9007     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9008     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9009     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9010     VIXL_ASSERT(allow_macro_instructions_);
9011     VIXL_ASSERT(OutsideITBlock());
9012     MacroEmissionCheckScope guard(this);
9013     ITScope it_scope(this, &cond, guard);
9014     vqsub(cond, dt, rd, rn, rm);
9015   }
Vqsub(DataType dt,DRegister rd,DRegister rn,DRegister rm)9016   void Vqsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9017     Vqsub(al, dt, rd, rn, rm);
9018   }
9019 
Vqsub(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)9020   void Vqsub(
9021       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9022     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9023     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9024     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9025     VIXL_ASSERT(allow_macro_instructions_);
9026     VIXL_ASSERT(OutsideITBlock());
9027     MacroEmissionCheckScope guard(this);
9028     ITScope it_scope(this, &cond, guard);
9029     vqsub(cond, dt, rd, rn, rm);
9030   }
Vqsub(DataType dt,QRegister rd,QRegister rn,QRegister rm)9031   void Vqsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9032     Vqsub(al, dt, rd, rn, rm);
9033   }
9034 
Vraddhn(Condition cond,DataType dt,DRegister rd,QRegister rn,QRegister rm)9035   void Vraddhn(
9036       Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9037     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9038     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9039     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9040     VIXL_ASSERT(allow_macro_instructions_);
9041     VIXL_ASSERT(OutsideITBlock());
9042     MacroEmissionCheckScope guard(this);
9043     ITScope it_scope(this, &cond, guard);
9044     vraddhn(cond, dt, rd, rn, rm);
9045   }
Vraddhn(DataType dt,DRegister rd,QRegister rn,QRegister rm)9046   void Vraddhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9047     Vraddhn(al, dt, rd, rn, rm);
9048   }
9049 
Vrecpe(Condition cond,DataType dt,DRegister rd,DRegister rm)9050   void Vrecpe(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9051     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9052     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9053     VIXL_ASSERT(allow_macro_instructions_);
9054     VIXL_ASSERT(OutsideITBlock());
9055     MacroEmissionCheckScope guard(this);
9056     ITScope it_scope(this, &cond, guard);
9057     vrecpe(cond, dt, rd, rm);
9058   }
Vrecpe(DataType dt,DRegister rd,DRegister rm)9059   void Vrecpe(DataType dt, DRegister rd, DRegister rm) {
9060     Vrecpe(al, dt, rd, rm);
9061   }
9062 
Vrecpe(Condition cond,DataType dt,QRegister rd,QRegister rm)9063   void Vrecpe(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9064     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9065     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9066     VIXL_ASSERT(allow_macro_instructions_);
9067     VIXL_ASSERT(OutsideITBlock());
9068     MacroEmissionCheckScope guard(this);
9069     ITScope it_scope(this, &cond, guard);
9070     vrecpe(cond, dt, rd, rm);
9071   }
Vrecpe(DataType dt,QRegister rd,QRegister rm)9072   void Vrecpe(DataType dt, QRegister rd, QRegister rm) {
9073     Vrecpe(al, dt, rd, rm);
9074   }
9075 
Vrecps(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)9076   void Vrecps(
9077       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9078     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9079     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9080     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9081     VIXL_ASSERT(allow_macro_instructions_);
9082     VIXL_ASSERT(OutsideITBlock());
9083     MacroEmissionCheckScope guard(this);
9084     ITScope it_scope(this, &cond, guard);
9085     vrecps(cond, dt, rd, rn, rm);
9086   }
Vrecps(DataType dt,DRegister rd,DRegister rn,DRegister rm)9087   void Vrecps(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9088     Vrecps(al, dt, rd, rn, rm);
9089   }
9090 
Vrecps(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)9091   void Vrecps(
9092       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9093     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9094     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9095     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9096     VIXL_ASSERT(allow_macro_instructions_);
9097     VIXL_ASSERT(OutsideITBlock());
9098     MacroEmissionCheckScope guard(this);
9099     ITScope it_scope(this, &cond, guard);
9100     vrecps(cond, dt, rd, rn, rm);
9101   }
Vrecps(DataType dt,QRegister rd,QRegister rn,QRegister rm)9102   void Vrecps(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9103     Vrecps(al, dt, rd, rn, rm);
9104   }
9105 
Vrev16(Condition cond,DataType dt,DRegister rd,DRegister rm)9106   void Vrev16(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9107     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9108     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9109     VIXL_ASSERT(allow_macro_instructions_);
9110     VIXL_ASSERT(OutsideITBlock());
9111     MacroEmissionCheckScope guard(this);
9112     ITScope it_scope(this, &cond, guard);
9113     vrev16(cond, dt, rd, rm);
9114   }
Vrev16(DataType dt,DRegister rd,DRegister rm)9115   void Vrev16(DataType dt, DRegister rd, DRegister rm) {
9116     Vrev16(al, dt, rd, rm);
9117   }
9118 
Vrev16(Condition cond,DataType dt,QRegister rd,QRegister rm)9119   void Vrev16(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9120     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9121     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9122     VIXL_ASSERT(allow_macro_instructions_);
9123     VIXL_ASSERT(OutsideITBlock());
9124     MacroEmissionCheckScope guard(this);
9125     ITScope it_scope(this, &cond, guard);
9126     vrev16(cond, dt, rd, rm);
9127   }
Vrev16(DataType dt,QRegister rd,QRegister rm)9128   void Vrev16(DataType dt, QRegister rd, QRegister rm) {
9129     Vrev16(al, dt, rd, rm);
9130   }
9131 
Vrev32(Condition cond,DataType dt,DRegister rd,DRegister rm)9132   void Vrev32(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9133     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9134     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9135     VIXL_ASSERT(allow_macro_instructions_);
9136     VIXL_ASSERT(OutsideITBlock());
9137     MacroEmissionCheckScope guard(this);
9138     ITScope it_scope(this, &cond, guard);
9139     vrev32(cond, dt, rd, rm);
9140   }
Vrev32(DataType dt,DRegister rd,DRegister rm)9141   void Vrev32(DataType dt, DRegister rd, DRegister rm) {
9142     Vrev32(al, dt, rd, rm);
9143   }
9144 
Vrev32(Condition cond,DataType dt,QRegister rd,QRegister rm)9145   void Vrev32(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9146     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9147     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9148     VIXL_ASSERT(allow_macro_instructions_);
9149     VIXL_ASSERT(OutsideITBlock());
9150     MacroEmissionCheckScope guard(this);
9151     ITScope it_scope(this, &cond, guard);
9152     vrev32(cond, dt, rd, rm);
9153   }
Vrev32(DataType dt,QRegister rd,QRegister rm)9154   void Vrev32(DataType dt, QRegister rd, QRegister rm) {
9155     Vrev32(al, dt, rd, rm);
9156   }
9157 
Vrev64(Condition cond,DataType dt,DRegister rd,DRegister rm)9158   void Vrev64(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9159     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9160     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9161     VIXL_ASSERT(allow_macro_instructions_);
9162     VIXL_ASSERT(OutsideITBlock());
9163     MacroEmissionCheckScope guard(this);
9164     ITScope it_scope(this, &cond, guard);
9165     vrev64(cond, dt, rd, rm);
9166   }
Vrev64(DataType dt,DRegister rd,DRegister rm)9167   void Vrev64(DataType dt, DRegister rd, DRegister rm) {
9168     Vrev64(al, dt, rd, rm);
9169   }
9170 
Vrev64(Condition cond,DataType dt,QRegister rd,QRegister rm)9171   void Vrev64(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9172     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9173     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9174     VIXL_ASSERT(allow_macro_instructions_);
9175     VIXL_ASSERT(OutsideITBlock());
9176     MacroEmissionCheckScope guard(this);
9177     ITScope it_scope(this, &cond, guard);
9178     vrev64(cond, dt, rd, rm);
9179   }
Vrev64(DataType dt,QRegister rd,QRegister rm)9180   void Vrev64(DataType dt, QRegister rd, QRegister rm) {
9181     Vrev64(al, dt, rd, rm);
9182   }
9183 
Vrhadd(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)9184   void Vrhadd(
9185       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9186     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9187     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9188     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9189     VIXL_ASSERT(allow_macro_instructions_);
9190     VIXL_ASSERT(OutsideITBlock());
9191     MacroEmissionCheckScope guard(this);
9192     ITScope it_scope(this, &cond, guard);
9193     vrhadd(cond, dt, rd, rn, rm);
9194   }
Vrhadd(DataType dt,DRegister rd,DRegister rn,DRegister rm)9195   void Vrhadd(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9196     Vrhadd(al, dt, rd, rn, rm);
9197   }
9198 
Vrhadd(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)9199   void Vrhadd(
9200       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9201     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9202     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9203     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9204     VIXL_ASSERT(allow_macro_instructions_);
9205     VIXL_ASSERT(OutsideITBlock());
9206     MacroEmissionCheckScope guard(this);
9207     ITScope it_scope(this, &cond, guard);
9208     vrhadd(cond, dt, rd, rn, rm);
9209   }
Vrhadd(DataType dt,QRegister rd,QRegister rn,QRegister rm)9210   void Vrhadd(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9211     Vrhadd(al, dt, rd, rn, rm);
9212   }
9213 
Vrinta(DataType dt,DRegister rd,DRegister rm)9214   void Vrinta(DataType dt, DRegister rd, DRegister rm) {
9215     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9216     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9217     VIXL_ASSERT(allow_macro_instructions_);
9218     VIXL_ASSERT(OutsideITBlock());
9219     MacroEmissionCheckScope guard(this);
9220     vrinta(dt, rd, rm);
9221   }
9222 
Vrinta(DataType dt,QRegister rd,QRegister rm)9223   void Vrinta(DataType dt, QRegister rd, QRegister rm) {
9224     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9225     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9226     VIXL_ASSERT(allow_macro_instructions_);
9227     VIXL_ASSERT(OutsideITBlock());
9228     MacroEmissionCheckScope guard(this);
9229     vrinta(dt, rd, rm);
9230   }
9231 
Vrinta(DataType dt,SRegister rd,SRegister rm)9232   void Vrinta(DataType dt, SRegister rd, SRegister rm) {
9233     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9234     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9235     VIXL_ASSERT(allow_macro_instructions_);
9236     VIXL_ASSERT(OutsideITBlock());
9237     MacroEmissionCheckScope guard(this);
9238     vrinta(dt, rd, rm);
9239   }
9240 
Vrintm(DataType dt,DRegister rd,DRegister rm)9241   void Vrintm(DataType dt, DRegister rd, DRegister rm) {
9242     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9243     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9244     VIXL_ASSERT(allow_macro_instructions_);
9245     VIXL_ASSERT(OutsideITBlock());
9246     MacroEmissionCheckScope guard(this);
9247     vrintm(dt, rd, rm);
9248   }
9249 
Vrintm(DataType dt,QRegister rd,QRegister rm)9250   void Vrintm(DataType dt, QRegister rd, QRegister rm) {
9251     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9252     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9253     VIXL_ASSERT(allow_macro_instructions_);
9254     VIXL_ASSERT(OutsideITBlock());
9255     MacroEmissionCheckScope guard(this);
9256     vrintm(dt, rd, rm);
9257   }
9258 
Vrintm(DataType dt,SRegister rd,SRegister rm)9259   void Vrintm(DataType dt, SRegister rd, SRegister rm) {
9260     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9261     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9262     VIXL_ASSERT(allow_macro_instructions_);
9263     VIXL_ASSERT(OutsideITBlock());
9264     MacroEmissionCheckScope guard(this);
9265     vrintm(dt, rd, rm);
9266   }
9267 
Vrintn(DataType dt,DRegister rd,DRegister rm)9268   void Vrintn(DataType dt, DRegister rd, DRegister rm) {
9269     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9270     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9271     VIXL_ASSERT(allow_macro_instructions_);
9272     VIXL_ASSERT(OutsideITBlock());
9273     MacroEmissionCheckScope guard(this);
9274     vrintn(dt, rd, rm);
9275   }
9276 
Vrintn(DataType dt,QRegister rd,QRegister rm)9277   void Vrintn(DataType dt, QRegister rd, QRegister rm) {
9278     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9279     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9280     VIXL_ASSERT(allow_macro_instructions_);
9281     VIXL_ASSERT(OutsideITBlock());
9282     MacroEmissionCheckScope guard(this);
9283     vrintn(dt, rd, rm);
9284   }
9285 
Vrintn(DataType dt,SRegister rd,SRegister rm)9286   void Vrintn(DataType dt, SRegister rd, SRegister rm) {
9287     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9288     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9289     VIXL_ASSERT(allow_macro_instructions_);
9290     VIXL_ASSERT(OutsideITBlock());
9291     MacroEmissionCheckScope guard(this);
9292     vrintn(dt, rd, rm);
9293   }
9294 
Vrintp(DataType dt,DRegister rd,DRegister rm)9295   void Vrintp(DataType dt, DRegister rd, DRegister rm) {
9296     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9297     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9298     VIXL_ASSERT(allow_macro_instructions_);
9299     VIXL_ASSERT(OutsideITBlock());
9300     MacroEmissionCheckScope guard(this);
9301     vrintp(dt, rd, rm);
9302   }
9303 
Vrintp(DataType dt,QRegister rd,QRegister rm)9304   void Vrintp(DataType dt, QRegister rd, QRegister rm) {
9305     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9306     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9307     VIXL_ASSERT(allow_macro_instructions_);
9308     VIXL_ASSERT(OutsideITBlock());
9309     MacroEmissionCheckScope guard(this);
9310     vrintp(dt, rd, rm);
9311   }
9312 
Vrintp(DataType dt,SRegister rd,SRegister rm)9313   void Vrintp(DataType dt, SRegister rd, SRegister rm) {
9314     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9315     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9316     VIXL_ASSERT(allow_macro_instructions_);
9317     VIXL_ASSERT(OutsideITBlock());
9318     MacroEmissionCheckScope guard(this);
9319     vrintp(dt, rd, rm);
9320   }
9321 
Vrintr(Condition cond,DataType dt,SRegister rd,SRegister rm)9322   void Vrintr(Condition cond, DataType dt, SRegister rd, SRegister rm) {
9323     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9324     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9325     VIXL_ASSERT(allow_macro_instructions_);
9326     VIXL_ASSERT(OutsideITBlock());
9327     MacroEmissionCheckScope guard(this);
9328     ITScope it_scope(this, &cond, guard);
9329     vrintr(cond, dt, rd, rm);
9330   }
Vrintr(DataType dt,SRegister rd,SRegister rm)9331   void Vrintr(DataType dt, SRegister rd, SRegister rm) {
9332     Vrintr(al, dt, rd, rm);
9333   }
9334 
Vrintr(Condition cond,DataType dt,DRegister rd,DRegister rm)9335   void Vrintr(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9336     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9337     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9338     VIXL_ASSERT(allow_macro_instructions_);
9339     VIXL_ASSERT(OutsideITBlock());
9340     MacroEmissionCheckScope guard(this);
9341     ITScope it_scope(this, &cond, guard);
9342     vrintr(cond, dt, rd, rm);
9343   }
Vrintr(DataType dt,DRegister rd,DRegister rm)9344   void Vrintr(DataType dt, DRegister rd, DRegister rm) {
9345     Vrintr(al, dt, rd, rm);
9346   }
9347 
Vrintx(Condition cond,DataType dt,DRegister rd,DRegister rm)9348   void Vrintx(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9349     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9350     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9351     VIXL_ASSERT(allow_macro_instructions_);
9352     VIXL_ASSERT(OutsideITBlock());
9353     MacroEmissionCheckScope guard(this);
9354     ITScope it_scope(this, &cond, guard);
9355     vrintx(cond, dt, rd, rm);
9356   }
Vrintx(DataType dt,DRegister rd,DRegister rm)9357   void Vrintx(DataType dt, DRegister rd, DRegister rm) {
9358     Vrintx(al, dt, rd, rm);
9359   }
9360 
Vrintx(DataType dt,QRegister rd,QRegister rm)9361   void Vrintx(DataType dt, QRegister rd, QRegister rm) {
9362     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9363     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9364     VIXL_ASSERT(allow_macro_instructions_);
9365     VIXL_ASSERT(OutsideITBlock());
9366     MacroEmissionCheckScope guard(this);
9367     vrintx(dt, rd, rm);
9368   }
9369 
Vrintx(Condition cond,DataType dt,SRegister rd,SRegister rm)9370   void Vrintx(Condition cond, DataType dt, SRegister rd, SRegister rm) {
9371     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9372     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9373     VIXL_ASSERT(allow_macro_instructions_);
9374     VIXL_ASSERT(OutsideITBlock());
9375     MacroEmissionCheckScope guard(this);
9376     ITScope it_scope(this, &cond, guard);
9377     vrintx(cond, dt, rd, rm);
9378   }
Vrintx(DataType dt,SRegister rd,SRegister rm)9379   void Vrintx(DataType dt, SRegister rd, SRegister rm) {
9380     Vrintx(al, dt, rd, rm);
9381   }
9382 
Vrintz(Condition cond,DataType dt,DRegister rd,DRegister rm)9383   void Vrintz(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9384     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9385     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9386     VIXL_ASSERT(allow_macro_instructions_);
9387     VIXL_ASSERT(OutsideITBlock());
9388     MacroEmissionCheckScope guard(this);
9389     ITScope it_scope(this, &cond, guard);
9390     vrintz(cond, dt, rd, rm);
9391   }
Vrintz(DataType dt,DRegister rd,DRegister rm)9392   void Vrintz(DataType dt, DRegister rd, DRegister rm) {
9393     Vrintz(al, dt, rd, rm);
9394   }
9395 
Vrintz(DataType dt,QRegister rd,QRegister rm)9396   void Vrintz(DataType dt, QRegister rd, QRegister rm) {
9397     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9398     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9399     VIXL_ASSERT(allow_macro_instructions_);
9400     VIXL_ASSERT(OutsideITBlock());
9401     MacroEmissionCheckScope guard(this);
9402     vrintz(dt, rd, rm);
9403   }
9404 
Vrintz(Condition cond,DataType dt,SRegister rd,SRegister rm)9405   void Vrintz(Condition cond, DataType dt, SRegister rd, SRegister rm) {
9406     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9407     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9408     VIXL_ASSERT(allow_macro_instructions_);
9409     VIXL_ASSERT(OutsideITBlock());
9410     MacroEmissionCheckScope guard(this);
9411     ITScope it_scope(this, &cond, guard);
9412     vrintz(cond, dt, rd, rm);
9413   }
Vrintz(DataType dt,SRegister rd,SRegister rm)9414   void Vrintz(DataType dt, SRegister rd, SRegister rm) {
9415     Vrintz(al, dt, rd, rm);
9416   }
9417 
Vrshl(Condition cond,DataType dt,DRegister rd,DRegister rm,DRegister rn)9418   void Vrshl(
9419       Condition cond, DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9420     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9421     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9422     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9423     VIXL_ASSERT(allow_macro_instructions_);
9424     VIXL_ASSERT(OutsideITBlock());
9425     MacroEmissionCheckScope guard(this);
9426     ITScope it_scope(this, &cond, guard);
9427     vrshl(cond, dt, rd, rm, rn);
9428   }
Vrshl(DataType dt,DRegister rd,DRegister rm,DRegister rn)9429   void Vrshl(DataType dt, DRegister rd, DRegister rm, DRegister rn) {
9430     Vrshl(al, dt, rd, rm, rn);
9431   }
9432 
Vrshl(Condition cond,DataType dt,QRegister rd,QRegister rm,QRegister rn)9433   void Vrshl(
9434       Condition cond, DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9435     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9436     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9437     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9438     VIXL_ASSERT(allow_macro_instructions_);
9439     VIXL_ASSERT(OutsideITBlock());
9440     MacroEmissionCheckScope guard(this);
9441     ITScope it_scope(this, &cond, guard);
9442     vrshl(cond, dt, rd, rm, rn);
9443   }
Vrshl(DataType dt,QRegister rd,QRegister rm,QRegister rn)9444   void Vrshl(DataType dt, QRegister rd, QRegister rm, QRegister rn) {
9445     Vrshl(al, dt, rd, rm, rn);
9446   }
9447 
Vrshr(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9448   void Vrshr(Condition cond,
9449              DataType dt,
9450              DRegister rd,
9451              DRegister rm,
9452              const DOperand& operand) {
9453     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9454     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9455     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9456     VIXL_ASSERT(allow_macro_instructions_);
9457     VIXL_ASSERT(OutsideITBlock());
9458     MacroEmissionCheckScope guard(this);
9459     ITScope it_scope(this, &cond, guard);
9460     vrshr(cond, dt, rd, rm, operand);
9461   }
Vrshr(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9462   void Vrshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9463     Vrshr(al, dt, rd, rm, operand);
9464   }
9465 
Vrshr(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9466   void Vrshr(Condition cond,
9467              DataType dt,
9468              QRegister rd,
9469              QRegister rm,
9470              const QOperand& operand) {
9471     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9472     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9473     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9474     VIXL_ASSERT(allow_macro_instructions_);
9475     VIXL_ASSERT(OutsideITBlock());
9476     MacroEmissionCheckScope guard(this);
9477     ITScope it_scope(this, &cond, guard);
9478     vrshr(cond, dt, rd, rm, operand);
9479   }
Vrshr(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9480   void Vrshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9481     Vrshr(al, dt, rd, rm, operand);
9482   }
9483 
Vrshrn(Condition cond,DataType dt,DRegister rd,QRegister rm,const QOperand & operand)9484   void Vrshrn(Condition cond,
9485               DataType dt,
9486               DRegister rd,
9487               QRegister rm,
9488               const QOperand& operand) {
9489     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9490     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9491     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9492     VIXL_ASSERT(allow_macro_instructions_);
9493     VIXL_ASSERT(OutsideITBlock());
9494     MacroEmissionCheckScope guard(this);
9495     ITScope it_scope(this, &cond, guard);
9496     vrshrn(cond, dt, rd, rm, operand);
9497   }
Vrshrn(DataType dt,DRegister rd,QRegister rm,const QOperand & operand)9498   void Vrshrn(DataType dt,
9499               DRegister rd,
9500               QRegister rm,
9501               const QOperand& operand) {
9502     Vrshrn(al, dt, rd, rm, operand);
9503   }
9504 
Vrsqrte(Condition cond,DataType dt,DRegister rd,DRegister rm)9505   void Vrsqrte(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9506     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9507     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9508     VIXL_ASSERT(allow_macro_instructions_);
9509     VIXL_ASSERT(OutsideITBlock());
9510     MacroEmissionCheckScope guard(this);
9511     ITScope it_scope(this, &cond, guard);
9512     vrsqrte(cond, dt, rd, rm);
9513   }
Vrsqrte(DataType dt,DRegister rd,DRegister rm)9514   void Vrsqrte(DataType dt, DRegister rd, DRegister rm) {
9515     Vrsqrte(al, dt, rd, rm);
9516   }
9517 
Vrsqrte(Condition cond,DataType dt,QRegister rd,QRegister rm)9518   void Vrsqrte(Condition cond, DataType dt, QRegister rd, QRegister rm) {
9519     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9520     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9521     VIXL_ASSERT(allow_macro_instructions_);
9522     VIXL_ASSERT(OutsideITBlock());
9523     MacroEmissionCheckScope guard(this);
9524     ITScope it_scope(this, &cond, guard);
9525     vrsqrte(cond, dt, rd, rm);
9526   }
Vrsqrte(DataType dt,QRegister rd,QRegister rm)9527   void Vrsqrte(DataType dt, QRegister rd, QRegister rm) {
9528     Vrsqrte(al, dt, rd, rm);
9529   }
9530 
Vrsqrts(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)9531   void Vrsqrts(
9532       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9533     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9534     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9535     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9536     VIXL_ASSERT(allow_macro_instructions_);
9537     VIXL_ASSERT(OutsideITBlock());
9538     MacroEmissionCheckScope guard(this);
9539     ITScope it_scope(this, &cond, guard);
9540     vrsqrts(cond, dt, rd, rn, rm);
9541   }
Vrsqrts(DataType dt,DRegister rd,DRegister rn,DRegister rm)9542   void Vrsqrts(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9543     Vrsqrts(al, dt, rd, rn, rm);
9544   }
9545 
Vrsqrts(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)9546   void Vrsqrts(
9547       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9548     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9549     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9550     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9551     VIXL_ASSERT(allow_macro_instructions_);
9552     VIXL_ASSERT(OutsideITBlock());
9553     MacroEmissionCheckScope guard(this);
9554     ITScope it_scope(this, &cond, guard);
9555     vrsqrts(cond, dt, rd, rn, rm);
9556   }
Vrsqrts(DataType dt,QRegister rd,QRegister rn,QRegister rm)9557   void Vrsqrts(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
9558     Vrsqrts(al, dt, rd, rn, rm);
9559   }
9560 
Vrsra(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9561   void Vrsra(Condition cond,
9562              DataType dt,
9563              DRegister rd,
9564              DRegister rm,
9565              const DOperand& operand) {
9566     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9567     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9568     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9569     VIXL_ASSERT(allow_macro_instructions_);
9570     VIXL_ASSERT(OutsideITBlock());
9571     MacroEmissionCheckScope guard(this);
9572     ITScope it_scope(this, &cond, guard);
9573     vrsra(cond, dt, rd, rm, operand);
9574   }
Vrsra(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9575   void Vrsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9576     Vrsra(al, dt, rd, rm, operand);
9577   }
9578 
Vrsra(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9579   void Vrsra(Condition cond,
9580              DataType dt,
9581              QRegister rd,
9582              QRegister rm,
9583              const QOperand& operand) {
9584     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9585     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9586     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9587     VIXL_ASSERT(allow_macro_instructions_);
9588     VIXL_ASSERT(OutsideITBlock());
9589     MacroEmissionCheckScope guard(this);
9590     ITScope it_scope(this, &cond, guard);
9591     vrsra(cond, dt, rd, rm, operand);
9592   }
Vrsra(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9593   void Vrsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9594     Vrsra(al, dt, rd, rm, operand);
9595   }
9596 
Vrsubhn(Condition cond,DataType dt,DRegister rd,QRegister rn,QRegister rm)9597   void Vrsubhn(
9598       Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9599     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9600     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9601     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9602     VIXL_ASSERT(allow_macro_instructions_);
9603     VIXL_ASSERT(OutsideITBlock());
9604     MacroEmissionCheckScope guard(this);
9605     ITScope it_scope(this, &cond, guard);
9606     vrsubhn(cond, dt, rd, rn, rm);
9607   }
Vrsubhn(DataType dt,DRegister rd,QRegister rn,QRegister rm)9608   void Vrsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
9609     Vrsubhn(al, dt, rd, rn, rm);
9610   }
9611 
Vseleq(DataType dt,DRegister rd,DRegister rn,DRegister rm)9612   void Vseleq(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9613     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9614     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9615     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9616     VIXL_ASSERT(allow_macro_instructions_);
9617     VIXL_ASSERT(OutsideITBlock());
9618     MacroEmissionCheckScope guard(this);
9619     vseleq(dt, rd, rn, rm);
9620   }
9621 
Vseleq(DataType dt,SRegister rd,SRegister rn,SRegister rm)9622   void Vseleq(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9623     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9624     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9625     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9626     VIXL_ASSERT(allow_macro_instructions_);
9627     VIXL_ASSERT(OutsideITBlock());
9628     MacroEmissionCheckScope guard(this);
9629     vseleq(dt, rd, rn, rm);
9630   }
9631 
Vselge(DataType dt,DRegister rd,DRegister rn,DRegister rm)9632   void Vselge(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9633     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9634     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9635     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9636     VIXL_ASSERT(allow_macro_instructions_);
9637     VIXL_ASSERT(OutsideITBlock());
9638     MacroEmissionCheckScope guard(this);
9639     vselge(dt, rd, rn, rm);
9640   }
9641 
Vselge(DataType dt,SRegister rd,SRegister rn,SRegister rm)9642   void Vselge(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9643     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9644     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9645     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9646     VIXL_ASSERT(allow_macro_instructions_);
9647     VIXL_ASSERT(OutsideITBlock());
9648     MacroEmissionCheckScope guard(this);
9649     vselge(dt, rd, rn, rm);
9650   }
9651 
Vselgt(DataType dt,DRegister rd,DRegister rn,DRegister rm)9652   void Vselgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9653     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9654     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9655     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9656     VIXL_ASSERT(allow_macro_instructions_);
9657     VIXL_ASSERT(OutsideITBlock());
9658     MacroEmissionCheckScope guard(this);
9659     vselgt(dt, rd, rn, rm);
9660   }
9661 
Vselgt(DataType dt,SRegister rd,SRegister rn,SRegister rm)9662   void Vselgt(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9663     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9664     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9665     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9666     VIXL_ASSERT(allow_macro_instructions_);
9667     VIXL_ASSERT(OutsideITBlock());
9668     MacroEmissionCheckScope guard(this);
9669     vselgt(dt, rd, rn, rm);
9670   }
9671 
Vselvs(DataType dt,DRegister rd,DRegister rn,DRegister rm)9672   void Vselvs(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
9673     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9674     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9675     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9676     VIXL_ASSERT(allow_macro_instructions_);
9677     VIXL_ASSERT(OutsideITBlock());
9678     MacroEmissionCheckScope guard(this);
9679     vselvs(dt, rd, rn, rm);
9680   }
9681 
Vselvs(DataType dt,SRegister rd,SRegister rn,SRegister rm)9682   void Vselvs(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
9683     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9684     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
9685     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9686     VIXL_ASSERT(allow_macro_instructions_);
9687     VIXL_ASSERT(OutsideITBlock());
9688     MacroEmissionCheckScope guard(this);
9689     vselvs(dt, rd, rn, rm);
9690   }
9691 
Vshl(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9692   void Vshl(Condition cond,
9693             DataType dt,
9694             DRegister rd,
9695             DRegister rm,
9696             const DOperand& operand) {
9697     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9698     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9699     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9700     VIXL_ASSERT(allow_macro_instructions_);
9701     VIXL_ASSERT(OutsideITBlock());
9702     MacroEmissionCheckScope guard(this);
9703     ITScope it_scope(this, &cond, guard);
9704     vshl(cond, dt, rd, rm, operand);
9705   }
Vshl(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9706   void Vshl(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9707     Vshl(al, dt, rd, rm, operand);
9708   }
9709 
Vshl(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9710   void Vshl(Condition cond,
9711             DataType dt,
9712             QRegister rd,
9713             QRegister rm,
9714             const QOperand& operand) {
9715     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9716     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9717     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9718     VIXL_ASSERT(allow_macro_instructions_);
9719     VIXL_ASSERT(OutsideITBlock());
9720     MacroEmissionCheckScope guard(this);
9721     ITScope it_scope(this, &cond, guard);
9722     vshl(cond, dt, rd, rm, operand);
9723   }
Vshl(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9724   void Vshl(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9725     Vshl(al, dt, rd, rm, operand);
9726   }
9727 
Vshll(Condition cond,DataType dt,QRegister rd,DRegister rm,const DOperand & operand)9728   void Vshll(Condition cond,
9729              DataType dt,
9730              QRegister rd,
9731              DRegister rm,
9732              const DOperand& operand) {
9733     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9734     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9735     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9736     VIXL_ASSERT(allow_macro_instructions_);
9737     VIXL_ASSERT(OutsideITBlock());
9738     MacroEmissionCheckScope guard(this);
9739     ITScope it_scope(this, &cond, guard);
9740     vshll(cond, dt, rd, rm, operand);
9741   }
Vshll(DataType dt,QRegister rd,DRegister rm,const DOperand & operand)9742   void Vshll(DataType dt, QRegister rd, DRegister rm, const DOperand& operand) {
9743     Vshll(al, dt, rd, rm, operand);
9744   }
9745 
Vshr(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9746   void Vshr(Condition cond,
9747             DataType dt,
9748             DRegister rd,
9749             DRegister rm,
9750             const DOperand& operand) {
9751     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9752     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9753     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9754     VIXL_ASSERT(allow_macro_instructions_);
9755     VIXL_ASSERT(OutsideITBlock());
9756     MacroEmissionCheckScope guard(this);
9757     ITScope it_scope(this, &cond, guard);
9758     vshr(cond, dt, rd, rm, operand);
9759   }
Vshr(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9760   void Vshr(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9761     Vshr(al, dt, rd, rm, operand);
9762   }
9763 
Vshr(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9764   void Vshr(Condition cond,
9765             DataType dt,
9766             QRegister rd,
9767             QRegister rm,
9768             const QOperand& operand) {
9769     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9770     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9771     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9772     VIXL_ASSERT(allow_macro_instructions_);
9773     VIXL_ASSERT(OutsideITBlock());
9774     MacroEmissionCheckScope guard(this);
9775     ITScope it_scope(this, &cond, guard);
9776     vshr(cond, dt, rd, rm, operand);
9777   }
Vshr(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9778   void Vshr(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9779     Vshr(al, dt, rd, rm, operand);
9780   }
9781 
Vshrn(Condition cond,DataType dt,DRegister rd,QRegister rm,const QOperand & operand)9782   void Vshrn(Condition cond,
9783              DataType dt,
9784              DRegister rd,
9785              QRegister rm,
9786              const QOperand& operand) {
9787     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9788     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9789     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9790     VIXL_ASSERT(allow_macro_instructions_);
9791     VIXL_ASSERT(OutsideITBlock());
9792     MacroEmissionCheckScope guard(this);
9793     ITScope it_scope(this, &cond, guard);
9794     vshrn(cond, dt, rd, rm, operand);
9795   }
Vshrn(DataType dt,DRegister rd,QRegister rm,const QOperand & operand)9796   void Vshrn(DataType dt, DRegister rd, QRegister rm, const QOperand& operand) {
9797     Vshrn(al, dt, rd, rm, operand);
9798   }
9799 
Vsli(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9800   void Vsli(Condition cond,
9801             DataType dt,
9802             DRegister rd,
9803             DRegister rm,
9804             const DOperand& operand) {
9805     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9806     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9807     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9808     VIXL_ASSERT(allow_macro_instructions_);
9809     VIXL_ASSERT(OutsideITBlock());
9810     MacroEmissionCheckScope guard(this);
9811     ITScope it_scope(this, &cond, guard);
9812     vsli(cond, dt, rd, rm, operand);
9813   }
Vsli(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9814   void Vsli(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9815     Vsli(al, dt, rd, rm, operand);
9816   }
9817 
Vsli(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9818   void Vsli(Condition cond,
9819             DataType dt,
9820             QRegister rd,
9821             QRegister rm,
9822             const QOperand& operand) {
9823     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9824     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9825     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9826     VIXL_ASSERT(allow_macro_instructions_);
9827     VIXL_ASSERT(OutsideITBlock());
9828     MacroEmissionCheckScope guard(this);
9829     ITScope it_scope(this, &cond, guard);
9830     vsli(cond, dt, rd, rm, operand);
9831   }
Vsli(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9832   void Vsli(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9833     Vsli(al, dt, rd, rm, operand);
9834   }
9835 
Vsqrt(Condition cond,DataType dt,SRegister rd,SRegister rm)9836   void Vsqrt(Condition cond, DataType dt, SRegister rd, SRegister rm) {
9837     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9838     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9839     VIXL_ASSERT(allow_macro_instructions_);
9840     VIXL_ASSERT(OutsideITBlock());
9841     MacroEmissionCheckScope guard(this);
9842     ITScope it_scope(this, &cond, guard);
9843     vsqrt(cond, dt, rd, rm);
9844   }
Vsqrt(DataType dt,SRegister rd,SRegister rm)9845   void Vsqrt(DataType dt, SRegister rd, SRegister rm) { Vsqrt(al, dt, rd, rm); }
9846 
Vsqrt(Condition cond,DataType dt,DRegister rd,DRegister rm)9847   void Vsqrt(Condition cond, DataType dt, DRegister rd, DRegister rm) {
9848     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9849     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9850     VIXL_ASSERT(allow_macro_instructions_);
9851     VIXL_ASSERT(OutsideITBlock());
9852     MacroEmissionCheckScope guard(this);
9853     ITScope it_scope(this, &cond, guard);
9854     vsqrt(cond, dt, rd, rm);
9855   }
Vsqrt(DataType dt,DRegister rd,DRegister rm)9856   void Vsqrt(DataType dt, DRegister rd, DRegister rm) { Vsqrt(al, dt, rd, rm); }
9857 
Vsra(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9858   void Vsra(Condition cond,
9859             DataType dt,
9860             DRegister rd,
9861             DRegister rm,
9862             const DOperand& operand) {
9863     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9864     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9865     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9866     VIXL_ASSERT(allow_macro_instructions_);
9867     VIXL_ASSERT(OutsideITBlock());
9868     MacroEmissionCheckScope guard(this);
9869     ITScope it_scope(this, &cond, guard);
9870     vsra(cond, dt, rd, rm, operand);
9871   }
Vsra(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9872   void Vsra(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9873     Vsra(al, dt, rd, rm, operand);
9874   }
9875 
Vsra(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9876   void Vsra(Condition cond,
9877             DataType dt,
9878             QRegister rd,
9879             QRegister rm,
9880             const QOperand& operand) {
9881     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9882     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9883     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9884     VIXL_ASSERT(allow_macro_instructions_);
9885     VIXL_ASSERT(OutsideITBlock());
9886     MacroEmissionCheckScope guard(this);
9887     ITScope it_scope(this, &cond, guard);
9888     vsra(cond, dt, rd, rm, operand);
9889   }
Vsra(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9890   void Vsra(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9891     Vsra(al, dt, rd, rm, operand);
9892   }
9893 
Vsri(Condition cond,DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9894   void Vsri(Condition cond,
9895             DataType dt,
9896             DRegister rd,
9897             DRegister rm,
9898             const DOperand& operand) {
9899     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9900     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9901     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9902     VIXL_ASSERT(allow_macro_instructions_);
9903     VIXL_ASSERT(OutsideITBlock());
9904     MacroEmissionCheckScope guard(this);
9905     ITScope it_scope(this, &cond, guard);
9906     vsri(cond, dt, rd, rm, operand);
9907   }
Vsri(DataType dt,DRegister rd,DRegister rm,const DOperand & operand)9908   void Vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) {
9909     Vsri(al, dt, rd, rm, operand);
9910   }
9911 
Vsri(Condition cond,DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9912   void Vsri(Condition cond,
9913             DataType dt,
9914             QRegister rd,
9915             QRegister rm,
9916             const QOperand& operand) {
9917     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
9918     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
9919     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9920     VIXL_ASSERT(allow_macro_instructions_);
9921     VIXL_ASSERT(OutsideITBlock());
9922     MacroEmissionCheckScope guard(this);
9923     ITScope it_scope(this, &cond, guard);
9924     vsri(cond, dt, rd, rm, operand);
9925   }
Vsri(DataType dt,QRegister rd,QRegister rm,const QOperand & operand)9926   void Vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) {
9927     Vsri(al, dt, rd, rm, operand);
9928   }
9929 
Vst1(Condition cond,DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)9930   void Vst1(Condition cond,
9931             DataType dt,
9932             const NeonRegisterList& nreglist,
9933             const AlignedMemOperand& operand) {
9934     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
9935     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9936     VIXL_ASSERT(allow_macro_instructions_);
9937     VIXL_ASSERT(OutsideITBlock());
9938     MacroEmissionCheckScope guard(this);
9939     ITScope it_scope(this, &cond, guard);
9940     vst1(cond, dt, nreglist, operand);
9941   }
Vst1(DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)9942   void Vst1(DataType dt,
9943             const NeonRegisterList& nreglist,
9944             const AlignedMemOperand& operand) {
9945     Vst1(al, dt, nreglist, operand);
9946   }
9947 
Vst2(Condition cond,DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)9948   void Vst2(Condition cond,
9949             DataType dt,
9950             const NeonRegisterList& nreglist,
9951             const AlignedMemOperand& operand) {
9952     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
9953     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9954     VIXL_ASSERT(allow_macro_instructions_);
9955     VIXL_ASSERT(OutsideITBlock());
9956     MacroEmissionCheckScope guard(this);
9957     ITScope it_scope(this, &cond, guard);
9958     vst2(cond, dt, nreglist, operand);
9959   }
Vst2(DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)9960   void Vst2(DataType dt,
9961             const NeonRegisterList& nreglist,
9962             const AlignedMemOperand& operand) {
9963     Vst2(al, dt, nreglist, operand);
9964   }
9965 
Vst3(Condition cond,DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)9966   void Vst3(Condition cond,
9967             DataType dt,
9968             const NeonRegisterList& nreglist,
9969             const AlignedMemOperand& operand) {
9970     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
9971     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9972     VIXL_ASSERT(allow_macro_instructions_);
9973     VIXL_ASSERT(OutsideITBlock());
9974     MacroEmissionCheckScope guard(this);
9975     ITScope it_scope(this, &cond, guard);
9976     vst3(cond, dt, nreglist, operand);
9977   }
Vst3(DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)9978   void Vst3(DataType dt,
9979             const NeonRegisterList& nreglist,
9980             const AlignedMemOperand& operand) {
9981     Vst3(al, dt, nreglist, operand);
9982   }
9983 
Vst3(Condition cond,DataType dt,const NeonRegisterList & nreglist,const MemOperand & operand)9984   void Vst3(Condition cond,
9985             DataType dt,
9986             const NeonRegisterList& nreglist,
9987             const MemOperand& operand) {
9988     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
9989     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
9990     VIXL_ASSERT(allow_macro_instructions_);
9991     VIXL_ASSERT(OutsideITBlock());
9992     MacroEmissionCheckScope guard(this);
9993     ITScope it_scope(this, &cond, guard);
9994     vst3(cond, dt, nreglist, operand);
9995   }
Vst3(DataType dt,const NeonRegisterList & nreglist,const MemOperand & operand)9996   void Vst3(DataType dt,
9997             const NeonRegisterList& nreglist,
9998             const MemOperand& operand) {
9999     Vst3(al, dt, nreglist, operand);
10000   }
10001 
Vst4(Condition cond,DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)10002   void Vst4(Condition cond,
10003             DataType dt,
10004             const NeonRegisterList& nreglist,
10005             const AlignedMemOperand& operand) {
10006     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10007     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10008     VIXL_ASSERT(allow_macro_instructions_);
10009     VIXL_ASSERT(OutsideITBlock());
10010     MacroEmissionCheckScope guard(this);
10011     ITScope it_scope(this, &cond, guard);
10012     vst4(cond, dt, nreglist, operand);
10013   }
Vst4(DataType dt,const NeonRegisterList & nreglist,const AlignedMemOperand & operand)10014   void Vst4(DataType dt,
10015             const NeonRegisterList& nreglist,
10016             const AlignedMemOperand& operand) {
10017     Vst4(al, dt, nreglist, operand);
10018   }
10019 
Vstm(Condition cond,DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)10020   void Vstm(Condition cond,
10021             DataType dt,
10022             Register rn,
10023             WriteBack write_back,
10024             DRegisterList dreglist) {
10025     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10026     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10027     VIXL_ASSERT(allow_macro_instructions_);
10028     VIXL_ASSERT(OutsideITBlock());
10029     MacroEmissionCheckScope guard(this);
10030     ITScope it_scope(this, &cond, guard);
10031     vstm(cond, dt, rn, write_back, dreglist);
10032   }
Vstm(DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)10033   void Vstm(DataType dt,
10034             Register rn,
10035             WriteBack write_back,
10036             DRegisterList dreglist) {
10037     Vstm(al, dt, rn, write_back, dreglist);
10038   }
Vstm(Condition cond,Register rn,WriteBack write_back,DRegisterList dreglist)10039   void Vstm(Condition cond,
10040             Register rn,
10041             WriteBack write_back,
10042             DRegisterList dreglist) {
10043     Vstm(cond, kDataTypeValueNone, rn, write_back, dreglist);
10044   }
Vstm(Register rn,WriteBack write_back,DRegisterList dreglist)10045   void Vstm(Register rn, WriteBack write_back, DRegisterList dreglist) {
10046     Vstm(al, kDataTypeValueNone, rn, write_back, dreglist);
10047   }
10048 
Vstm(Condition cond,DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)10049   void Vstm(Condition cond,
10050             DataType dt,
10051             Register rn,
10052             WriteBack write_back,
10053             SRegisterList sreglist) {
10054     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10055     VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10056     VIXL_ASSERT(allow_macro_instructions_);
10057     VIXL_ASSERT(OutsideITBlock());
10058     MacroEmissionCheckScope guard(this);
10059     ITScope it_scope(this, &cond, guard);
10060     vstm(cond, dt, rn, write_back, sreglist);
10061   }
Vstm(DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)10062   void Vstm(DataType dt,
10063             Register rn,
10064             WriteBack write_back,
10065             SRegisterList sreglist) {
10066     Vstm(al, dt, rn, write_back, sreglist);
10067   }
Vstm(Condition cond,Register rn,WriteBack write_back,SRegisterList sreglist)10068   void Vstm(Condition cond,
10069             Register rn,
10070             WriteBack write_back,
10071             SRegisterList sreglist) {
10072     Vstm(cond, kDataTypeValueNone, rn, write_back, sreglist);
10073   }
Vstm(Register rn,WriteBack write_back,SRegisterList sreglist)10074   void Vstm(Register rn, WriteBack write_back, SRegisterList sreglist) {
10075     Vstm(al, kDataTypeValueNone, rn, write_back, sreglist);
10076   }
10077 
Vstmdb(Condition cond,DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)10078   void Vstmdb(Condition cond,
10079               DataType dt,
10080               Register rn,
10081               WriteBack write_back,
10082               DRegisterList dreglist) {
10083     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10084     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10085     VIXL_ASSERT(allow_macro_instructions_);
10086     VIXL_ASSERT(OutsideITBlock());
10087     MacroEmissionCheckScope guard(this);
10088     ITScope it_scope(this, &cond, guard);
10089     vstmdb(cond, dt, rn, write_back, dreglist);
10090   }
Vstmdb(DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)10091   void Vstmdb(DataType dt,
10092               Register rn,
10093               WriteBack write_back,
10094               DRegisterList dreglist) {
10095     Vstmdb(al, dt, rn, write_back, dreglist);
10096   }
Vstmdb(Condition cond,Register rn,WriteBack write_back,DRegisterList dreglist)10097   void Vstmdb(Condition cond,
10098               Register rn,
10099               WriteBack write_back,
10100               DRegisterList dreglist) {
10101     Vstmdb(cond, kDataTypeValueNone, rn, write_back, dreglist);
10102   }
Vstmdb(Register rn,WriteBack write_back,DRegisterList dreglist)10103   void Vstmdb(Register rn, WriteBack write_back, DRegisterList dreglist) {
10104     Vstmdb(al, kDataTypeValueNone, rn, write_back, dreglist);
10105   }
10106 
Vstmdb(Condition cond,DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)10107   void Vstmdb(Condition cond,
10108               DataType dt,
10109               Register rn,
10110               WriteBack write_back,
10111               SRegisterList sreglist) {
10112     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10113     VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10114     VIXL_ASSERT(allow_macro_instructions_);
10115     VIXL_ASSERT(OutsideITBlock());
10116     MacroEmissionCheckScope guard(this);
10117     ITScope it_scope(this, &cond, guard);
10118     vstmdb(cond, dt, rn, write_back, sreglist);
10119   }
Vstmdb(DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)10120   void Vstmdb(DataType dt,
10121               Register rn,
10122               WriteBack write_back,
10123               SRegisterList sreglist) {
10124     Vstmdb(al, dt, rn, write_back, sreglist);
10125   }
Vstmdb(Condition cond,Register rn,WriteBack write_back,SRegisterList sreglist)10126   void Vstmdb(Condition cond,
10127               Register rn,
10128               WriteBack write_back,
10129               SRegisterList sreglist) {
10130     Vstmdb(cond, kDataTypeValueNone, rn, write_back, sreglist);
10131   }
Vstmdb(Register rn,WriteBack write_back,SRegisterList sreglist)10132   void Vstmdb(Register rn, WriteBack write_back, SRegisterList sreglist) {
10133     Vstmdb(al, kDataTypeValueNone, rn, write_back, sreglist);
10134   }
10135 
Vstmia(Condition cond,DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)10136   void Vstmia(Condition cond,
10137               DataType dt,
10138               Register rn,
10139               WriteBack write_back,
10140               DRegisterList dreglist) {
10141     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10142     VIXL_ASSERT(!AliasesAvailableScratchRegister(dreglist));
10143     VIXL_ASSERT(allow_macro_instructions_);
10144     VIXL_ASSERT(OutsideITBlock());
10145     MacroEmissionCheckScope guard(this);
10146     ITScope it_scope(this, &cond, guard);
10147     vstmia(cond, dt, rn, write_back, dreglist);
10148   }
Vstmia(DataType dt,Register rn,WriteBack write_back,DRegisterList dreglist)10149   void Vstmia(DataType dt,
10150               Register rn,
10151               WriteBack write_back,
10152               DRegisterList dreglist) {
10153     Vstmia(al, dt, rn, write_back, dreglist);
10154   }
Vstmia(Condition cond,Register rn,WriteBack write_back,DRegisterList dreglist)10155   void Vstmia(Condition cond,
10156               Register rn,
10157               WriteBack write_back,
10158               DRegisterList dreglist) {
10159     Vstmia(cond, kDataTypeValueNone, rn, write_back, dreglist);
10160   }
Vstmia(Register rn,WriteBack write_back,DRegisterList dreglist)10161   void Vstmia(Register rn, WriteBack write_back, DRegisterList dreglist) {
10162     Vstmia(al, kDataTypeValueNone, rn, write_back, dreglist);
10163   }
10164 
Vstmia(Condition cond,DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)10165   void Vstmia(Condition cond,
10166               DataType dt,
10167               Register rn,
10168               WriteBack write_back,
10169               SRegisterList sreglist) {
10170     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10171     VIXL_ASSERT(!AliasesAvailableScratchRegister(sreglist));
10172     VIXL_ASSERT(allow_macro_instructions_);
10173     VIXL_ASSERT(OutsideITBlock());
10174     MacroEmissionCheckScope guard(this);
10175     ITScope it_scope(this, &cond, guard);
10176     vstmia(cond, dt, rn, write_back, sreglist);
10177   }
Vstmia(DataType dt,Register rn,WriteBack write_back,SRegisterList sreglist)10178   void Vstmia(DataType dt,
10179               Register rn,
10180               WriteBack write_back,
10181               SRegisterList sreglist) {
10182     Vstmia(al, dt, rn, write_back, sreglist);
10183   }
Vstmia(Condition cond,Register rn,WriteBack write_back,SRegisterList sreglist)10184   void Vstmia(Condition cond,
10185               Register rn,
10186               WriteBack write_back,
10187               SRegisterList sreglist) {
10188     Vstmia(cond, kDataTypeValueNone, rn, write_back, sreglist);
10189   }
Vstmia(Register rn,WriteBack write_back,SRegisterList sreglist)10190   void Vstmia(Register rn, WriteBack write_back, SRegisterList sreglist) {
10191     Vstmia(al, kDataTypeValueNone, rn, write_back, sreglist);
10192   }
10193 
Vstr(Condition cond,DataType dt,DRegister rd,const MemOperand & operand)10194   void Vstr(Condition cond,
10195             DataType dt,
10196             DRegister rd,
10197             const MemOperand& operand) {
10198     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10199     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10200     VIXL_ASSERT(allow_macro_instructions_);
10201     VIXL_ASSERT(OutsideITBlock());
10202     MacroEmissionCheckScope guard(this);
10203     ITScope it_scope(this, &cond, guard);
10204     vstr(cond, dt, rd, operand);
10205   }
Vstr(DataType dt,DRegister rd,const MemOperand & operand)10206   void Vstr(DataType dt, DRegister rd, const MemOperand& operand) {
10207     Vstr(al, dt, rd, operand);
10208   }
Vstr(Condition cond,DRegister rd,const MemOperand & operand)10209   void Vstr(Condition cond, DRegister rd, const MemOperand& operand) {
10210     Vstr(cond, Untyped64, rd, operand);
10211   }
Vstr(DRegister rd,const MemOperand & operand)10212   void Vstr(DRegister rd, const MemOperand& operand) {
10213     Vstr(al, Untyped64, rd, operand);
10214   }
10215 
Vstr(Condition cond,DataType dt,SRegister rd,const MemOperand & operand)10216   void Vstr(Condition cond,
10217             DataType dt,
10218             SRegister rd,
10219             const MemOperand& operand) {
10220     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10221     VIXL_ASSERT(!AliasesAvailableScratchRegister(operand));
10222     VIXL_ASSERT(allow_macro_instructions_);
10223     VIXL_ASSERT(OutsideITBlock());
10224     MacroEmissionCheckScope guard(this);
10225     ITScope it_scope(this, &cond, guard);
10226     vstr(cond, dt, rd, operand);
10227   }
Vstr(DataType dt,SRegister rd,const MemOperand & operand)10228   void Vstr(DataType dt, SRegister rd, const MemOperand& operand) {
10229     Vstr(al, dt, rd, operand);
10230   }
Vstr(Condition cond,SRegister rd,const MemOperand & operand)10231   void Vstr(Condition cond, SRegister rd, const MemOperand& operand) {
10232     Vstr(cond, Untyped32, rd, operand);
10233   }
Vstr(SRegister rd,const MemOperand & operand)10234   void Vstr(SRegister rd, const MemOperand& operand) {
10235     Vstr(al, Untyped32, rd, operand);
10236   }
10237 
Vsub(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)10238   void Vsub(
10239       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10240     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10241     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10242     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10243     VIXL_ASSERT(allow_macro_instructions_);
10244     VIXL_ASSERT(OutsideITBlock());
10245     MacroEmissionCheckScope guard(this);
10246     ITScope it_scope(this, &cond, guard);
10247     vsub(cond, dt, rd, rn, rm);
10248   }
Vsub(DataType dt,DRegister rd,DRegister rn,DRegister rm)10249   void Vsub(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10250     Vsub(al, dt, rd, rn, rm);
10251   }
10252 
Vsub(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)10253   void Vsub(
10254       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10255     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10256     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10257     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10258     VIXL_ASSERT(allow_macro_instructions_);
10259     VIXL_ASSERT(OutsideITBlock());
10260     MacroEmissionCheckScope guard(this);
10261     ITScope it_scope(this, &cond, guard);
10262     vsub(cond, dt, rd, rn, rm);
10263   }
Vsub(DataType dt,QRegister rd,QRegister rn,QRegister rm)10264   void Vsub(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10265     Vsub(al, dt, rd, rn, rm);
10266   }
10267 
Vsub(Condition cond,DataType dt,SRegister rd,SRegister rn,SRegister rm)10268   void Vsub(
10269       Condition cond, DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10270     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10271     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10272     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10273     VIXL_ASSERT(allow_macro_instructions_);
10274     VIXL_ASSERT(OutsideITBlock());
10275     MacroEmissionCheckScope guard(this);
10276     ITScope it_scope(this, &cond, guard);
10277     vsub(cond, dt, rd, rn, rm);
10278   }
Vsub(DataType dt,SRegister rd,SRegister rn,SRegister rm)10279   void Vsub(DataType dt, SRegister rd, SRegister rn, SRegister rm) {
10280     Vsub(al, dt, rd, rn, rm);
10281   }
10282 
Vsubhn(Condition cond,DataType dt,DRegister rd,QRegister rn,QRegister rm)10283   void Vsubhn(
10284       Condition cond, DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10285     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10286     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10287     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10288     VIXL_ASSERT(allow_macro_instructions_);
10289     VIXL_ASSERT(OutsideITBlock());
10290     MacroEmissionCheckScope guard(this);
10291     ITScope it_scope(this, &cond, guard);
10292     vsubhn(cond, dt, rd, rn, rm);
10293   }
Vsubhn(DataType dt,DRegister rd,QRegister rn,QRegister rm)10294   void Vsubhn(DataType dt, DRegister rd, QRegister rn, QRegister rm) {
10295     Vsubhn(al, dt, rd, rn, rm);
10296   }
10297 
Vsubl(Condition cond,DataType dt,QRegister rd,DRegister rn,DRegister rm)10298   void Vsubl(
10299       Condition cond, DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10300     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10301     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10302     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10303     VIXL_ASSERT(allow_macro_instructions_);
10304     VIXL_ASSERT(OutsideITBlock());
10305     MacroEmissionCheckScope guard(this);
10306     ITScope it_scope(this, &cond, guard);
10307     vsubl(cond, dt, rd, rn, rm);
10308   }
Vsubl(DataType dt,QRegister rd,DRegister rn,DRegister rm)10309   void Vsubl(DataType dt, QRegister rd, DRegister rn, DRegister rm) {
10310     Vsubl(al, dt, rd, rn, rm);
10311   }
10312 
Vsubw(Condition cond,DataType dt,QRegister rd,QRegister rn,DRegister rm)10313   void Vsubw(
10314       Condition cond, DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10315     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10316     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10317     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10318     VIXL_ASSERT(allow_macro_instructions_);
10319     VIXL_ASSERT(OutsideITBlock());
10320     MacroEmissionCheckScope guard(this);
10321     ITScope it_scope(this, &cond, guard);
10322     vsubw(cond, dt, rd, rn, rm);
10323   }
Vsubw(DataType dt,QRegister rd,QRegister rn,DRegister rm)10324   void Vsubw(DataType dt, QRegister rd, QRegister rn, DRegister rm) {
10325     Vsubw(al, dt, rd, rn, rm);
10326   }
10327 
Vswp(Condition cond,DataType dt,DRegister rd,DRegister rm)10328   void Vswp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10329     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10330     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10331     VIXL_ASSERT(allow_macro_instructions_);
10332     VIXL_ASSERT(OutsideITBlock());
10333     MacroEmissionCheckScope guard(this);
10334     ITScope it_scope(this, &cond, guard);
10335     vswp(cond, dt, rd, rm);
10336   }
Vswp(DataType dt,DRegister rd,DRegister rm)10337   void Vswp(DataType dt, DRegister rd, DRegister rm) { Vswp(al, dt, rd, rm); }
Vswp(Condition cond,DRegister rd,DRegister rm)10338   void Vswp(Condition cond, DRegister rd, DRegister rm) {
10339     Vswp(cond, kDataTypeValueNone, rd, rm);
10340   }
Vswp(DRegister rd,DRegister rm)10341   void Vswp(DRegister rd, DRegister rm) {
10342     Vswp(al, kDataTypeValueNone, rd, rm);
10343   }
10344 
Vswp(Condition cond,DataType dt,QRegister rd,QRegister rm)10345   void Vswp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10346     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10347     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10348     VIXL_ASSERT(allow_macro_instructions_);
10349     VIXL_ASSERT(OutsideITBlock());
10350     MacroEmissionCheckScope guard(this);
10351     ITScope it_scope(this, &cond, guard);
10352     vswp(cond, dt, rd, rm);
10353   }
Vswp(DataType dt,QRegister rd,QRegister rm)10354   void Vswp(DataType dt, QRegister rd, QRegister rm) { Vswp(al, dt, rd, rm); }
Vswp(Condition cond,QRegister rd,QRegister rm)10355   void Vswp(Condition cond, QRegister rd, QRegister rm) {
10356     Vswp(cond, kDataTypeValueNone, rd, rm);
10357   }
Vswp(QRegister rd,QRegister rm)10358   void Vswp(QRegister rd, QRegister rm) {
10359     Vswp(al, kDataTypeValueNone, rd, rm);
10360   }
10361 
Vtbl(Condition cond,DataType dt,DRegister rd,const NeonRegisterList & nreglist,DRegister rm)10362   void Vtbl(Condition cond,
10363             DataType dt,
10364             DRegister rd,
10365             const NeonRegisterList& nreglist,
10366             DRegister rm) {
10367     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10368     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10369     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10370     VIXL_ASSERT(allow_macro_instructions_);
10371     VIXL_ASSERT(OutsideITBlock());
10372     MacroEmissionCheckScope guard(this);
10373     ITScope it_scope(this, &cond, guard);
10374     vtbl(cond, dt, rd, nreglist, rm);
10375   }
Vtbl(DataType dt,DRegister rd,const NeonRegisterList & nreglist,DRegister rm)10376   void Vtbl(DataType dt,
10377             DRegister rd,
10378             const NeonRegisterList& nreglist,
10379             DRegister rm) {
10380     Vtbl(al, dt, rd, nreglist, rm);
10381   }
10382 
Vtbx(Condition cond,DataType dt,DRegister rd,const NeonRegisterList & nreglist,DRegister rm)10383   void Vtbx(Condition cond,
10384             DataType dt,
10385             DRegister rd,
10386             const NeonRegisterList& nreglist,
10387             DRegister rm) {
10388     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10389     VIXL_ASSERT(!AliasesAvailableScratchRegister(nreglist));
10390     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10391     VIXL_ASSERT(allow_macro_instructions_);
10392     VIXL_ASSERT(OutsideITBlock());
10393     MacroEmissionCheckScope guard(this);
10394     ITScope it_scope(this, &cond, guard);
10395     vtbx(cond, dt, rd, nreglist, rm);
10396   }
Vtbx(DataType dt,DRegister rd,const NeonRegisterList & nreglist,DRegister rm)10397   void Vtbx(DataType dt,
10398             DRegister rd,
10399             const NeonRegisterList& nreglist,
10400             DRegister rm) {
10401     Vtbx(al, dt, rd, nreglist, rm);
10402   }
10403 
Vtrn(Condition cond,DataType dt,DRegister rd,DRegister rm)10404   void Vtrn(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10405     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10406     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10407     VIXL_ASSERT(allow_macro_instructions_);
10408     VIXL_ASSERT(OutsideITBlock());
10409     MacroEmissionCheckScope guard(this);
10410     ITScope it_scope(this, &cond, guard);
10411     vtrn(cond, dt, rd, rm);
10412   }
Vtrn(DataType dt,DRegister rd,DRegister rm)10413   void Vtrn(DataType dt, DRegister rd, DRegister rm) { Vtrn(al, dt, rd, rm); }
10414 
Vtrn(Condition cond,DataType dt,QRegister rd,QRegister rm)10415   void Vtrn(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10416     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10417     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10418     VIXL_ASSERT(allow_macro_instructions_);
10419     VIXL_ASSERT(OutsideITBlock());
10420     MacroEmissionCheckScope guard(this);
10421     ITScope it_scope(this, &cond, guard);
10422     vtrn(cond, dt, rd, rm);
10423   }
Vtrn(DataType dt,QRegister rd,QRegister rm)10424   void Vtrn(DataType dt, QRegister rd, QRegister rm) { Vtrn(al, dt, rd, rm); }
10425 
Vtst(Condition cond,DataType dt,DRegister rd,DRegister rn,DRegister rm)10426   void Vtst(
10427       Condition cond, DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10428     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10429     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10430     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10431     VIXL_ASSERT(allow_macro_instructions_);
10432     VIXL_ASSERT(OutsideITBlock());
10433     MacroEmissionCheckScope guard(this);
10434     ITScope it_scope(this, &cond, guard);
10435     vtst(cond, dt, rd, rn, rm);
10436   }
Vtst(DataType dt,DRegister rd,DRegister rn,DRegister rm)10437   void Vtst(DataType dt, DRegister rd, DRegister rn, DRegister rm) {
10438     Vtst(al, dt, rd, rn, rm);
10439   }
10440 
Vtst(Condition cond,DataType dt,QRegister rd,QRegister rn,QRegister rm)10441   void Vtst(
10442       Condition cond, DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10443     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10444     VIXL_ASSERT(!AliasesAvailableScratchRegister(rn));
10445     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10446     VIXL_ASSERT(allow_macro_instructions_);
10447     VIXL_ASSERT(OutsideITBlock());
10448     MacroEmissionCheckScope guard(this);
10449     ITScope it_scope(this, &cond, guard);
10450     vtst(cond, dt, rd, rn, rm);
10451   }
Vtst(DataType dt,QRegister rd,QRegister rn,QRegister rm)10452   void Vtst(DataType dt, QRegister rd, QRegister rn, QRegister rm) {
10453     Vtst(al, dt, rd, rn, rm);
10454   }
10455 
Vuzp(Condition cond,DataType dt,DRegister rd,DRegister rm)10456   void Vuzp(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10457     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10458     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10459     VIXL_ASSERT(allow_macro_instructions_);
10460     VIXL_ASSERT(OutsideITBlock());
10461     MacroEmissionCheckScope guard(this);
10462     ITScope it_scope(this, &cond, guard);
10463     vuzp(cond, dt, rd, rm);
10464   }
Vuzp(DataType dt,DRegister rd,DRegister rm)10465   void Vuzp(DataType dt, DRegister rd, DRegister rm) { Vuzp(al, dt, rd, rm); }
10466 
Vuzp(Condition cond,DataType dt,QRegister rd,QRegister rm)10467   void Vuzp(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10468     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10469     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10470     VIXL_ASSERT(allow_macro_instructions_);
10471     VIXL_ASSERT(OutsideITBlock());
10472     MacroEmissionCheckScope guard(this);
10473     ITScope it_scope(this, &cond, guard);
10474     vuzp(cond, dt, rd, rm);
10475   }
Vuzp(DataType dt,QRegister rd,QRegister rm)10476   void Vuzp(DataType dt, QRegister rd, QRegister rm) { Vuzp(al, dt, rd, rm); }
10477 
Vzip(Condition cond,DataType dt,DRegister rd,DRegister rm)10478   void Vzip(Condition cond, DataType dt, DRegister rd, DRegister rm) {
10479     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10480     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10481     VIXL_ASSERT(allow_macro_instructions_);
10482     VIXL_ASSERT(OutsideITBlock());
10483     MacroEmissionCheckScope guard(this);
10484     ITScope it_scope(this, &cond, guard);
10485     vzip(cond, dt, rd, rm);
10486   }
Vzip(DataType dt,DRegister rd,DRegister rm)10487   void Vzip(DataType dt, DRegister rd, DRegister rm) { Vzip(al, dt, rd, rm); }
10488 
Vzip(Condition cond,DataType dt,QRegister rd,QRegister rm)10489   void Vzip(Condition cond, DataType dt, QRegister rd, QRegister rm) {
10490     VIXL_ASSERT(!AliasesAvailableScratchRegister(rd));
10491     VIXL_ASSERT(!AliasesAvailableScratchRegister(rm));
10492     VIXL_ASSERT(allow_macro_instructions_);
10493     VIXL_ASSERT(OutsideITBlock());
10494     MacroEmissionCheckScope guard(this);
10495     ITScope it_scope(this, &cond, guard);
10496     vzip(cond, dt, rd, rm);
10497   }
Vzip(DataType dt,QRegister rd,QRegister rm)10498   void Vzip(DataType dt, QRegister rd, QRegister rm) { Vzip(al, dt, rd, rm); }
10499 
Yield(Condition cond)10500   void Yield(Condition cond) {
10501     VIXL_ASSERT(allow_macro_instructions_);
10502     VIXL_ASSERT(OutsideITBlock());
10503     MacroEmissionCheckScope guard(this);
10504     ITScope it_scope(this, &cond, guard);
10505     yield(cond);
10506   }
Yield()10507   void Yield() { Yield(al); }
Vabs(Condition cond,VRegister rd,VRegister rm)10508   void Vabs(Condition cond, VRegister rd, VRegister rm) {
10509     VIXL_ASSERT(rd.IsS() || rd.IsD());
10510     VIXL_ASSERT(rd.GetType() == rm.GetType());
10511     if (rd.IsS()) {
10512       Vabs(cond, F32, rd.S(), rm.S());
10513     } else {
10514       Vabs(cond, F64, rd.D(), rm.D());
10515     }
10516   }
Vabs(VRegister rd,VRegister rm)10517   void Vabs(VRegister rd, VRegister rm) { Vabs(al, rd, rm); }
Vadd(Condition cond,VRegister rd,VRegister rn,VRegister rm)10518   void Vadd(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10519     VIXL_ASSERT(rd.IsS() || rd.IsD());
10520     VIXL_ASSERT(rd.GetType() == rn.GetType());
10521     VIXL_ASSERT(rd.GetType() == rm.GetType());
10522     if (rd.IsS()) {
10523       Vadd(cond, F32, rd.S(), rn.S(), rm.S());
10524     } else {
10525       Vadd(cond, F64, rd.D(), rn.D(), rm.D());
10526     }
10527   }
Vadd(VRegister rd,VRegister rn,VRegister rm)10528   void Vadd(VRegister rd, VRegister rn, VRegister rm) { Vadd(al, rd, rn, rm); }
Vcmp(Condition cond,VRegister rd,VRegister rm)10529   void Vcmp(Condition cond, VRegister rd, VRegister rm) {
10530     VIXL_ASSERT(rd.IsS() || rd.IsD());
10531     VIXL_ASSERT(rd.GetType() == rm.GetType());
10532     if (rd.IsS()) {
10533       Vcmp(cond, F32, rd.S(), rm.S());
10534     } else {
10535       Vcmp(cond, F64, rd.D(), rm.D());
10536     }
10537   }
Vcmp(VRegister rd,VRegister rm)10538   void Vcmp(VRegister rd, VRegister rm) { Vcmp(al, rd, rm); }
Vcmpe(Condition cond,VRegister rd,VRegister rm)10539   void Vcmpe(Condition cond, VRegister rd, VRegister rm) {
10540     VIXL_ASSERT(rd.IsS() || rd.IsD());
10541     VIXL_ASSERT(rd.GetType() == rm.GetType());
10542     if (rd.IsS()) {
10543       Vcmpe(cond, F32, rd.S(), rm.S());
10544     } else {
10545       Vcmpe(cond, F64, rd.D(), rm.D());
10546     }
10547   }
Vcmpe(VRegister rd,VRegister rm)10548   void Vcmpe(VRegister rd, VRegister rm) { Vcmpe(al, rd, rm); }
Vdiv(Condition cond,VRegister rd,VRegister rn,VRegister rm)10549   void Vdiv(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10550     VIXL_ASSERT(rd.IsS() || rd.IsD());
10551     VIXL_ASSERT(rd.GetType() == rn.GetType());
10552     VIXL_ASSERT(rd.GetType() == rm.GetType());
10553     if (rd.IsS()) {
10554       Vdiv(cond, F32, rd.S(), rn.S(), rm.S());
10555     } else {
10556       Vdiv(cond, F64, rd.D(), rn.D(), rm.D());
10557     }
10558   }
Vdiv(VRegister rd,VRegister rn,VRegister rm)10559   void Vdiv(VRegister rd, VRegister rn, VRegister rm) { Vdiv(al, rd, rn, rm); }
Vfma(Condition cond,VRegister rd,VRegister rn,VRegister rm)10560   void Vfma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10561     VIXL_ASSERT(rd.IsS() || rd.IsD());
10562     VIXL_ASSERT(rd.GetType() == rn.GetType());
10563     VIXL_ASSERT(rd.GetType() == rm.GetType());
10564     if (rd.IsS()) {
10565       Vfma(cond, F32, rd.S(), rn.S(), rm.S());
10566     } else {
10567       Vfma(cond, F64, rd.D(), rn.D(), rm.D());
10568     }
10569   }
Vfma(VRegister rd,VRegister rn,VRegister rm)10570   void Vfma(VRegister rd, VRegister rn, VRegister rm) { Vfma(al, rd, rn, rm); }
Vfms(Condition cond,VRegister rd,VRegister rn,VRegister rm)10571   void Vfms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10572     VIXL_ASSERT(rd.IsS() || rd.IsD());
10573     VIXL_ASSERT(rd.GetType() == rn.GetType());
10574     VIXL_ASSERT(rd.GetType() == rm.GetType());
10575     if (rd.IsS()) {
10576       Vfms(cond, F32, rd.S(), rn.S(), rm.S());
10577     } else {
10578       Vfms(cond, F64, rd.D(), rn.D(), rm.D());
10579     }
10580   }
Vfms(VRegister rd,VRegister rn,VRegister rm)10581   void Vfms(VRegister rd, VRegister rn, VRegister rm) { Vfms(al, rd, rn, rm); }
Vfnma(Condition cond,VRegister rd,VRegister rn,VRegister rm)10582   void Vfnma(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10583     VIXL_ASSERT(rd.IsS() || rd.IsD());
10584     VIXL_ASSERT(rd.GetType() == rn.GetType());
10585     VIXL_ASSERT(rd.GetType() == rm.GetType());
10586     if (rd.IsS()) {
10587       Vfnma(cond, F32, rd.S(), rn.S(), rm.S());
10588     } else {
10589       Vfnma(cond, F64, rd.D(), rn.D(), rm.D());
10590     }
10591   }
Vfnma(VRegister rd,VRegister rn,VRegister rm)10592   void Vfnma(VRegister rd, VRegister rn, VRegister rm) {
10593     Vfnma(al, rd, rn, rm);
10594   }
Vfnms(Condition cond,VRegister rd,VRegister rn,VRegister rm)10595   void Vfnms(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10596     VIXL_ASSERT(rd.IsS() || rd.IsD());
10597     VIXL_ASSERT(rd.GetType() == rn.GetType());
10598     VIXL_ASSERT(rd.GetType() == rm.GetType());
10599     if (rd.IsS()) {
10600       Vfnms(cond, F32, rd.S(), rn.S(), rm.S());
10601     } else {
10602       Vfnms(cond, F64, rd.D(), rn.D(), rm.D());
10603     }
10604   }
Vfnms(VRegister rd,VRegister rn,VRegister rm)10605   void Vfnms(VRegister rd, VRegister rn, VRegister rm) {
10606     Vfnms(al, rd, rn, rm);
10607   }
Vmaxnm(VRegister rd,VRegister rn,VRegister rm)10608   void Vmaxnm(VRegister rd, VRegister rn, VRegister rm) {
10609     VIXL_ASSERT(rd.IsS() || rd.IsD());
10610     VIXL_ASSERT(rd.GetType() == rn.GetType());
10611     VIXL_ASSERT(rd.GetType() == rm.GetType());
10612     if (rd.IsS()) {
10613       Vmaxnm(F32, rd.S(), rn.S(), rm.S());
10614     } else {
10615       Vmaxnm(F64, rd.D(), rn.D(), rm.D());
10616     }
10617   }
Vminnm(VRegister rd,VRegister rn,VRegister rm)10618   void Vminnm(VRegister rd, VRegister rn, VRegister rm) {
10619     VIXL_ASSERT(rd.IsS() || rd.IsD());
10620     VIXL_ASSERT(rd.GetType() == rn.GetType());
10621     VIXL_ASSERT(rd.GetType() == rm.GetType());
10622     if (rd.IsS()) {
10623       Vminnm(F32, rd.S(), rn.S(), rm.S());
10624     } else {
10625       Vminnm(F64, rd.D(), rn.D(), rm.D());
10626     }
10627   }
Vmla(Condition cond,VRegister rd,VRegister rn,VRegister rm)10628   void Vmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10629     VIXL_ASSERT(rd.IsS() || rd.IsD());
10630     VIXL_ASSERT(rd.GetType() == rn.GetType());
10631     VIXL_ASSERT(rd.GetType() == rm.GetType());
10632     if (rd.IsS()) {
10633       Vmla(cond, F32, rd.S(), rn.S(), rm.S());
10634     } else {
10635       Vmla(cond, F64, rd.D(), rn.D(), rm.D());
10636     }
10637   }
Vmla(VRegister rd,VRegister rn,VRegister rm)10638   void Vmla(VRegister rd, VRegister rn, VRegister rm) { Vmla(al, rd, rn, rm); }
Vmls(Condition cond,VRegister rd,VRegister rn,VRegister rm)10639   void Vmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10640     VIXL_ASSERT(rd.IsS() || rd.IsD());
10641     VIXL_ASSERT(rd.GetType() == rn.GetType());
10642     VIXL_ASSERT(rd.GetType() == rm.GetType());
10643     if (rd.IsS()) {
10644       Vmls(cond, F32, rd.S(), rn.S(), rm.S());
10645     } else {
10646       Vmls(cond, F64, rd.D(), rn.D(), rm.D());
10647     }
10648   }
Vmls(VRegister rd,VRegister rn,VRegister rm)10649   void Vmls(VRegister rd, VRegister rn, VRegister rm) { Vmls(al, rd, rn, rm); }
Vmov(Condition cond,VRegister rd,VRegister rm)10650   void Vmov(Condition cond, VRegister rd, VRegister rm) {
10651     VIXL_ASSERT(rd.IsS() || rd.IsD());
10652     VIXL_ASSERT(rd.GetType() == rm.GetType());
10653     if (rd.IsS()) {
10654       Vmov(cond, F32, rd.S(), rm.S());
10655     } else {
10656       Vmov(cond, F64, rd.D(), rm.D());
10657     }
10658   }
Vmov(VRegister rd,VRegister rm)10659   void Vmov(VRegister rd, VRegister rm) { Vmov(al, rd, rm); }
Vmul(Condition cond,VRegister rd,VRegister rn,VRegister rm)10660   void Vmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10661     VIXL_ASSERT(rd.IsS() || rd.IsD());
10662     VIXL_ASSERT(rd.GetType() == rn.GetType());
10663     VIXL_ASSERT(rd.GetType() == rm.GetType());
10664     if (rd.IsS()) {
10665       Vmul(cond, F32, rd.S(), rn.S(), rm.S());
10666     } else {
10667       Vmul(cond, F64, rd.D(), rn.D(), rm.D());
10668     }
10669   }
Vmul(VRegister rd,VRegister rn,VRegister rm)10670   void Vmul(VRegister rd, VRegister rn, VRegister rm) { Vmul(al, rd, rn, rm); }
Vneg(Condition cond,VRegister rd,VRegister rm)10671   void Vneg(Condition cond, VRegister rd, VRegister rm) {
10672     VIXL_ASSERT(rd.IsS() || rd.IsD());
10673     VIXL_ASSERT(rd.GetType() == rm.GetType());
10674     if (rd.IsS()) {
10675       Vneg(cond, F32, rd.S(), rm.S());
10676     } else {
10677       Vneg(cond, F64, rd.D(), rm.D());
10678     }
10679   }
Vneg(VRegister rd,VRegister rm)10680   void Vneg(VRegister rd, VRegister rm) { Vneg(al, rd, rm); }
Vnmla(Condition cond,VRegister rd,VRegister rn,VRegister rm)10681   void Vnmla(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10682     VIXL_ASSERT(rd.IsS() || rd.IsD());
10683     VIXL_ASSERT(rd.GetType() == rn.GetType());
10684     VIXL_ASSERT(rd.GetType() == rm.GetType());
10685     if (rd.IsS()) {
10686       Vnmla(cond, F32, rd.S(), rn.S(), rm.S());
10687     } else {
10688       Vnmla(cond, F64, rd.D(), rn.D(), rm.D());
10689     }
10690   }
Vnmla(VRegister rd,VRegister rn,VRegister rm)10691   void Vnmla(VRegister rd, VRegister rn, VRegister rm) {
10692     Vnmla(al, rd, rn, rm);
10693   }
Vnmls(Condition cond,VRegister rd,VRegister rn,VRegister rm)10694   void Vnmls(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10695     VIXL_ASSERT(rd.IsS() || rd.IsD());
10696     VIXL_ASSERT(rd.GetType() == rn.GetType());
10697     VIXL_ASSERT(rd.GetType() == rm.GetType());
10698     if (rd.IsS()) {
10699       Vnmls(cond, F32, rd.S(), rn.S(), rm.S());
10700     } else {
10701       Vnmls(cond, F64, rd.D(), rn.D(), rm.D());
10702     }
10703   }
Vnmls(VRegister rd,VRegister rn,VRegister rm)10704   void Vnmls(VRegister rd, VRegister rn, VRegister rm) {
10705     Vnmls(al, rd, rn, rm);
10706   }
Vnmul(Condition cond,VRegister rd,VRegister rn,VRegister rm)10707   void Vnmul(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10708     VIXL_ASSERT(rd.IsS() || rd.IsD());
10709     VIXL_ASSERT(rd.GetType() == rn.GetType());
10710     VIXL_ASSERT(rd.GetType() == rm.GetType());
10711     if (rd.IsS()) {
10712       Vnmul(cond, F32, rd.S(), rn.S(), rm.S());
10713     } else {
10714       Vnmul(cond, F64, rd.D(), rn.D(), rm.D());
10715     }
10716   }
Vnmul(VRegister rd,VRegister rn,VRegister rm)10717   void Vnmul(VRegister rd, VRegister rn, VRegister rm) {
10718     Vnmul(al, rd, rn, rm);
10719   }
Vrinta(VRegister rd,VRegister rm)10720   void Vrinta(VRegister rd, VRegister rm) {
10721     VIXL_ASSERT(rd.IsS() || rd.IsD());
10722     VIXL_ASSERT(rd.GetType() == rm.GetType());
10723     if (rd.IsS()) {
10724       Vrinta(F32, rd.S(), rm.S());
10725     } else {
10726       Vrinta(F64, rd.D(), rm.D());
10727     }
10728   }
Vrintm(VRegister rd,VRegister rm)10729   void Vrintm(VRegister rd, VRegister rm) {
10730     VIXL_ASSERT(rd.IsS() || rd.IsD());
10731     VIXL_ASSERT(rd.GetType() == rm.GetType());
10732     if (rd.IsS()) {
10733       Vrintm(F32, rd.S(), rm.S());
10734     } else {
10735       Vrintm(F64, rd.D(), rm.D());
10736     }
10737   }
Vrintn(VRegister rd,VRegister rm)10738   void Vrintn(VRegister rd, VRegister rm) {
10739     VIXL_ASSERT(rd.IsS() || rd.IsD());
10740     VIXL_ASSERT(rd.GetType() == rm.GetType());
10741     if (rd.IsS()) {
10742       Vrintn(F32, rd.S(), rm.S());
10743     } else {
10744       Vrintn(F64, rd.D(), rm.D());
10745     }
10746   }
Vrintp(VRegister rd,VRegister rm)10747   void Vrintp(VRegister rd, VRegister rm) {
10748     VIXL_ASSERT(rd.IsS() || rd.IsD());
10749     VIXL_ASSERT(rd.GetType() == rm.GetType());
10750     if (rd.IsS()) {
10751       Vrintp(F32, rd.S(), rm.S());
10752     } else {
10753       Vrintp(F64, rd.D(), rm.D());
10754     }
10755   }
Vrintr(Condition cond,VRegister rd,VRegister rm)10756   void Vrintr(Condition cond, VRegister rd, VRegister rm) {
10757     VIXL_ASSERT(rd.IsS() || rd.IsD());
10758     VIXL_ASSERT(rd.GetType() == rm.GetType());
10759     if (rd.IsS()) {
10760       Vrintr(cond, F32, rd.S(), rm.S());
10761     } else {
10762       Vrintr(cond, F64, rd.D(), rm.D());
10763     }
10764   }
Vrintr(VRegister rd,VRegister rm)10765   void Vrintr(VRegister rd, VRegister rm) { Vrintr(al, rd, rm); }
Vrintx(Condition cond,VRegister rd,VRegister rm)10766   void Vrintx(Condition cond, VRegister rd, VRegister rm) {
10767     VIXL_ASSERT(rd.IsS() || rd.IsD());
10768     VIXL_ASSERT(rd.GetType() == rm.GetType());
10769     if (rd.IsS()) {
10770       Vrintx(cond, F32, rd.S(), rm.S());
10771     } else {
10772       Vrintx(cond, F64, rd.D(), rm.D());
10773     }
10774   }
Vrintx(VRegister rd,VRegister rm)10775   void Vrintx(VRegister rd, VRegister rm) { Vrintx(al, rd, rm); }
Vrintz(Condition cond,VRegister rd,VRegister rm)10776   void Vrintz(Condition cond, VRegister rd, VRegister rm) {
10777     VIXL_ASSERT(rd.IsS() || rd.IsD());
10778     VIXL_ASSERT(rd.GetType() == rm.GetType());
10779     if (rd.IsS()) {
10780       Vrintz(cond, F32, rd.S(), rm.S());
10781     } else {
10782       Vrintz(cond, F64, rd.D(), rm.D());
10783     }
10784   }
Vrintz(VRegister rd,VRegister rm)10785   void Vrintz(VRegister rd, VRegister rm) { Vrintz(al, rd, rm); }
Vseleq(VRegister rd,VRegister rn,VRegister rm)10786   void Vseleq(VRegister rd, VRegister rn, VRegister rm) {
10787     VIXL_ASSERT(rd.IsS() || rd.IsD());
10788     VIXL_ASSERT(rd.GetType() == rn.GetType());
10789     VIXL_ASSERT(rd.GetType() == rm.GetType());
10790     if (rd.IsS()) {
10791       Vseleq(F32, rd.S(), rn.S(), rm.S());
10792     } else {
10793       Vseleq(F64, rd.D(), rn.D(), rm.D());
10794     }
10795   }
Vselge(VRegister rd,VRegister rn,VRegister rm)10796   void Vselge(VRegister rd, VRegister rn, VRegister rm) {
10797     VIXL_ASSERT(rd.IsS() || rd.IsD());
10798     VIXL_ASSERT(rd.GetType() == rn.GetType());
10799     VIXL_ASSERT(rd.GetType() == rm.GetType());
10800     if (rd.IsS()) {
10801       Vselge(F32, rd.S(), rn.S(), rm.S());
10802     } else {
10803       Vselge(F64, rd.D(), rn.D(), rm.D());
10804     }
10805   }
Vselgt(VRegister rd,VRegister rn,VRegister rm)10806   void Vselgt(VRegister rd, VRegister rn, VRegister rm) {
10807     VIXL_ASSERT(rd.IsS() || rd.IsD());
10808     VIXL_ASSERT(rd.GetType() == rn.GetType());
10809     VIXL_ASSERT(rd.GetType() == rm.GetType());
10810     if (rd.IsS()) {
10811       Vselgt(F32, rd.S(), rn.S(), rm.S());
10812     } else {
10813       Vselgt(F64, rd.D(), rn.D(), rm.D());
10814     }
10815   }
Vselvs(VRegister rd,VRegister rn,VRegister rm)10816   void Vselvs(VRegister rd, VRegister rn, VRegister rm) {
10817     VIXL_ASSERT(rd.IsS() || rd.IsD());
10818     VIXL_ASSERT(rd.GetType() == rn.GetType());
10819     VIXL_ASSERT(rd.GetType() == rm.GetType());
10820     if (rd.IsS()) {
10821       Vselvs(F32, rd.S(), rn.S(), rm.S());
10822     } else {
10823       Vselvs(F64, rd.D(), rn.D(), rm.D());
10824     }
10825   }
Vsqrt(Condition cond,VRegister rd,VRegister rm)10826   void Vsqrt(Condition cond, VRegister rd, VRegister rm) {
10827     VIXL_ASSERT(rd.IsS() || rd.IsD());
10828     VIXL_ASSERT(rd.GetType() == rm.GetType());
10829     if (rd.IsS()) {
10830       Vsqrt(cond, F32, rd.S(), rm.S());
10831     } else {
10832       Vsqrt(cond, F64, rd.D(), rm.D());
10833     }
10834   }
Vsqrt(VRegister rd,VRegister rm)10835   void Vsqrt(VRegister rd, VRegister rm) { Vsqrt(al, rd, rm); }
Vsub(Condition cond,VRegister rd,VRegister rn,VRegister rm)10836   void Vsub(Condition cond, VRegister rd, VRegister rn, VRegister rm) {
10837     VIXL_ASSERT(rd.IsS() || rd.IsD());
10838     VIXL_ASSERT(rd.GetType() == rn.GetType());
10839     VIXL_ASSERT(rd.GetType() == rm.GetType());
10840     if (rd.IsS()) {
10841       Vsub(cond, F32, rd.S(), rn.S(), rm.S());
10842     } else {
10843       Vsub(cond, F64, rd.D(), rn.D(), rm.D());
10844     }
10845   }
Vsub(VRegister rd,VRegister rn,VRegister rm)10846   void Vsub(VRegister rd, VRegister rn, VRegister rm) { Vsub(al, rd, rn, rm); }
10847   // End of generated code.
10848 
AllowUnpredictable()10849   virtual bool AllowUnpredictable() VIXL_OVERRIDE {
10850     VIXL_ABORT_WITH_MSG("Unpredictable instruction.\n");
10851     return false;
10852   }
AllowStronglyDiscouraged()10853   virtual bool AllowStronglyDiscouraged() VIXL_OVERRIDE {
10854     VIXL_ABORT_WITH_MSG(
10855         "ARM strongly recommends to not use this instruction.\n");
10856     return false;
10857   }
10858   // Old syntax of vrint instructions.
10859   VIXL_DEPRECATED(
10860       "void Vrinta(DataType dt, DRegister rd, DRegister rm)",
Vrinta(DataType dt1,DataType dt2,DRegister rd,DRegister rm)10861       void Vrinta(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
10862     USE(dt2);
10863     VIXL_ASSERT(dt1.Is(dt2));
10864     return Vrinta(dt1, rd, rm);
10865   }
10866   VIXL_DEPRECATED(
10867       "void Vrinta(DataType dt, QRegister rd, QRegister rm)",
Vrinta(DataType dt1,DataType dt2,QRegister rd,QRegister rm)10868       void Vrinta(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
10869     USE(dt2);
10870     VIXL_ASSERT(dt1.Is(dt2));
10871     return Vrinta(dt1, rd, rm);
10872   }
10873   VIXL_DEPRECATED(
10874       "void Vrinta(DataType dt, SRegister rd, SRegister rm)",
Vrinta(DataType dt1,DataType dt2,SRegister rd,SRegister rm)10875       void Vrinta(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
10876     USE(dt2);
10877     VIXL_ASSERT(dt1.Is(dt2));
10878     return Vrinta(dt1, rd, rm);
10879   }
10880 
10881   VIXL_DEPRECATED(
10882       "void Vrintm(DataType dt, DRegister rd, DRegister rm)",
Vrintm(DataType dt1,DataType dt2,DRegister rd,DRegister rm)10883       void Vrintm(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
10884     USE(dt2);
10885     VIXL_ASSERT(dt1.Is(dt2));
10886     return Vrintm(dt1, rd, rm);
10887   }
10888   VIXL_DEPRECATED(
10889       "void Vrintm(DataType dt, QRegister rd, QRegister rm)",
Vrintm(DataType dt1,DataType dt2,QRegister rd,QRegister rm)10890       void Vrintm(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
10891     USE(dt2);
10892     VIXL_ASSERT(dt1.Is(dt2));
10893     return Vrintm(dt1, rd, rm);
10894   }
10895   VIXL_DEPRECATED(
10896       "void Vrintm(DataType dt, SRegister rd, SRegister rm)",
Vrintm(DataType dt1,DataType dt2,SRegister rd,SRegister rm)10897       void Vrintm(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
10898     USE(dt2);
10899     VIXL_ASSERT(dt1.Is(dt2));
10900     return Vrintm(dt1, rd, rm);
10901   }
10902 
10903   VIXL_DEPRECATED(
10904       "void Vrintn(DataType dt, DRegister rd, DRegister rm)",
Vrintn(DataType dt1,DataType dt2,DRegister rd,DRegister rm)10905       void Vrintn(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
10906     USE(dt2);
10907     VIXL_ASSERT(dt1.Is(dt2));
10908     return Vrintn(dt1, rd, rm);
10909   }
10910   VIXL_DEPRECATED(
10911       "void Vrintn(DataType dt, QRegister rd, QRegister rm)",
Vrintn(DataType dt1,DataType dt2,QRegister rd,QRegister rm)10912       void Vrintn(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
10913     USE(dt2);
10914     VIXL_ASSERT(dt1.Is(dt2));
10915     return Vrintn(dt1, rd, rm);
10916   }
10917   VIXL_DEPRECATED(
10918       "void Vrintn(DataType dt, SRegister rd, SRegister rm)",
Vrintn(DataType dt1,DataType dt2,SRegister rd,SRegister rm)10919       void Vrintn(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
10920     USE(dt2);
10921     VIXL_ASSERT(dt1.Is(dt2));
10922     return Vrintn(dt1, rd, rm);
10923   }
10924 
10925   VIXL_DEPRECATED(
10926       "void Vrintp(DataType dt, DRegister rd, DRegister rm)",
Vrintp(DataType dt1,DataType dt2,DRegister rd,DRegister rm)10927       void Vrintp(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
10928     USE(dt2);
10929     VIXL_ASSERT(dt1.Is(dt2));
10930     return Vrintp(dt1, rd, rm);
10931   }
10932   VIXL_DEPRECATED(
10933       "void Vrintp(DataType dt, QRegister rd, QRegister rm)",
Vrintp(DataType dt1,DataType dt2,QRegister rd,QRegister rm)10934       void Vrintp(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
10935     USE(dt2);
10936     VIXL_ASSERT(dt1.Is(dt2));
10937     return Vrintp(dt1, rd, rm);
10938   }
10939   VIXL_DEPRECATED(
10940       "void Vrintp(DataType dt, SRegister rd, SRegister rm)",
Vrintp(DataType dt1,DataType dt2,SRegister rd,SRegister rm)10941       void Vrintp(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
10942     USE(dt2);
10943     VIXL_ASSERT(dt1.Is(dt2));
10944     return Vrintp(dt1, rd, rm);
10945   }
10946 
10947   VIXL_DEPRECATED(
10948       "void Vrintr(Condition cond, DataType dt, SRegister rd, SRegister rm)",
Vrintr(Condition cond,DataType dt1,DataType dt2,SRegister rd,SRegister rm)10949       void Vrintr(Condition cond,
10950                   DataType dt1,
10951                   DataType dt2,
10952                   SRegister rd,
10953                   SRegister rm)) {
10954     USE(dt2);
10955     VIXL_ASSERT(dt1.Is(dt2));
10956     return Vrintr(cond, dt1, rd, rm);
10957   }
10958   VIXL_DEPRECATED(
10959       "void Vrintr(DataType dt, SRegister rd, SRegister rm)",
Vrintr(DataType dt1,DataType dt2,SRegister rd,SRegister rm)10960       void Vrintr(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
10961     USE(dt2);
10962     VIXL_ASSERT(dt1.Is(dt2));
10963     return Vrintr(dt1, rd, rm);
10964   }
10965 
10966   VIXL_DEPRECATED(
10967       "void Vrintr(Condition cond, DataType dt, DRegister rd, DRegister rm)",
Vrintr(Condition cond,DataType dt1,DataType dt2,DRegister rd,DRegister rm)10968       void Vrintr(Condition cond,
10969                   DataType dt1,
10970                   DataType dt2,
10971                   DRegister rd,
10972                   DRegister rm)) {
10973     USE(dt2);
10974     VIXL_ASSERT(dt1.Is(dt2));
10975     return Vrintr(cond, dt1, rd, rm);
10976   }
10977   VIXL_DEPRECATED(
10978       "void Vrintr(DataType dt, DRegister rd, DRegister rm)",
Vrintr(DataType dt1,DataType dt2,DRegister rd,DRegister rm)10979       void Vrintr(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
10980     USE(dt2);
10981     VIXL_ASSERT(dt1.Is(dt2));
10982     return Vrintr(dt1, rd, rm);
10983   }
10984 
10985   VIXL_DEPRECATED(
10986       "void Vrintx(Condition cond, DataType dt, DRegister rd, DRegister rm)",
Vrintx(Condition cond,DataType dt1,DataType dt2,DRegister rd,DRegister rm)10987       void Vrintx(Condition cond,
10988                   DataType dt1,
10989                   DataType dt2,
10990                   DRegister rd,
10991                   DRegister rm)) {
10992     USE(dt2);
10993     VIXL_ASSERT(dt1.Is(dt2));
10994     return Vrintx(cond, dt1, rd, rm);
10995   }
10996   VIXL_DEPRECATED(
10997       "void Vrintx(DataType dt, DRegister rd, DRegister rm)",
Vrintx(DataType dt1,DataType dt2,DRegister rd,DRegister rm)10998       void Vrintx(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
10999     USE(dt2);
11000     VIXL_ASSERT(dt1.Is(dt2));
11001     return Vrintx(dt1, rd, rm);
11002   }
11003 
11004   VIXL_DEPRECATED(
11005       "void Vrintx(DataType dt, QRegister rd, QRegister rm)",
Vrintx(DataType dt1,DataType dt2,QRegister rd,QRegister rm)11006       void Vrintx(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
11007     USE(dt2);
11008     VIXL_ASSERT(dt1.Is(dt2));
11009     return Vrintx(dt1, rd, rm);
11010   }
11011 
11012   VIXL_DEPRECATED(
11013       "void Vrintx(Condition cond, DataType dt, SRegister rd, SRegister rm)",
Vrintx(Condition cond,DataType dt1,DataType dt2,SRegister rd,SRegister rm)11014       void Vrintx(Condition cond,
11015                   DataType dt1,
11016                   DataType dt2,
11017                   SRegister rd,
11018                   SRegister rm)) {
11019     USE(dt2);
11020     VIXL_ASSERT(dt1.Is(dt2));
11021     return Vrintx(cond, dt1, rd, rm);
11022   }
11023   VIXL_DEPRECATED(
11024       "void Vrintx(DataType dt, SRegister rd, SRegister rm)",
Vrintx(DataType dt1,DataType dt2,SRegister rd,SRegister rm)11025       void Vrintx(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
11026     USE(dt2);
11027     VIXL_ASSERT(dt1.Is(dt2));
11028     return Vrintx(dt1, rd, rm);
11029   }
11030 
11031   VIXL_DEPRECATED(
11032       "void Vrintz(Condition cond, DataType dt, DRegister rd, DRegister rm)",
Vrintz(Condition cond,DataType dt1,DataType dt2,DRegister rd,DRegister rm)11033       void Vrintz(Condition cond,
11034                   DataType dt1,
11035                   DataType dt2,
11036                   DRegister rd,
11037                   DRegister rm)) {
11038     USE(dt2);
11039     VIXL_ASSERT(dt1.Is(dt2));
11040     return Vrintz(cond, dt1, rd, rm);
11041   }
11042   VIXL_DEPRECATED(
11043       "void Vrintz(DataType dt, DRegister rd, DRegister rm)",
Vrintz(DataType dt1,DataType dt2,DRegister rd,DRegister rm)11044       void Vrintz(DataType dt1, DataType dt2, DRegister rd, DRegister rm)) {
11045     USE(dt2);
11046     VIXL_ASSERT(dt1.Is(dt2));
11047     return Vrintz(dt1, rd, rm);
11048   }
11049 
11050   VIXL_DEPRECATED(
11051       "void Vrintz(DataType dt, QRegister rd, QRegister rm)",
Vrintz(DataType dt1,DataType dt2,QRegister rd,QRegister rm)11052       void Vrintz(DataType dt1, DataType dt2, QRegister rd, QRegister rm)) {
11053     USE(dt2);
11054     VIXL_ASSERT(dt1.Is(dt2));
11055     return Vrintz(dt1, rd, rm);
11056   }
11057 
11058   VIXL_DEPRECATED(
11059       "void Vrintz(Condition cond, DataType dt, SRegister rd, SRegister rm)",
Vrintz(Condition cond,DataType dt1,DataType dt2,SRegister rd,SRegister rm)11060       void Vrintz(Condition cond,
11061                   DataType dt1,
11062                   DataType dt2,
11063                   SRegister rd,
11064                   SRegister rm)) {
11065     USE(dt2);
11066     VIXL_ASSERT(dt1.Is(dt2));
11067     return Vrintz(cond, dt1, rd, rm);
11068   }
11069   VIXL_DEPRECATED(
11070       "void Vrintz(DataType dt, SRegister rd, SRegister rm)",
Vrintz(DataType dt1,DataType dt2,SRegister rd,SRegister rm)11071       void Vrintz(DataType dt1, DataType dt2, SRegister rd, SRegister rm)) {
11072     USE(dt2);
11073     VIXL_ASSERT(dt1.Is(dt2));
11074     return Vrintz(dt1, rd, rm);
11075   }
11076 
11077  private:
NeedBranch(Condition * cond)11078   bool NeedBranch(Condition* cond) { return !cond->Is(al) && IsUsingT32(); }
11079   static const int kBranchSize = kMaxInstructionSizeInBytes;
11080 
11081   RegisterList available_;
11082   VRegisterList available_vfp_;
11083   UseScratchRegisterScope* current_scratch_scope_;
11084   MacroAssemblerContext context_;
11085   PoolManager<int32_t> pool_manager_;
11086   bool generate_simulator_code_;
11087   bool allow_macro_instructions_;
11088   Label* pool_end_;
11089 
11090   friend class TestMacroAssembler;
11091 };
11092 
11093 // This scope utility allows scratch registers to be managed safely. The
11094 // MacroAssembler's GetScratchRegisterList() is used as a pool of scratch
11095 // registers. These registers can be allocated on demand, and will be returned
11096 // at the end of the scope.
11097 //
11098 // When the scope ends, the MacroAssembler's lists will be restored to their
11099 // original state, even if the lists were modified by some other means.
11100 //
11101 // Scopes must nest perfectly. That is, they must be destructed in reverse
11102 // construction order. Otherwise, it is not clear how to handle cases where one
11103 // scope acquires a register that was included in a now-closing scope. With
11104 // perfect nesting, this cannot occur.
11105 class UseScratchRegisterScope {
11106  public:
11107   // This constructor implicitly calls the `Open` function to initialise the
11108   // scope, so it is ready to use immediately after it has been constructed.
UseScratchRegisterScope(MacroAssembler * masm)11109   explicit UseScratchRegisterScope(MacroAssembler* masm)
11110       : masm_(NULL), parent_(NULL), old_available_(0), old_available_vfp_(0) {
11111     Open(masm);
11112   }
11113   // This constructor allows deferred and optional initialisation of the scope.
11114   // The user is required to explicitly call the `Open` function before using
11115   // the scope.
UseScratchRegisterScope()11116   UseScratchRegisterScope()
11117       : masm_(NULL), parent_(NULL), old_available_(0), old_available_vfp_(0) {}
11118 
11119   // This function performs the actual initialisation work.
11120   void Open(MacroAssembler* masm);
11121 
11122   // The destructor always implicitly calls the `Close` function.
~UseScratchRegisterScope()11123   ~UseScratchRegisterScope() { Close(); }
11124 
11125   // This function performs the cleaning-up work. It must succeed even if the
11126   // scope has not been opened. It is safe to call multiple times.
11127   void Close();
11128 
11129   bool IsAvailable(const Register& reg) const;
11130   bool IsAvailable(const VRegister& reg) const;
11131 
11132   // Take a register from the temp list. It will be returned automatically when
11133   // the scope ends.
11134   Register Acquire();
11135   VRegister AcquireV(unsigned size_in_bits);
11136   QRegister AcquireQ();
11137   DRegister AcquireD();
11138   SRegister AcquireS();
11139 
11140   // Explicitly release an acquired (or excluded) register, putting it back in
11141   // the temp list.
11142   void Release(const Register& reg);
11143   void Release(const VRegister& reg);
11144 
11145   // Make the specified registers available as scratch registers for the
11146   // duration of this scope.
11147   void Include(const RegisterList& list);
11148   void Include(const Register& reg1,
11149                const Register& reg2 = NoReg,
11150                const Register& reg3 = NoReg,
11151                const Register& reg4 = NoReg) {
11152     Include(RegisterList(reg1, reg2, reg3, reg4));
11153   }
11154   void Include(const VRegisterList& list);
11155   void Include(const VRegister& reg1,
11156                const VRegister& reg2 = NoVReg,
11157                const VRegister& reg3 = NoVReg,
11158                const VRegister& reg4 = NoVReg) {
11159     Include(VRegisterList(reg1, reg2, reg3, reg4));
11160   }
11161 
11162   // Make sure that the specified registers are not available in this scope.
11163   // This can be used to prevent helper functions from using sensitive
11164   // registers, for example.
11165   void Exclude(const RegisterList& list);
11166   void Exclude(const Register& reg1,
11167                const Register& reg2 = NoReg,
11168                const Register& reg3 = NoReg,
11169                const Register& reg4 = NoReg) {
11170     Exclude(RegisterList(reg1, reg2, reg3, reg4));
11171   }
11172   void Exclude(const VRegisterList& list);
11173   void Exclude(const VRegister& reg1,
11174                const VRegister& reg2 = NoVReg,
11175                const VRegister& reg3 = NoVReg,
11176                const VRegister& reg4 = NoVReg) {
11177     Exclude(VRegisterList(reg1, reg2, reg3, reg4));
11178   }
11179 
11180   // A convenience helper to exclude any registers used by the operand.
11181   void Exclude(const Operand& operand);
11182 
11183   // Prevent any scratch registers from being used in this scope.
11184   void ExcludeAll();
11185 
11186  private:
11187   // The MacroAssembler maintains a list of available scratch registers, and
11188   // also keeps track of the most recently-opened scope so that on destruction
11189   // we can check that scopes do not outlive their parents.
11190   MacroAssembler* masm_;
11191   UseScratchRegisterScope* parent_;
11192 
11193   // The state of the available lists at the start of this scope.
11194   uint32_t old_available_;      // kRRegister
11195   uint64_t old_available_vfp_;  // kVRegister
11196 
UseScratchRegisterScope(const UseScratchRegisterScope &)11197   VIXL_NO_RETURN_IN_DEBUG_MODE UseScratchRegisterScope(
11198       const UseScratchRegisterScope&) {
11199     VIXL_UNREACHABLE();
11200   }
11201   VIXL_NO_RETURN_IN_DEBUG_MODE void operator=(const UseScratchRegisterScope&) {
11202     VIXL_UNREACHABLE();
11203   }
11204 };
11205 
11206 
11207 }  // namespace aarch32
11208 }  // namespace vixl
11209 
11210 #endif  // VIXL_AARCH32_MACRO_ASSEMBLER_AARCH32_H_
11211