1 /* 2 * Copyright 2014 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 */ 23 24 #ifndef _AMDGPU_TEST_H_ 25 #define _AMDGPU_TEST_H_ 26 27 #include "amdgpu.h" 28 #include "amdgpu_drm.h" 29 30 /** 31 * Define max. number of card in system which we are able to handle 32 */ 33 #define MAX_CARDS_SUPPORTED 128 34 35 /* Forward reference for array to keep "drm" handles */ 36 extern int drm_amdgpu[MAX_CARDS_SUPPORTED]; 37 38 /* Global variables */ 39 extern int open_render_node; 40 41 /************************* Basic test suite ********************************/ 42 43 /* 44 * Define basic test suite to serve as the starting point for future testing 45 */ 46 47 /** 48 * Initialize basic test suite 49 */ 50 int suite_basic_tests_init(); 51 52 /** 53 * Deinitialize basic test suite 54 */ 55 int suite_basic_tests_clean(); 56 57 /** 58 * Decide if the suite is enabled by default or not. 59 */ 60 CU_BOOL suite_basic_tests_enable(void); 61 62 /** 63 * Tests in basic test suite 64 */ 65 extern CU_TestInfo basic_tests[]; 66 67 /** 68 * Initialize bo test suite 69 */ 70 int suite_bo_tests_init(); 71 72 /** 73 * Deinitialize bo test suite 74 */ 75 int suite_bo_tests_clean(); 76 77 /** 78 * Tests in bo test suite 79 */ 80 extern CU_TestInfo bo_tests[]; 81 82 /** 83 * Initialize cs test suite 84 */ 85 int suite_cs_tests_init(); 86 87 /** 88 * Deinitialize cs test suite 89 */ 90 int suite_cs_tests_clean(); 91 92 /** 93 * Decide if the suite is enabled by default or not. 94 */ 95 CU_BOOL suite_cs_tests_enable(void); 96 97 /** 98 * Tests in cs test suite 99 */ 100 extern CU_TestInfo cs_tests[]; 101 102 /** 103 * Initialize vce test suite 104 */ 105 int suite_vce_tests_init(); 106 107 /** 108 * Deinitialize vce test suite 109 */ 110 int suite_vce_tests_clean(); 111 112 /** 113 * Decide if the suite is enabled by default or not. 114 */ 115 CU_BOOL suite_vce_tests_enable(void); 116 117 /** 118 * Tests in vce test suite 119 */ 120 extern CU_TestInfo vce_tests[]; 121 122 /** 123 + * Initialize vcn test suite 124 + */ 125 int suite_vcn_tests_init(); 126 127 /** 128 + * Deinitialize vcn test suite 129 + */ 130 int suite_vcn_tests_clean(); 131 132 /** 133 * Decide if the suite is enabled by default or not. 134 */ 135 CU_BOOL suite_vcn_tests_enable(void); 136 137 /** 138 + * Tests in vcn test suite 139 + */ 140 extern CU_TestInfo vcn_tests[]; 141 142 /** 143 + * Initialize jpeg test suite 144 + */ 145 int suite_jpeg_tests_init(); 146 147 /** 148 + * Deinitialize jpeg test suite 149 + */ 150 int suite_jpeg_tests_clean(); 151 152 /** 153 * Decide if the suite is enabled by default or not. 154 */ 155 CU_BOOL suite_jpeg_tests_enable(void); 156 157 /** 158 + * Tests in vcn test suite 159 + */ 160 extern CU_TestInfo jpeg_tests[]; 161 162 /** 163 * Initialize uvd enc test suite 164 */ 165 int suite_uvd_enc_tests_init(); 166 167 /** 168 * Deinitialize uvd enc test suite 169 */ 170 int suite_uvd_enc_tests_clean(); 171 172 /** 173 * Decide if the suite is enabled by default or not. 174 */ 175 CU_BOOL suite_uvd_enc_tests_enable(void); 176 177 /** 178 * Tests in uvd enc test suite 179 */ 180 extern CU_TestInfo uvd_enc_tests[]; 181 182 /** 183 * Initialize deadlock test suite 184 */ 185 int suite_deadlock_tests_init(); 186 187 /** 188 * Deinitialize deadlock test suite 189 */ 190 int suite_deadlock_tests_clean(); 191 192 /** 193 * Decide if the suite is enabled by default or not. 194 */ 195 CU_BOOL suite_deadlock_tests_enable(void); 196 197 /** 198 * Tests in uvd enc test suite 199 */ 200 extern CU_TestInfo deadlock_tests[]; 201 202 /** 203 * Initialize vm test suite 204 */ 205 int suite_vm_tests_init(); 206 207 /** 208 * Deinitialize deadlock test suite 209 */ 210 int suite_vm_tests_clean(); 211 212 /** 213 * Decide if the suite is enabled by default or not. 214 */ 215 CU_BOOL suite_vm_tests_enable(void); 216 217 /** 218 * Tests in vm test suite 219 */ 220 extern CU_TestInfo vm_tests[]; 221 222 223 /** 224 * Initialize ras test suite 225 */ 226 int suite_ras_tests_init(); 227 228 /** 229 * Deinitialize deadlock test suite 230 */ 231 int suite_ras_tests_clean(); 232 233 /** 234 * Decide if the suite is enabled by default or not. 235 */ 236 CU_BOOL suite_ras_tests_enable(void); 237 238 /** 239 * Tests in ras test suite 240 */ 241 extern CU_TestInfo ras_tests[]; 242 243 244 /** 245 * Initialize syncobj timeline test suite 246 */ 247 int suite_syncobj_timeline_tests_init(); 248 249 /** 250 * Deinitialize syncobj timeline test suite 251 */ 252 int suite_syncobj_timeline_tests_clean(); 253 254 /** 255 * Decide if the suite is enabled by default or not. 256 */ 257 CU_BOOL suite_syncobj_timeline_tests_enable(void); 258 259 /** 260 * Tests in syncobj timeline test suite 261 */ 262 extern CU_TestInfo syncobj_timeline_tests[]; 263 264 265 /** 266 * Initialize cp dma test suite 267 */ 268 int suite_cp_dma_tests_init(); 269 270 /** 271 * Deinitialize cp dma test suite 272 */ 273 int suite_cp_dma_tests_clean(); 274 275 /** 276 * Decide if the suite is enabled by default or not. 277 */ 278 CU_BOOL suite_cp_dma_tests_enable(void); 279 280 /** 281 * Tests in cp dma test suite 282 */ 283 extern CU_TestInfo cp_dma_tests[]; 284 285 /** 286 * Initialize security test suite 287 */ 288 int suite_security_tests_init(); 289 290 /** 291 * Deinitialize security test suite 292 */ 293 int suite_security_tests_clean(); 294 295 /** 296 * Decide if the suite is enabled by default or not. 297 */ 298 CU_BOOL suite_security_tests_enable(void); 299 300 /** 301 * Tests in security test suite 302 */ 303 extern CU_TestInfo security_tests[]; 304 305 extern void 306 amdgpu_command_submission_write_linear_helper_with_secure(amdgpu_device_handle 307 device, 308 unsigned ip_type, 309 bool secure); 310 311 extern void amdgpu_test_dispatch_helper(amdgpu_device_handle device_handle, unsigned ip); 312 extern void amdgpu_test_dispatch_hang_helper(amdgpu_device_handle device_handle, uint32_t ip); 313 extern void amdgpu_test_dispatch_hang_slow_helper(amdgpu_device_handle device_handle, uint32_t ip); 314 extern void amdgpu_test_draw_helper(amdgpu_device_handle device_handle); 315 extern void amdgpu_test_draw_hang_helper(amdgpu_device_handle device_handle); 316 extern void amdgpu_test_draw_hang_slow_helper(amdgpu_device_handle device_handle); 317 318 /** 319 * Initialize hotunplug test suite 320 */ 321 int suite_hotunplug_tests_init(); 322 323 /** 324 * Deinitialize hotunplug test suite 325 */ 326 int suite_hotunplug_tests_clean(); 327 328 /** 329 * Decide if the suite is enabled by default or not. 330 */ 331 CU_BOOL suite_hotunplug_tests_enable(void); 332 333 /** 334 * Tests in uvd enc test suite 335 */ 336 extern CU_TestInfo hotunplug_tests[]; 337 338 339 /** 340 * Helper functions 341 */ 342 static inline amdgpu_bo_handle gpu_mem_alloc( 343 amdgpu_device_handle device_handle, 344 uint64_t size, 345 uint64_t alignment, 346 uint32_t type, 347 uint64_t flags, 348 uint64_t *vmc_addr, 349 amdgpu_va_handle *va_handle) 350 { 351 struct amdgpu_bo_alloc_request req = {0}; 352 amdgpu_bo_handle buf_handle = NULL; 353 int r; 354 355 req.alloc_size = size; 356 req.phys_alignment = alignment; 357 req.preferred_heap = type; 358 req.flags = flags; 359 360 r = amdgpu_bo_alloc(device_handle, &req, &buf_handle); 361 CU_ASSERT_EQUAL(r, 0); 362 if (r) 363 return NULL; 364 365 if (vmc_addr && va_handle) { 366 r = amdgpu_va_range_alloc(device_handle, 367 amdgpu_gpu_va_range_general, 368 size, alignment, 0, vmc_addr, 369 va_handle, 0); 370 CU_ASSERT_EQUAL(r, 0); 371 if (r) 372 goto error_free_bo; 373 374 r = amdgpu_bo_va_op(buf_handle, 0, size, *vmc_addr, 0, 375 AMDGPU_VA_OP_MAP); 376 CU_ASSERT_EQUAL(r, 0); 377 if (r) 378 goto error_free_va; 379 } 380 381 return buf_handle; 382 383 error_free_va: 384 r = amdgpu_va_range_free(*va_handle); 385 CU_ASSERT_EQUAL(r, 0); 386 387 error_free_bo: 388 r = amdgpu_bo_free(buf_handle); 389 CU_ASSERT_EQUAL(r, 0); 390 391 return NULL; 392 } 393 394 static inline int gpu_mem_free(amdgpu_bo_handle bo, 395 amdgpu_va_handle va_handle, 396 uint64_t vmc_addr, 397 uint64_t size) 398 { 399 int r; 400 401 if (!bo) 402 return 0; 403 404 if (va_handle) { 405 r = amdgpu_bo_va_op(bo, 0, size, vmc_addr, 0, 406 AMDGPU_VA_OP_UNMAP); 407 CU_ASSERT_EQUAL(r, 0); 408 if (r) 409 return r; 410 411 r = amdgpu_va_range_free(va_handle); 412 CU_ASSERT_EQUAL(r, 0); 413 if (r) 414 return r; 415 } 416 417 r = amdgpu_bo_free(bo); 418 CU_ASSERT_EQUAL(r, 0); 419 420 return r; 421 } 422 423 static inline int 424 amdgpu_bo_alloc_wrap(amdgpu_device_handle dev, unsigned size, 425 unsigned alignment, unsigned heap, uint64_t flags, 426 amdgpu_bo_handle *bo) 427 { 428 struct amdgpu_bo_alloc_request request = {}; 429 amdgpu_bo_handle buf_handle; 430 int r; 431 432 request.alloc_size = size; 433 request.phys_alignment = alignment; 434 request.preferred_heap = heap; 435 request.flags = flags; 436 437 r = amdgpu_bo_alloc(dev, &request, &buf_handle); 438 if (r) 439 return r; 440 441 *bo = buf_handle; 442 443 return 0; 444 } 445 446 int amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size, 447 unsigned alignment, unsigned heap, uint64_t alloc_flags, 448 uint64_t mapping_flags, amdgpu_bo_handle *bo, void **cpu, 449 uint64_t *mc_address, 450 amdgpu_va_handle *va_handle); 451 452 static inline int 453 amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size, 454 unsigned alignment, unsigned heap, uint64_t alloc_flags, 455 amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address, 456 amdgpu_va_handle *va_handle) 457 { 458 return amdgpu_bo_alloc_and_map_raw(dev, size, alignment, heap, 459 alloc_flags, 0, bo, cpu, mc_address, va_handle); 460 } 461 462 static inline int 463 amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle, 464 uint64_t mc_addr, uint64_t size) 465 { 466 amdgpu_bo_cpu_unmap(bo); 467 amdgpu_bo_va_op(bo, 0, size, mc_addr, 0, AMDGPU_VA_OP_UNMAP); 468 amdgpu_va_range_free(va_handle); 469 amdgpu_bo_free(bo); 470 471 return 0; 472 473 } 474 475 static inline int 476 amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1, 477 amdgpu_bo_handle bo2, amdgpu_bo_list_handle *list) 478 { 479 amdgpu_bo_handle resources[] = {bo1, bo2}; 480 481 return amdgpu_bo_list_create(dev, bo2 ? 2 : 1, resources, NULL, list); 482 } 483 484 485 static inline CU_ErrorCode amdgpu_set_suite_active(const char *suite_name, 486 CU_BOOL active) 487 { 488 CU_ErrorCode r = CU_set_suite_active(CU_get_suite(suite_name), active); 489 490 if (r != CUE_SUCCESS) 491 fprintf(stderr, "Failed to obtain suite %s\n", suite_name); 492 493 return r; 494 } 495 496 static inline CU_ErrorCode amdgpu_set_test_active(const char *suite_name, 497 const char *test_name, CU_BOOL active) 498 { 499 CU_ErrorCode r; 500 CU_pSuite pSuite = CU_get_suite(suite_name); 501 502 if (!pSuite) { 503 fprintf(stderr, "Failed to obtain suite %s\n", 504 suite_name); 505 return CUE_NOSUITE; 506 } 507 508 r = CU_set_test_active(CU_get_test(pSuite, test_name), active); 509 if (r != CUE_SUCCESS) 510 fprintf(stderr, "Failed to obtain test %s\n", test_name); 511 512 return r; 513 } 514 515 516 static inline bool asic_is_gfx_pipe_removed(uint32_t family_id, uint32_t chip_id, uint32_t chip_rev) 517 { 518 519 if (family_id != AMDGPU_FAMILY_AI) 520 return false; 521 522 switch (chip_id - chip_rev) { 523 /* Arcturus */ 524 case 0x32: 525 /* Aldebaran */ 526 case 0x3c: 527 return true; 528 default: 529 return false; 530 } 531 } 532 533 void amdgpu_test_exec_cs_helper_raw(amdgpu_device_handle device_handle, 534 amdgpu_context_handle context_handle, 535 unsigned ip_type, int instance, int pm4_dw, 536 uint32_t *pm4_src, int res_cnt, 537 amdgpu_bo_handle *resources, 538 struct amdgpu_cs_ib_info *ib_info, 539 struct amdgpu_cs_request *ibs_request, 540 bool secure); 541 542 void amdgpu_close_devices(); 543 int amdgpu_open_device_on_test_index(int render_node); 544 char *amdgpu_get_device_from_fd(int fd); 545 546 #endif /* #ifdef _AMDGPU_TEST_H_ */ 547