Lines Matching refs:r9
1209 mov r9, r0, asl #1 @ r9<- byte offset
1213 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1219 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1245 movs r9, r0, asl #1 @ r9<- branch byte offset, check sign
1250 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1256 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1284 movs r9, r0, asl #1 @ r9<- branch byte offset, check sign
1289 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1295 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1324 mov r9, rINST, lsr #8 @ r9<- AA
1363 mov r9, rINST, lsr #8 @ r9<- AA
1402 mov r9, rINST, lsr #8 @ r9<- AA
1441 mov r9, rINST, lsr #8 @ r9<- AA
1484 mov r9, rINST, lsr #8 @ r9<- AA
1517 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1520 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1521 movs r9, r9, asl #1 @ convert to bytes, check sign
1526 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1529 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1554 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1557 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1558 movs r9, r9, asl #1 @ convert to bytes, check sign
1563 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1566 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1591 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1594 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1595 movs r9, r9, asl #1 @ convert to bytes, check sign
1600 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1603 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1628 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1631 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1632 movs r9, r9, asl #1 @ convert to bytes, check sign
1637 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1640 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1665 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1668 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1669 movs r9, r9, asl #1 @ convert to bytes, check sign
1674 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1677 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1702 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1705 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1706 movs r9, r9, asl #1 @ convert to bytes, check sign
1711 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1714 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1736 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1739 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1740 movs r9, r9, asl #1 @ convert to bytes, check sign
1745 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1751 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1773 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1776 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1777 movs r9, r9, asl #1 @ convert to bytes, check sign
1782 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1788 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1810 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1813 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1814 movs r9, r9, asl #1 @ convert to bytes, check sign
1819 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1825 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1847 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1850 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1851 movs r9, r9, asl #1 @ convert to bytes, check sign
1856 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1862 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1884 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1887 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1888 movs r9, r9, asl #1 @ convert to bytes, check sign
1893 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1899 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1921 mov r9, #4 @ r0<- BYTE branch dist for not-taken
1924 FETCH_S(r9, 1) @ r9<- branch offset, in code units
1925 movs r9, r9, asl #1 @ convert to bytes, check sign
1930 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
1936 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
2011 mov r9, rINST, lsr #8 @ r9<- AA
2024 SET_VREG(r2, r9) @ vAA<- r2
2039 mov r9, rINST, lsr #8 @ r9<- AA
2070 mov r9, rINST, lsr #8 @ r9<- AA
2083 SET_VREG(r2, r9) @ vAA<- r2
2103 mov r9, rINST, lsr #8 @ r9<- AA
2116 SET_VREG(r2, r9) @ vAA<- r2
2136 mov r9, rINST, lsr #8 @ r9<- AA
2149 SET_VREG(r2, r9) @ vAA<- r2
2169 mov r9, rINST, lsr #8 @ r9<- AA
2182 SET_VREG(r2, r9) @ vAA<- r2
2202 mov r9, rINST, lsr #8 @ r9<- AA
2215 SET_VREG(r2, r9) @ vAA<- r2
2234 mov r9, rINST, lsr #8 @ r9<- AA
2245 GET_VREG(r2, r9) @ r2<- vAA
2262 mov r9, rINST, lsr #8 @ r9<- AA
2272 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
2291 mov r9, rINST, lsr #8 @ r9<- AA
2297 GET_VREG(r9, r9) @ r9<- vAA
3388 ldr r9, [rGLUE, #offGlue_method] @ r9<- current method
3391 ldr r9, [r9, #offMethod_clazz] @ r9<- method->clazz
3525 mov r9, rINST, lsr #8 @ r9<- A+
3527 and r9, r9, #15
3532 SET_VREG(r0, r9) @ vAA<- r0
3552 mov r9, rINST, lsr #8 @ r9<- A+
3554 and r9, r9, #15
3559 SET_VREG(r0, r9) @ vAA<- r0
3577 mov r9, rINST, lsr #8 @ r9<- A+
3579 and r9, r9, #15
3581 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
3587 stmia r9, {r0-r1} @ vAA<- r0/r1
3606 mov r9, rINST, lsr #8 @ r9<- A+
3608 and r9, r9, #15
3610 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
3616 stmia r9, {r0-r1} @ vAA<- r0/r1
3637 mov r9, rINST, lsr #8 @ r9<- A+
3639 and r9, r9, #15
3644 SET_VREG(r0, r9) @ vAA<- r0
3662 mov r9, rINST, lsr #8 @ r9<- A+
3664 and r9, r9, #15
3666 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
3672 stmia r9, {r0-r1} @ vAA<- r0/r1
3691 mov r9, rINST, lsr #8 @ r9<- A+
3693 and r9, r9, #15
3695 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
3700 stmia r9, {r0-r1} @ vA/vA+1<- r0/r1
3718 mov r9, rINST, lsr #8 @ r9<- A+
3722 and r9, r9, #15 @ r9<- A
3725 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
3726 fsts s1, [r9] @ vA<- s1
3743 mov r9, rINST, lsr #8 @ r9<- A+
3747 and r9, r9, #15 @ r9<- A
3750 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
3751 fstd d0, [r9] @ vA<- d0
3791 mov r9, rINST, lsr #8 @ r9<- A+
3793 and r9, r9, #15
3799 SET_VREG(r0, r9) @ vA<- r0
3817 mov r9, rINST, lsr #8 @ r9<- A+
3819 and r9, r9, #15
3821 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
3827 stmia r9, {r0-r1} @ vAA<- r0/r1
3846 mov r9, rINST, lsr #8 @ r9<- A+
3850 and r9, r9, #15 @ r9<- A
3853 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
3854 fsts s1, [r9] @ vA<- s1
3872 mov r9, rINST, lsr #8 @ r9<- A+
3874 and r9, r9, #15
3876 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
3881 stmia r9, {r0-r1} @ vA/vA+1<- r0/r1
3900 mov r9, rINST, lsr #8 @ r9<- A+
3904 and r9, r9, #15 @ r9<- A
3907 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
3908 fstd d0, [r9] @ vA<- d0
3925 mov r9, rINST, lsr #8 @ r9<- A+
3929 and r9, r9, #15 @ r9<- A
3932 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
3933 fsts s0, [r9] @ vA<- s0
3951 mov r9, rINST, lsr #8 @ r9<- A+
3953 and r9, r9, #15
3955 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
3961 stmia r9, {r0-r1} @ vAA<- r0/r1
3981 mov r9, rINST, lsr #8 @ r9<- A+
3985 and r9, r9, #15 @ r9<- A
3988 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
3989 fsts s0, [r9] @ vA<- s0
4008 mov r9, rINST, lsr #8 @ r9<- A+
4010 and r9, r9, #15
4015 SET_VREG(r0, r9) @ vAA<- r0
4035 mov r9, rINST, lsr #8 @ r9<- A+
4037 and r9, r9, #15
4042 SET_VREG(r0, r9) @ vAA<- r0
4062 mov r9, rINST, lsr #8 @ r9<- A+
4064 and r9, r9, #15
4069 SET_VREG(r0, r9) @ vAA<- r0
4096 mov r9, rINST, lsr #8 @ r9<- AA
4110 SET_VREG(r0, r9) @ vAA<- r0
4138 mov r9, rINST, lsr #8 @ r9<- AA
4152 SET_VREG(r0, r9) @ vAA<- r0
4181 mov r9, rINST, lsr #8 @ r9<- AA
4195 SET_VREG(r0, r9) @ vAA<- r0
4223 mov r9, rINST, lsr #8 @ r9<- AA
4237 SET_VREG(r0, r9) @ vAA<- r0
4266 mov r9, rINST, lsr #8 @ r9<- AA
4280 SET_VREG(r1, r9) @ vAA<- r1
4308 mov r9, rINST, lsr #8 @ r9<- AA
4322 SET_VREG(r0, r9) @ vAA<- r0
4350 mov r9, rINST, lsr #8 @ r9<- AA
4364 SET_VREG(r0, r9) @ vAA<- r0
4392 mov r9, rINST, lsr #8 @ r9<- AA
4406 SET_VREG(r0, r9) @ vAA<- r0
4434 mov r9, rINST, lsr #8 @ r9<- AA
4448 SET_VREG(r0, r9) @ vAA<- r0
4476 mov r9, rINST, lsr #8 @ r9<- AA
4490 SET_VREG(r0, r9) @ vAA<- r0
4518 mov r9, rINST, lsr #8 @ r9<- AA
4532 SET_VREG(r0, r9) @ vAA<- r0
4560 mov r9, rINST, lsr #8 @ r9<- AA
4563 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
4577 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
4605 mov r9, rINST, lsr #8 @ r9<- AA
4608 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
4622 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
4659 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
4689 mov r9, rINST, lsr #8 @ r9<- AA
4692 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
4706 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
4735 mov r9, rINST, lsr #8 @ r9<- AA
4738 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
4752 stmia r9, {r2,r3} @ vAA/vAA+1<- r2/r3
4780 mov r9, rINST, lsr #8 @ r9<- AA
4783 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
4797 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
4825 mov r9, rINST, lsr #8 @ r9<- AA
4828 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
4842 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
4870 mov r9, rINST, lsr #8 @ r9<- AA
4873 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
4887 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
4905 mov r9, rINST, lsr #8 @ r9<- AA
4912 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
4934 mov r9, rINST, lsr #8 @ r9<- AA
4941 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
4963 mov r9, rINST, lsr #8 @ r9<- AA
4970 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
4994 mov r9, rINST, lsr #8 @ r9<- AA
5005 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vAA
5006 fsts s2, [r9] @ vAA<- s2
5024 mov r9, rINST, lsr #8 @ r9<- AA
5035 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vAA
5036 fsts s2, [r9] @ vAA<- s2
5054 mov r9, rINST, lsr #8 @ r9<- AA
5065 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vAA
5066 fsts s2, [r9] @ vAA<- s2
5084 mov r9, rINST, lsr #8 @ r9<- AA
5095 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vAA
5096 fsts s2, [r9] @ vAA<- s2
5123 mov r9, rINST, lsr #8 @ r9<- AA
5137 SET_VREG(r0, r9) @ vAA<- r0
5157 mov r9, rINST, lsr #8 @ r9<- AA
5168 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vAA
5169 fstd d2, [r9] @ vAA<- d2
5187 mov r9, rINST, lsr #8 @ r9<- AA
5198 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vAA
5199 fstd d2, [r9] @ vAA<- d2
5217 mov r9, rINST, lsr #8 @ r9<- AA
5228 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vAA
5229 fstd d2, [r9] @ vAA<- d2
5247 mov r9, rINST, lsr #8 @ r9<- AA
5258 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vAA
5259 fstd d2, [r9] @ vAA<- d2
5286 mov r9, rINST, lsr #8 @ r9<- AA
5289 add r9, rFP, r9, lsl #2 @ r9<- &fp[AA]
5303 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
5329 mov r9, rINST, lsr #8 @ r9<- A+
5331 and r9, r9, #15
5333 GET_VREG(r0, r9) @ r0<- vA
5343 SET_VREG(r0, r9) @ vAA<- r0
5369 mov r9, rINST, lsr #8 @ r9<- A+
5371 and r9, r9, #15
5373 GET_VREG(r0, r9) @ r0<- vA
5383 SET_VREG(r0, r9) @ vAA<- r0
5410 mov r9, rINST, lsr #8 @ r9<- A+
5412 and r9, r9, #15
5414 GET_VREG(r0, r9) @ r0<- vA
5424 SET_VREG(r0, r9) @ vAA<- r0
5450 mov r9, rINST, lsr #8 @ r9<- A+
5452 and r9, r9, #15
5454 GET_VREG(r0, r9) @ r0<- vA
5464 SET_VREG(r0, r9) @ vAA<- r0
5491 mov r9, rINST, lsr #8 @ r9<- A+
5493 and r9, r9, #15
5495 GET_VREG(r0, r9) @ r0<- vA
5505 SET_VREG(r1, r9) @ vAA<- r1
5531 mov r9, rINST, lsr #8 @ r9<- A+
5533 and r9, r9, #15
5535 GET_VREG(r0, r9) @ r0<- vA
5545 SET_VREG(r0, r9) @ vAA<- r0
5571 mov r9, rINST, lsr #8 @ r9<- A+
5573 and r9, r9, #15
5575 GET_VREG(r0, r9) @ r0<- vA
5585 SET_VREG(r0, r9) @ vAA<- r0
5611 mov r9, rINST, lsr #8 @ r9<- A+
5613 and r9, r9, #15
5615 GET_VREG(r0, r9) @ r0<- vA
5625 SET_VREG(r0, r9) @ vAA<- r0
5651 mov r9, rINST, lsr #8 @ r9<- A+
5653 and r9, r9, #15
5655 GET_VREG(r0, r9) @ r0<- vA
5665 SET_VREG(r0, r9) @ vAA<- r0
5691 mov r9, rINST, lsr #8 @ r9<- A+
5693 and r9, r9, #15
5695 GET_VREG(r0, r9) @ r0<- vA
5705 SET_VREG(r0, r9) @ vAA<- r0
5731 mov r9, rINST, lsr #8 @ r9<- A+
5733 and r9, r9, #15
5735 GET_VREG(r0, r9) @ r0<- vA
5745 SET_VREG(r0, r9) @ vAA<- r0
5771 mov r9, rINST, lsr #8 @ r9<- A+
5773 and r9, r9, #15
5775 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
5777 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1
5787 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
5813 mov r9, rINST, lsr #8 @ r9<- A+
5815 and r9, r9, #15
5817 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
5819 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1
5829 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
5848 mov r9, rINST, lsr #8 @ r9<- A+
5850 and r9, r9, #15
5852 add rINST, rFP, r9, lsl #2 @ rINST<- &fp[A]
5856 umull r9, r10, r2, r0 @ r9/r10 <- ZxX
5862 stmia r0, {r9-r10} @ vAA/vAA+1<- r9/r10
5886 mov r9, rINST, lsr #8 @ r9<- A+
5888 and r9, r9, #15
5890 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
5892 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1
5902 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
5929 mov r9, rINST, lsr #8 @ r9<- A+
5931 and r9, r9, #15
5933 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
5935 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1
5945 stmia r9, {r2,r3} @ vAA/vAA+1<- r2/r3
5971 mov r9, rINST, lsr #8 @ r9<- A+
5973 and r9, r9, #15
5975 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
5977 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1
5987 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
6013 mov r9, rINST, lsr #8 @ r9<- A+
6015 and r9, r9, #15
6017 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
6019 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1
6029 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
6055 mov r9, rINST, lsr #8 @ r9<- A+
6057 and r9, r9, #15
6059 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
6061 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1
6071 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
6086 mov r9, rINST, lsr #8 @ r9<- A+
6088 and r9, r9, #15
6090 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
6092 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1
6112 mov r9, rINST, lsr #8 @ r9<- A+
6114 and r9, r9, #15
6116 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
6118 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1
6138 mov r9, rINST, lsr #8 @ r9<- A+
6140 and r9, r9, #15
6142 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
6144 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1
6169 mov r9, rINST, lsr #8 @ r9<- A+
6171 and r9, r9, #15 @ r9<- A
6173 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
6175 flds s0, [r9] @ s0<- vA
6179 fsts s2, [r9] @ vAA<- s2
6197 mov r9, rINST, lsr #8 @ r9<- A+
6199 and r9, r9, #15 @ r9<- A
6201 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
6203 flds s0, [r9] @ s0<- vA
6207 fsts s2, [r9] @ vAA<- s2
6225 mov r9, rINST, lsr #8 @ r9<- A+
6227 and r9, r9, #15 @ r9<- A
6229 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
6231 flds s0, [r9] @ s0<- vA
6235 fsts s2, [r9] @ vAA<- s2
6253 mov r9, rINST, lsr #8 @ r9<- A+
6255 and r9, r9, #15 @ r9<- A
6257 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
6259 flds s0, [r9] @ s0<- vA
6263 fsts s2, [r9] @ vAA<- s2
6288 mov r9, rINST, lsr #8 @ r9<- A+
6290 and r9, r9, #15
6292 GET_VREG(r0, r9) @ r0<- vA
6302 SET_VREG(r0, r9) @ vAA<- r0
6323 mov r9, rINST, lsr #8 @ r9<- A+
6325 and r9, r9, #15 @ r9<- A
6327 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
6329 fldd d0, [r9] @ d0<- vA
6333 fstd d2, [r9] @ vAA<- d2
6352 mov r9, rINST, lsr #8 @ r9<- A+
6354 and r9, r9, #15 @ r9<- A
6356 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
6358 fldd d0, [r9] @ d0<- vA
6362 fstd d2, [r9] @ vAA<- d2
6381 mov r9, rINST, lsr #8 @ r9<- A+
6383 and r9, r9, #15 @ r9<- A
6385 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
6387 fldd d0, [r9] @ d0<- vA
6391 fstd d2, [r9] @ vAA<- d2
6410 mov r9, rINST, lsr #8 @ r9<- A+
6412 and r9, r9, #15 @ r9<- A
6414 VREG_INDEX_TO_ADDR(r9, r9) @ r9<- &vA
6416 fldd d0, [r9] @ d0<- vA
6420 fstd d2, [r9] @ vAA<- d2
6445 mov r9, rINST, lsr #8 @ r9<- A+
6447 and r9, r9, #15
6449 add r9, rFP, r9, lsl #2 @ r9<- &fp[A]
6451 ldmia r9, {r0-r1} @ r0/r1<- vAA/vAA+1
6461 stmia r9, {r0,r1} @ vAA/vAA+1<- r0/r1
6487 mov r9, rINST, lsr #8 @ r9<- A+
6489 and r9, r9, #15
6498 SET_VREG(r0, r9) @ vAA<- r0
6525 mov r9, rINST, lsr #8 @ r9<- A+
6527 and r9, r9, #15
6536 SET_VREG(r0, r9) @ vAA<- r0
6563 mov r9, rINST, lsr #8 @ r9<- A+
6565 and r9, r9, #15
6574 SET_VREG(r0, r9) @ vAA<- r0
6600 mov r9, rINST, lsr #8 @ r9<- A+
6602 and r9, r9, #15
6611 SET_VREG(r0, r9) @ vAA<- r0
6638 mov r9, rINST, lsr #8 @ r9<- A+
6640 and r9, r9, #15
6649 SET_VREG(r1, r9) @ vAA<- r1
6675 mov r9, rINST, lsr #8 @ r9<- A+
6677 and r9, r9, #15
6686 SET_VREG(r0, r9) @ vAA<- r0
6712 mov r9, rINST, lsr #8 @ r9<- A+
6714 and r9, r9, #15
6723 SET_VREG(r0, r9) @ vAA<- r0
6749 mov r9, rINST, lsr #8 @ r9<- A+
6751 and r9, r9, #15
6760 SET_VREG(r0, r9) @ vAA<- r0
6786 mov r9, rINST, lsr #8 @ r9<- AA
6799 SET_VREG(r0, r9) @ vAA<- r0
6825 mov r9, rINST, lsr #8 @ r9<- AA
6838 SET_VREG(r0, r9) @ vAA<- r0
6865 mov r9, rINST, lsr #8 @ r9<- AA
6878 SET_VREG(r0, r9) @ vAA<- r0
6904 mov r9, rINST, lsr #8 @ r9<- AA
6917 SET_VREG(r0, r9) @ vAA<- r0
6944 mov r9, rINST, lsr #8 @ r9<- AA
6957 SET_VREG(r1, r9) @ vAA<- r1
6983 mov r9, rINST, lsr #8 @ r9<- AA
6996 SET_VREG(r0, r9) @ vAA<- r0
7022 mov r9, rINST, lsr #8 @ r9<- AA
7035 SET_VREG(r0, r9) @ vAA<- r0
7061 mov r9, rINST, lsr #8 @ r9<- AA
7074 SET_VREG(r0, r9) @ vAA<- r0
7100 mov r9, rINST, lsr #8 @ r9<- AA
7113 SET_VREG(r0, r9) @ vAA<- r0
7139 mov r9, rINST, lsr #8 @ r9<- AA
7152 SET_VREG(r0, r9) @ vAA<- r0
7178 mov r9, rINST, lsr #8 @ r9<- AA
7191 SET_VREG(r0, r9) @ vAA<- r0
7913 mov r9, r1 @ save length in r9
7922 subs r9, r9, #1 @ length--, check for neg
7927 @ r0=array, r1=CCCC/FEDC, r9=length (from AA or B), r10=AA/BA
7931 subs r9, r9, #1 @ count--
7936 cmp r9, #4 @ length was initially 5?
7940 sub r9, r9, #1 @ count--
7945 subs r9, r9, #1 @ count--
7992 mov r9, r1 @ save length in r9
8001 subs r9, r9, #1 @ length--, check for neg
8006 @ r0=array, r1=CCCC/FEDC, r9=length (from AA or B), r10=AA/BA
8010 subs r9, r9, #1 @ count--
8015 cmp r9, #4 @ length was initially 5?
8019 sub r9, r9, #1 @ count--
8024 subs r9, r9, #1 @ count--
8054 SET_VREG(r0, r9) @ vAA<- r0
8060 SET_VREG(r0, r9) @ vAA<- r0
8066 SET_VREG(r0, r9) @ vAA<- r0
8072 SET_VREG(r0, r9) @ vAA<- r0
8895 stmia r0, {r9-r10} @ vAA/vAA+1<- r9/r10
8904 stmia r9, {r0-r1} @ vAA/vAA+1<- r0/r1
8913 stmia r9, {r0-r1} @ vAA/vAA+1<- r0/r1
8922 stmia r9, {r0-r1} @ vAA/vAA+1<- r0/r1
8930 stmia r9, {r0-r1} @ vAA/vAA+1<- r0/r1
8938 stmia r9, {r0-r1} @ vAA/vAA+1<- r0/r1
8946 stmia r9, {r0-r1} @ vAA/vAA+1<- r0/r1
8966 FETCH(r9, 2) @ r9<- FEDC
8969 4: and ip, r9, #0xf000 @ isolate F
8971 3: and ip, r9, #0x0f00 @ isolate E
8973 2: and ip, r9, #0x00f0 @ isolate D
8975 1: and ip, r9, #0x000f @ isolate C
8978 ldr r9, .LOP_EXECUTE_INLINE_table @ table of InlineOperation
9187 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
9193 FETCH_ADVANCE_INST_RB(r9) @ update rPC, load rINST
9254 add rPC, rPC, r9 @ update rPC
9298 ldrh r9, [r0, #offMethod_registersSize] @ r9<- methodToCall->regsSize
9318 ldrh r9, [r0, #offMethod_registersSize] @ r9<- methodToCall->regsSize
9322 @ r0=methodToCall, r1=GFED, r3=outSize, r2=count, r9=regSize, r10=outs
9349 .LinvokeArgsDone: @ r0=methodToCall, r3=outSize, r9=regSize
9354 sub r1, r1, r9, lsl #2 @ r1<- newFp (old savearea - regsSize)
9357 ldr r9, [rGLUE, #offGlue_interpStackEnd] @ r9<- interpStackEnd
9359 cmp r3, r9 @ bottom < interpStackEnd?
9371 mov r9, #0
9372 str r9, [r10, #offStackSaveArea_returnAddr]
9393 ldrh r9, [r2] @ r9 <- load INST from new PC
9399 @ r0=methodToCall, r1=newFp, r2=self, r3=newMethodClass, r9=newINST
9405 GET_PREFETCHED_OPCODE(ip, r9) @ extract prefetched opcode from r9
9406 mov rINST, r9 @ publish new rINST
9413 GET_PREFETCHED_OPCODE(ip, r9) @ extract prefetched opcode from r9
9414 mov rINST, r9 @ publish new rINST
9423 ldr r9, [r3, #offThread_jniLocal_topCookie] @ r9<- thread->localRef->...
9425 str r9, [r10, #offStackSaveArea_localRefCookie] @newFp->localRefCookie=top
9426 mov r9, r3 @ r9<- glue->self (preserve)
9447 @ native return; r9=self, r10=newSaveArea
9450 ldr r1, [r9, #offThread_exception] @ check for exception
9451 str rFP, [r9, #offThread_curFrame] @ self->curFrame = fp
9453 str r0, [r9, #offThread_jniLocal_topCookie] @ new top <- old top
9487 mov r1, r9 @ A1<- methodCallRange
9505 mov r9, #0
9510 ldr r9, [r0, #offStackSaveArea_savedPc] @ r9 = saveArea->savedPc
9592 mov r2, r9 @ r2<- exception
9626 mov r0, r9 @ r0<- exception
9634 streq r9, [r10, #offThread_exception] @ yes, restore the exception
9637 .LnotCaughtLocally: @ r9=exception, r10=self
9660 ldr r3, [r9, #offObject_clazz]
9668 str r9, [r10, #offThread_exception] @ restore exception
9669 mov r0, r9 @ r0<- exception