122 	erombase = R_REG(sii->osh, &cc->eromptr);  in ai_scan()
134 		OSL_PCI_WRITE_CONFIG(sii->osh, PCI_BAR0_WIN, 4, erombase);  in ai_scan()
422 	return (R_REG(sii->osh, &ai->oobselouta30) & 0x1f);  in ai_flag()
435 	W_REG(sii->osh, (uint32 *)((uint8 *)ai+offset), val);  in ai_write_wrap_reg()
470 	return (((R_REG(sii->osh, &ai->ioctrl) & (SICF_FGC | SICF_CLOCK_EN)) == SICF_CLOCK_EN) &&  in ai_iscoreup()
471 	        ((R_REG(sii->osh, &ai->resetctrl) & AIRC_RESET) == 0));  in ai_iscoreup()
549 		w = (R_REG(sii->osh, r) & ~mask) | val;  in ai_corereg()
550 		W_REG(sii->osh, r, w);  in ai_corereg()
554 	w = R_REG(sii->osh, r);  in ai_corereg()
580 	if (R_REG(sii->osh, &ai->resetctrl) & AIRC_RESET)  in ai_core_disable()
583 	W_REG(sii->osh, &ai->ioctrl, bits);  in ai_core_disable()
584 	dummy = R_REG(sii->osh, &ai->ioctrl);  in ai_core_disable()
587 	W_REG(sii->osh, &ai->resetctrl, AIRC_RESET);  in ai_core_disable()
615 	W_REG(sii->osh, &ai->ioctrl, (bits | SICF_FGC | SICF_CLOCK_EN));  in ai_core_reset()
616 	dummy = R_REG(sii->osh, &ai->ioctrl);  in ai_core_reset()
617 	W_REG(sii->osh, &ai->resetctrl, 0);  in ai_core_reset()
620 	W_REG(sii->osh, &ai->ioctrl, (bits | SICF_CLOCK_EN));  in ai_core_reset()
621 	dummy = R_REG(sii->osh, &ai->ioctrl);  in ai_core_reset()
640 		w = ((R_REG(sii->osh, &ai->ioctrl) & ~mask) | val);  in ai_core_cflags_wo()
641 		W_REG(sii->osh, &ai->ioctrl, w);  in ai_core_cflags_wo()
659 		w = ((R_REG(sii->osh, &ai->ioctrl) & ~mask) | val);  in ai_core_cflags()
660 		W_REG(sii->osh, &ai->ioctrl, w);  in ai_core_cflags()
663 	return R_REG(sii->osh, &ai->ioctrl);  in ai_core_cflags()
681 		w = ((R_REG(sii->osh, &ai->iostatus) & ~mask) | val);  in ai_core_sflags()
682 		W_REG(sii->osh, &ai->iostatus, w);  in ai_core_sflags()
685 	return R_REG(sii->osh, &ai->iostatus);  in ai_core_sflags()