42 static uint _sb_coreidx(si_info_t *sii, uint32 sba);
43 static uint _sb_scan(si_info_t *sii, uint32 sba, void *regs, uint bus, uint32 sbba,
45 static uint32 _sb_coresba(si_info_t *sii);
61 static uint32
62 sb_read_sbreg(si_info_t *sii, volatile uint32 *sbr)  in sb_read_sbreg()
65 	uint32 val, intr_val = 0;  in sb_read_sbreg()
78 		sbr = (volatile uint32 *)((uintptr)sbr & ~(1 << 11)); /* mask out bit 11 */  in sb_read_sbreg()
93 sb_write_sbreg(si_info_t *sii, volatile uint32 *sbr, uint32 v)  in sb_write_sbreg()
96 	volatile uint32 dummy;  in sb_write_sbreg()
97 	uint32 intr_val = 0;  in sb_write_sbreg()
110 		sbr = (volatile uint32 *)((uintptr)sbr & ~(1 << 11)); /* mask out bit 11 */  in sb_write_sbreg()
164 	uint32 vec;  in sb_setint()
178 _sb_coreidx(si_info_t *sii, uint32 sba)  in _sb_coreidx()
189 static uint32
192 	uint32 sbaddr;  in _sb_coresba()
203 		sbaddr = OSL_PCI_READ_CONFIG(sii->osh, PCI_BAR0_WIN, sizeof(uint32));  in _sb_coresba()
209 		sbaddr  = (uint32)tmp << 12;  in _sb_coresba()
211 		sbaddr |= (uint32)tmp << 16;  in _sb_coresba()
213 		sbaddr |= (uint32)tmp << 24;  in _sb_coresba()
219 		sbaddr = (uint32)(uintptr)sii->curmap;  in _sb_coresba()
259 sb_core_cflags_wo(si_t *sih, uint32 mask, uint32 val)  in sb_core_cflags_wo()
263 	uint32 w;  in sb_core_cflags_wo()
277 uint32
278 sb_core_cflags(si_t *sih, uint32 mask, uint32 val)  in sb_core_cflags()
282 	uint32 w;  in sb_core_cflags()
303 uint32
304 sb_core_sflags(si_t *sih, uint32 mask, uint32 val)  in sb_core_sflags()
308 	uint32 w;  in sb_core_sflags()
354 	uint32 *r = NULL;  in sb_corereg()
378 		r = (uint32 *)((uchar *)sii->common_info->regs[coreidx] + regoff);  in sb_corereg()
386 			r = (uint32 *)((char *)sii->curmap + PCI_16KB0_CCREGS_OFFSET + regoff);  in sb_corereg()
393 				r = (uint32 *)((char *)sii->curmap +  in sb_corereg()
396 				r = (uint32 *)((char *)sii->curmap +  in sb_corereg()
410 		r = (uint32*) ((uchar*)sb_setcoreidx(&sii->pub, coreidx) + regoff);  in sb_corereg()
457 _sb_scan(si_info_t *sii, uint32 sba, void *regs, uint bus, uint32 sbba, uint numcores)  in _sb_scan()
492 			uint32 ccrev = sb_corerev(&sii->pub);  in _sb_scan()
521 			uint32 nsbba = R_SBREG(sii, &sb->sbadmatch1);  in _sb_scan()
551 	uint32 origsba;  in sb_scan()
597 	uint32 sbaddr = sii->common_info->coresba[coreidx];  in _sb_setcoreidx()
647 static volatile uint32 *
651 	volatile uint32 *addrm;  in sb_admatch()
695 uint32
706 uint32
748 sb_core_disable(si_t *sih, uint32 bits)  in sb_core_disable()
751 	volatile uint32 dummy;  in sb_core_disable()
805 sb_core_reset(si_t *sih, uint32 bits, uint32 resetbits)  in sb_core_reset()
809 	volatile uint32 dummy;  in sb_core_reset()
906 uint32
907 sb_set_initiator_to(si_t *sih, uint32 to, uint idx)  in sb_set_initiator_to()
912 	uint32 tmp, ret = 0xffffffff;  in sb_set_initiator_to()
958 uint32
959 sb_base(uint32 admatch)  in sb_base()
961 	uint32 base;  in sb_base()
982 uint32
983 sb_size(uint32 admatch)  in sb_size()
985 	uint32 size;  in sb_size()