| /dalvik/vm/mterp/armv5te/ |
| D | header.S | 99 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ argument
138 #define FETCH_ADVANCE_INST_RB(_reg) ldrh rINST, [rPC, _reg]! argument
146 #define FETCH(_reg, _count) ldrh _reg, [rPC, #(_count*2)] argument
147 #define FETCH_S(_reg, _count) ldrsh _reg, [rPC, #(_count*2)] argument
154 #define FETCH_B(_reg, _count, _byte) ldrb _reg, [rPC, #(_count*2+_byte)] argument
159 #define GET_INST_OPCODE(_reg) and _reg, rINST, #255 argument
170 #define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #${handler_size_bits} argument
171 #define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #${handler_size_bits} argument
172 #define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #${handler_size_bits} argument
177 #define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2] argument
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| /dalvik/vm/mterp/x86/ |
| D | header.S | 118 #define GET_GLUE(_reg) movl rGLUE_SPILL(%ebp),_reg argument
141 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ argument
159 #define FETCH_INST_INDEXED(_reg) movzwl (rPC,_reg,2),rINST_FULL argument
164 #define EXTRACT_OPCODE(_reg) movzx rOPCODE,_reg argument
174 #define ADVANCE_PC_INDEXED(_reg) leal (rPC,_reg,2),rPC argument
199 #define GET_VREG(_reg, _vreg) movl (rFP,_vreg,4),_reg argument
200 #define SET_VREG(_reg, _vreg) movl _reg,(rFP,_vreg,4) argument
201 #define GET_VREG_WORD(_reg, _vreg, _offset) movl 4*(_offset)(rFP,_vreg,4),_reg argument
202 #define SET_VREG_WORD(_reg, _vreg, _offset) movl _reg,4*(_offset)(rFP,_vreg,4) argument
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| /dalvik/vm/compiler/template/armv5te/ |
| D | header.S | 85 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ argument
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| /dalvik/vm/mterp/out/ |
| D | InterpAsm-armv4t.S | 106 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ argument
145 #define FETCH_ADVANCE_INST_RB(_reg) ldrh rINST, [rPC, _reg]! argument
153 #define FETCH(_reg, _count) ldrh _reg, [rPC, #(_count*2)] argument
154 #define FETCH_S(_reg, _count) ldrsh _reg, [rPC, #(_count*2)] argument
161 #define FETCH_B(_reg, _count, _byte) ldrb _reg, [rPC, #(_count*2+_byte)] argument
166 #define GET_INST_OPCODE(_reg) and _reg, rINST, #255 argument
177 #define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #6 argument
178 #define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #6 argument
179 #define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #6 argument
184 #define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2] argument
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| D | InterpAsm-armv7-a.S | 106 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ argument
145 #define FETCH_ADVANCE_INST_RB(_reg) ldrh rINST, [rPC, _reg]! argument
153 #define FETCH(_reg, _count) ldrh _reg, [rPC, #(_count*2)] argument
154 #define FETCH_S(_reg, _count) ldrsh _reg, [rPC, #(_count*2)] argument
161 #define FETCH_B(_reg, _count, _byte) ldrb _reg, [rPC, #(_count*2+_byte)] argument
166 #define GET_INST_OPCODE(_reg) and _reg, rINST, #255 argument
177 #define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #6 argument
178 #define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #6 argument
179 #define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #6 argument
184 #define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2] argument
[all …]
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| D | InterpAsm-armv5te.S | 106 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ argument
145 #define FETCH_ADVANCE_INST_RB(_reg) ldrh rINST, [rPC, _reg]! argument
153 #define FETCH(_reg, _count) ldrh _reg, [rPC, #(_count*2)] argument
154 #define FETCH_S(_reg, _count) ldrsh _reg, [rPC, #(_count*2)] argument
161 #define FETCH_B(_reg, _count, _byte) ldrb _reg, [rPC, #(_count*2+_byte)] argument
166 #define GET_INST_OPCODE(_reg) and _reg, rINST, #255 argument
177 #define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #6 argument
178 #define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #6 argument
179 #define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #6 argument
184 #define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2] argument
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| D | InterpAsm-armv5te-vfp.S | 106 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ argument
145 #define FETCH_ADVANCE_INST_RB(_reg) ldrh rINST, [rPC, _reg]! argument
153 #define FETCH(_reg, _count) ldrh _reg, [rPC, #(_count*2)] argument
154 #define FETCH_S(_reg, _count) ldrsh _reg, [rPC, #(_count*2)] argument
161 #define FETCH_B(_reg, _count, _byte) ldrb _reg, [rPC, #(_count*2+_byte)] argument
166 #define GET_INST_OPCODE(_reg) and _reg, rINST, #255 argument
177 #define GOTO_OPCODE(_reg) add pc, rIBASE, _reg, lsl #6 argument
178 #define GOTO_OPCODE_IFEQ(_reg) addeq pc, rIBASE, _reg, lsl #6 argument
179 #define GOTO_OPCODE_IFNE(_reg) addne pc, rIBASE, _reg, lsl #6 argument
184 #define GET_VREG(_reg, _vreg) ldr _reg, [rFP, _vreg, lsl #2] argument
[all …]
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| D | InterpAsm-x86.S | 125 #define GET_GLUE(_reg) movl rGLUE_SPILL(%ebp),_reg argument
148 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ argument
166 #define FETCH_INST_INDEXED(_reg) movzwl (rPC,_reg,2),rINST_FULL argument
171 #define EXTRACT_OPCODE(_reg) movzx rOPCODE,_reg argument
181 #define ADVANCE_PC_INDEXED(_reg) leal (rPC,_reg,2),rPC argument
206 #define GET_VREG(_reg, _vreg) movl (rFP,_vreg,4),_reg argument
207 #define SET_VREG(_reg, _vreg) movl _reg,(rFP,_vreg,4) argument
208 #define GET_VREG_WORD(_reg, _vreg, _offset) movl 4*(_offset)(rFP,_vreg,4),_reg argument
209 #define SET_VREG_WORD(_reg, _vreg, _offset) movl _reg,4*(_offset)(rFP,_vreg,4) argument
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| /dalvik/vm/compiler/template/out/ |
| D | CompilerTemplateAsm-armv5te.S | 92 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ argument
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| D | CompilerTemplateAsm-armv7-a.S | 92 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ argument
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| D | CompilerTemplateAsm-armv5te-vfp.S | 92 #define SAVEAREA_FROM_FP(_reg, _fpreg) \ argument
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