1 /**************************************************************************** 2 **+-----------------------------------------------------------------------+** 3 **| |** 4 **| Copyright(c) 1998 - 2008 Texas Instruments. All rights reserved. |** 5 **| All rights reserved. |** 6 **| |** 7 **| Redistribution and use in source and binary forms, with or without |** 8 **| modification, are permitted provided that the following conditions |** 9 **| are met: |** 10 **| |** 11 **| * Redistributions of source code must retain the above copyright |** 12 **| notice, this list of conditions and the following disclaimer. |** 13 **| * Redistributions in binary form must reproduce the above copyright |** 14 **| notice, this list of conditions and the following disclaimer in |** 15 **| the documentation and/or other materials provided with the |** 16 **| distribution. |** 17 **| * Neither the name Texas Instruments nor the names of its |** 18 **| contributors may be used to endorse or promote products derived |** 19 **| from this software without specific prior written permission. |** 20 **| |** 21 **| THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |** 22 **| "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |** 23 **| LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |** 24 **| A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |** 25 **| OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |** 26 **| SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |** 27 **| LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |** 28 **| DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |** 29 **| THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |** 30 **| (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |** 31 **| OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |** 32 **| |** 33 **+-----------------------------------------------------------------------+** 34 ****************************************************************************/ 35 36 /***************************************************************************/ 37 /* */ 38 /* MODULE: tx.h */ 39 /* PURPOSE: Tx module Header file */ 40 /* */ 41 /***************************************************************************/ 42 #ifndef _TX_DATA_H_ 43 #define _TX_DATA_H_ 44 45 46 #include "MsduList.h" 47 #include "paramOut.h" 48 #include "DataCtrl_Api.h" 49 50 #define DEF_TX_PORT_STATUS CLOSE 51 52 #define DEF_CURRENT_PRIVACY_INVOKED_MODE FALSE 53 54 #define DEF_EAPOL_ENCRYPTION_STATUS FALSE 55 56 #define DEF_SCHEDULER_THRESHOLD 32 57 #define DEF_IS_SCHEDULER_IN_WORK FALSE 58 #define SCHEDULER_TIMER 1000 59 #define THROUGHPUT_TIMER 1000 60 61 #define DEF_HAL_INTERFACE_STATUS TX_DATA_OPEN 62 /*Ronnie: add GWSI IF status and the following defines*/ 63 #define DEF_GWSI_INTERFACE_STATUS GWSI_OPEN 64 65 66 #define MAX_NUMBER_OF_PRIORITIES 1 67 68 typedef struct 69 { 70 UINT32 dbgDropedPacketsCounter; /* Pkts that failed to be inserted into Q */ 71 UINT32 dbgInsertToMsduListBytes[MAX_NUM_OF_TX_QUEUES]; /* Bytes inserted into Q */ 72 UINT32 dbgInsertToMsduListPackets[MAX_NUM_OF_TX_QUEUES]; /* Pkts that inserted into Q */ 73 UINT32 dbgDropedFromMsduListPackets[MAX_NUM_OF_TX_QUEUES]; /* Pkts that failed to be inserted into Q */ 74 UINT32 dbgScheduledOutPackets[MAX_NUM_OF_TX_QUEUES]; /* Pkts scheduled for transmission per Q */ 75 UINT32 dbgSendToGwsiQosPackets[MAX_NUM_OF_TX_QUEUES]; /* Pkts sent to GWSI layer */ 76 UINT32 dbgDroppedDueExpiryTimePackets[MAX_NUM_OF_TX_QUEUES]; /* Pkts dropped due to expiry time */ 77 UINT32 dbgNumOfMsduFreeInTxTransfer[MAX_NUM_OF_TX_QUEUES]; /* Pkts freed on XFER */ 78 UINT32 dbgNumOfMsduTxTransferCB[MAX_NUM_OF_TX_QUEUES]; /* num of XFER done CB calls */ 79 UINT32 dbgNumOfMsduXferDoneInShceduler[MAX_NUM_OF_TX_QUEUES]; /* Pkts for which XFER done was received in scheduler */ 80 UINT32 dbgNumOfMsduSuccessInScheduler[MAX_NUM_OF_TX_QUEUES]; /* Pkts fof which success was received in scheduler */ 81 UINT32 dbgNumOfMsduPendingInScheduler[MAX_NUM_OF_TX_QUEUES]; /* Pkts for which pending was received in scheduler */ 82 UINT32 dbgNumOfMsduBusyInScheduler[MAX_NUM_OF_TX_QUEUES]; /* Pkts for which busy was received in scheduler */ 83 UINT32 dbgNumOfMsduErrorInScheduler[MAX_NUM_OF_TX_QUEUES]; /* Pkts for which error was received in scheduler */ 84 UINT32 dbgNumOfsendPacketComplete[MAX_NUM_OF_TX_QUEUES]; /* Pkts that reached complete CB */ 85 UINT32 dbgTxCmpltOk[MAX_NUM_OF_TX_QUEUES]; /* Pkts that reached complete CB with status OK */ 86 UINT32 dbgTxCmpltError[MAX_NUM_OF_TX_QUEUES]; /* Pkts that reached complete CB with status NOK */ 87 UINT32 dbgTxCmpltOkBytes[MAX_NUM_OF_TX_QUEUES]; /* Acknowledged bytes (complete status OK) */ 88 UINT32 dbgNumOfNullMsdu; /* number of NULL MSDUs altogether */ 89 } txDataDbgCounters_t; 90 91 92 typedef struct 93 { 94 struct 95 { 96 UINT32 core; /* Cumulative core jitter */ 97 UINT32 xfer; /* Cumulative XFER jitter */ 98 UINT32 fw; /* Cumulative firmware jitter */ 99 UINT32 air; /* Cumulative air jitter */ 100 } jitter; 101 102 struct 103 { 104 UINT32 core; /* Cumulative core delay */ 105 UINT32 xfer; /* Cumulative XFER delay */ 106 UINT32 wait; /* Cumulative XFER wait for firmware to wake-up */ 107 UINT32 fw; /* Cumulative firmware delay */ 108 UINT32 air; /* Cumulative air delay */ 109 } delay; 110 111 struct 112 { 113 UINT32 core; /* Last core delay */ 114 UINT32 xfer; /* Last xfer delay */ 115 UINT32 fw; /* Last firmware duration */ 116 UINT32 air; /* Last TX air duration */ 117 } last_delay; 118 119 struct 120 { 121 UINT32 core; /* Maximum core delay */ 122 UINT32 xfer; /* Maximum xfer delay */ 123 UINT32 fw; /* Maximum firmware duration */ 124 UINT32 air; /* Maximum TX air duration */ 125 } max_delay; 126 127 struct 128 { 129 UINT32 core; /* Number of packets passed through core */ 130 UINT32 xfer; /* Number of packets transferred via XFER during last second */ 131 UINT32 wait; /* Number of times XFER waited for firmware to wake-up */ 132 UINT32 fw; /* Packets that reached complete CB with status OK */ 133 UINT32 fw_err; /* Packets that reached complete CB with status NOK */ 134 } count; 135 136 } txDataJitter_t; 137 138 typedef struct 139 { 140 headerConvetMode_e headerConverMode; /* header converting mode */ 141 acTrfcType_e tag_ToAcClsfrTable[MAX_NUM_OF_802_1d_TAGS]; /* tag to AC classification */ 142 } txQosParams_t; 143 144 typedef struct 145 { 146 /* Handles */ 147 TI_HANDLE hCtrlData; 148 TI_HANDLE hTnetwDrv; 149 TI_HANDLE hWhalCtrl; 150 TI_HANDLE hOs; 151 TI_HANDLE hReport; 152 TI_HANDLE hMemMngr; 153 TI_HANDLE pSchedulerTimer; 154 TI_HANDLE pCreditTimer; 155 TI_HANDLE hSiteMgr; 156 TI_HANDLE hEvHandler; 157 TI_HANDLE hQosMngr; 158 TI_HANDLE hPowerMgr; 159 TI_HANDLE pThroughputTimer; 160 TI_HANDLE pAirThroughputTimer; 161 TI_HANDLE pJitterTimer; 162 TI_HANDLE TxEventDistributor; 163 TI_HANDLE hBufferPool; /* Packet ID buffer pool */ 164 TI_HANDLE pVadTimer; /* VAD timer handle */ 165 /* critical section protect */ 166 void* hCriticalSectionProtect; 167 168 BOOL bSchedulerTimerRunning; 169 170 /* Tx flow parameters */ 171 portStatus_e txDataPortStatus; 172 portStatus_e savePortStatus; /* save value for recovery */ 173 BOOL txDataCurrentPrivacyInvokedMode; 174 BOOL saveTxDataCurrentPrivacyInvokedMode;/* save value for recovery */ 175 BOOL txDataEapolEncryptionStatus; 176 BOOL saveTxDataEapolEncryptionStatus; /* save value for recovery */ 177 BOOL txDataIsSchedulerInWork; 178 179 /* Tx queues */ 180 UINT8 txDataNumOfQueues; 181 MsduList_t* mngMsduList; 182 MsduList_t* dataMsduListArr[MAX_NUM_OF_TX_QUEUES]; 183 int txDataNumOfMsdusToTransmit; 184 185 UINT8 QidToAcTable[MAX_NUM_OF_TX_QUEUES]; 186 187 UINT32 creditCalculationTimeout; 188 189 /* indicate the percentage of the MSDU lifetime under which the driver * 190 * will send it to the Fw, */ 191 UINT8 uFracOfLifeTimeToDrop; 192 /* GWSI state */ 193 txDataGwsiInterfaceStatus_e txDataGwsiInterfaceStatus; 194 195 txDataHalInterfaceStatus_t txDataHalInterfaceStatus; 196 197 198 /* Counters */ 199 txDataCounters_t txDataCounters[MAX_NUM_OF_TX_QUEUES]; /* Save Tx statistics per Tx-queue. */ 200 txDataCounters_t txDataReportedCounters[MAX_NUM_OF_TX_QUEUES]; /* Tx statistics per Tx-queue, cleared on read */ 201 txDataCounters_t tempTxDataCounters[MAX_NUM_OF_TX_QUEUES]; /* temporary storage for IOCTL retrieval. */ 202 UINT32 currentConsecutiveRetryFail; /* current consecutive number of tx failures due to max retry */ 203 204 /* debug counters */ 205 txDataDbgCounters_t txDataDbgCounters; 206 207 /* Jitter debug info */ 208 #if defined(TI_DBG) 209 txDataJitter_t txJitter [MAX_NUM_OF_TX_QUEUES]; 210 #endif 211 212 /* Tx Disabling flag */ 213 txDisableReason_e txDisable; 214 215 /* QOS parameters */ 216 acTrfcCtrl_t txDataAcTrfcCtrl[MAX_NUM_OF_AC]; 217 txQosParams_t txDataQosParams; 218 219 /* timer throughput per tx queue */ 220 BOOL txThroughputTimerEnable; 221 222 /* timer air throughput per tx queue */ 223 BOOL txAirThroughputTimerEnable; 224 225 /* jitter periodic timer flag */ 226 BOOL txJitterTimerEnable; 227 228 /* credit calculation timer is enabled from registry */ 229 BOOL bCreditCalcTimerEnabled; 230 /* credit calculation timer is running */ 231 BOOL bCreditCalcTimerRunning; 232 233 /* enable to delay MSDU because of medium usage exeeded */ 234 BOOL admCtrlDelayDueToMediumTimeOverUsage; 235 236 /* enable/disable adm down grade */ 237 BOOL admissionDownGradeEnable; 238 239 /* power control params and flag */ 240 BOOL hwRequest; /* HW request flag */ 241 UINT32 powerCtrlId; /* txDta Id for power control */ 242 243 BOOL txDataAvailableQueue[MAX_NUM_OF_TX_QUEUES]; 244 245 /* encryption params */ 246 UINT8 encryptionFieldSize; /* size to reserve in WLAN header fpr encryption */ 247 UINT8 saveEncryptionFieldSize;/* save value for recovery */ 248 249 BOOL bVadTimerEnabled; 250 UINT16 vadTimerDuration; /* in milliseconds */ 251 } txData_t; 252 253 /* test functions */ 254 /*----------------*/ 255 void Test_HeaderConvertion(TI_HANDLE hTxData, mem_MSDU_T *pMsdu); 256 257 #endif 258