1 /* 2 * Copyright (C) 2008 Apple Inc. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY APPLE INC. ``AS IS'' AND ANY 14 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 15 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 16 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL APPLE INC. OR 17 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 18 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY 21 * OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 23 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26 #ifndef MacroAssembler_h 27 #define MacroAssembler_h 28 29 #include <wtf/Platform.h> 30 31 #if ENABLE(ASSEMBLER) 32 33 #if PLATFORM_ARM_ARCH(7) 34 #include "MacroAssemblerARMv7.h" 35 namespace JSC { typedef MacroAssemblerARMv7 MacroAssemblerBase; }; 36 37 #elif PLATFORM(ARM) 38 #include "MacroAssemblerARM.h" 39 namespace JSC { typedef MacroAssemblerARM MacroAssemblerBase; }; 40 41 #elif PLATFORM(X86) 42 #include "MacroAssemblerX86.h" 43 namespace JSC { typedef MacroAssemblerX86 MacroAssemblerBase; }; 44 45 #elif PLATFORM(X86_64) 46 #include "MacroAssemblerX86_64.h" 47 namespace JSC { typedef MacroAssemblerX86_64 MacroAssemblerBase; }; 48 49 #else 50 #error "The MacroAssembler is not supported on this platform." 51 #endif 52 53 54 namespace JSC { 55 56 class MacroAssembler : public MacroAssemblerBase { 57 public: 58 59 using MacroAssemblerBase::pop; 60 using MacroAssemblerBase::jump; 61 using MacroAssemblerBase::branch32; 62 using MacroAssemblerBase::branch16; 63 #if PLATFORM(X86_64) 64 using MacroAssemblerBase::branchPtr; 65 using MacroAssemblerBase::branchTestPtr; 66 #endif 67 68 69 // Platform agnostic onvenience functions, 70 // described in terms of other macro assembly methods. pop()71 void pop() 72 { 73 addPtr(Imm32(sizeof(void*)), stackPointerRegister); 74 } 75 76 void peek(RegisterID dest, int index = 0) 77 { 78 loadPtr(Address(stackPointerRegister, (index * sizeof(void*))), dest); 79 } 80 81 void poke(RegisterID src, int index = 0) 82 { 83 storePtr(src, Address(stackPointerRegister, (index * sizeof(void*)))); 84 } 85 86 void poke(Imm32 value, int index = 0) 87 { 88 store32(value, Address(stackPointerRegister, (index * sizeof(void*)))); 89 } 90 91 void poke(ImmPtr imm, int index = 0) 92 { 93 storePtr(imm, Address(stackPointerRegister, (index * sizeof(void*)))); 94 } 95 96 97 // Backwards banches, these are currently all implemented using existing forwards branch mechanisms. branchPtr(Condition cond,RegisterID op1,ImmPtr imm,Label target)98 void branchPtr(Condition cond, RegisterID op1, ImmPtr imm, Label target) 99 { 100 branchPtr(cond, op1, imm).linkTo(target, this); 101 } 102 branch32(Condition cond,RegisterID op1,RegisterID op2,Label target)103 void branch32(Condition cond, RegisterID op1, RegisterID op2, Label target) 104 { 105 branch32(cond, op1, op2).linkTo(target, this); 106 } 107 branch32(Condition cond,RegisterID op1,Imm32 imm,Label target)108 void branch32(Condition cond, RegisterID op1, Imm32 imm, Label target) 109 { 110 branch32(cond, op1, imm).linkTo(target, this); 111 } 112 branch32(Condition cond,RegisterID left,Address right,Label target)113 void branch32(Condition cond, RegisterID left, Address right, Label target) 114 { 115 branch32(cond, left, right).linkTo(target, this); 116 } 117 branch16(Condition cond,BaseIndex left,RegisterID right,Label target)118 void branch16(Condition cond, BaseIndex left, RegisterID right, Label target) 119 { 120 branch16(cond, left, right).linkTo(target, this); 121 } 122 branchTestPtr(Condition cond,RegisterID reg,Label target)123 void branchTestPtr(Condition cond, RegisterID reg, Label target) 124 { 125 branchTestPtr(cond, reg).linkTo(target, this); 126 } 127 jump(Label target)128 void jump(Label target) 129 { 130 jump().linkTo(target, this); 131 } 132 133 134 // Ptr methods 135 // On 32-bit platforms (i.e. x86), these methods directly map onto their 32-bit equivalents. 136 #if !PLATFORM(X86_64) addPtr(RegisterID src,RegisterID dest)137 void addPtr(RegisterID src, RegisterID dest) 138 { 139 add32(src, dest); 140 } 141 addPtr(Imm32 imm,RegisterID srcDest)142 void addPtr(Imm32 imm, RegisterID srcDest) 143 { 144 add32(imm, srcDest); 145 } 146 addPtr(ImmPtr imm,RegisterID dest)147 void addPtr(ImmPtr imm, RegisterID dest) 148 { 149 add32(Imm32(imm), dest); 150 } 151 addPtr(Imm32 imm,RegisterID src,RegisterID dest)152 void addPtr(Imm32 imm, RegisterID src, RegisterID dest) 153 { 154 add32(imm, src, dest); 155 } 156 andPtr(RegisterID src,RegisterID dest)157 void andPtr(RegisterID src, RegisterID dest) 158 { 159 and32(src, dest); 160 } 161 andPtr(Imm32 imm,RegisterID srcDest)162 void andPtr(Imm32 imm, RegisterID srcDest) 163 { 164 and32(imm, srcDest); 165 } 166 orPtr(RegisterID src,RegisterID dest)167 void orPtr(RegisterID src, RegisterID dest) 168 { 169 or32(src, dest); 170 } 171 orPtr(ImmPtr imm,RegisterID dest)172 void orPtr(ImmPtr imm, RegisterID dest) 173 { 174 or32(Imm32(imm), dest); 175 } 176 orPtr(Imm32 imm,RegisterID dest)177 void orPtr(Imm32 imm, RegisterID dest) 178 { 179 or32(imm, dest); 180 } 181 rshiftPtr(RegisterID shift_amount,RegisterID dest)182 void rshiftPtr(RegisterID shift_amount, RegisterID dest) 183 { 184 rshift32(shift_amount, dest); 185 } 186 rshiftPtr(Imm32 imm,RegisterID dest)187 void rshiftPtr(Imm32 imm, RegisterID dest) 188 { 189 rshift32(imm, dest); 190 } 191 subPtr(RegisterID src,RegisterID dest)192 void subPtr(RegisterID src, RegisterID dest) 193 { 194 sub32(src, dest); 195 } 196 subPtr(Imm32 imm,RegisterID dest)197 void subPtr(Imm32 imm, RegisterID dest) 198 { 199 sub32(imm, dest); 200 } 201 subPtr(ImmPtr imm,RegisterID dest)202 void subPtr(ImmPtr imm, RegisterID dest) 203 { 204 sub32(Imm32(imm), dest); 205 } 206 xorPtr(RegisterID src,RegisterID dest)207 void xorPtr(RegisterID src, RegisterID dest) 208 { 209 xor32(src, dest); 210 } 211 xorPtr(Imm32 imm,RegisterID srcDest)212 void xorPtr(Imm32 imm, RegisterID srcDest) 213 { 214 xor32(imm, srcDest); 215 } 216 217 loadPtr(ImplicitAddress address,RegisterID dest)218 void loadPtr(ImplicitAddress address, RegisterID dest) 219 { 220 load32(address, dest); 221 } 222 loadPtr(BaseIndex address,RegisterID dest)223 void loadPtr(BaseIndex address, RegisterID dest) 224 { 225 load32(address, dest); 226 } 227 loadPtr(void * address,RegisterID dest)228 void loadPtr(void* address, RegisterID dest) 229 { 230 load32(address, dest); 231 } 232 loadPtrWithAddressOffsetPatch(Address address,RegisterID dest)233 DataLabel32 loadPtrWithAddressOffsetPatch(Address address, RegisterID dest) 234 { 235 return load32WithAddressOffsetPatch(address, dest); 236 } 237 setPtr(Condition cond,RegisterID left,Imm32 right,RegisterID dest)238 void setPtr(Condition cond, RegisterID left, Imm32 right, RegisterID dest) 239 { 240 set32(cond, left, right, dest); 241 } 242 storePtr(RegisterID src,ImplicitAddress address)243 void storePtr(RegisterID src, ImplicitAddress address) 244 { 245 store32(src, address); 246 } 247 storePtr(RegisterID src,BaseIndex address)248 void storePtr(RegisterID src, BaseIndex address) 249 { 250 store32(src, address); 251 } 252 storePtr(RegisterID src,void * address)253 void storePtr(RegisterID src, void* address) 254 { 255 store32(src, address); 256 } 257 storePtr(ImmPtr imm,ImplicitAddress address)258 void storePtr(ImmPtr imm, ImplicitAddress address) 259 { 260 store32(Imm32(imm), address); 261 } 262 storePtr(ImmPtr imm,void * address)263 void storePtr(ImmPtr imm, void* address) 264 { 265 store32(Imm32(imm), address); 266 } 267 storePtrWithAddressOffsetPatch(RegisterID src,Address address)268 DataLabel32 storePtrWithAddressOffsetPatch(RegisterID src, Address address) 269 { 270 return store32WithAddressOffsetPatch(src, address); 271 } 272 273 branchPtr(Condition cond,RegisterID left,RegisterID right)274 Jump branchPtr(Condition cond, RegisterID left, RegisterID right) 275 { 276 return branch32(cond, left, right); 277 } 278 branchPtr(Condition cond,RegisterID left,ImmPtr right)279 Jump branchPtr(Condition cond, RegisterID left, ImmPtr right) 280 { 281 return branch32(cond, left, Imm32(right)); 282 } 283 branchPtr(Condition cond,RegisterID left,Address right)284 Jump branchPtr(Condition cond, RegisterID left, Address right) 285 { 286 return branch32(cond, left, right); 287 } 288 branchPtr(Condition cond,Address left,RegisterID right)289 Jump branchPtr(Condition cond, Address left, RegisterID right) 290 { 291 return branch32(cond, left, right); 292 } 293 branchPtr(Condition cond,AbsoluteAddress left,RegisterID right)294 Jump branchPtr(Condition cond, AbsoluteAddress left, RegisterID right) 295 { 296 return branch32(cond, left, right); 297 } 298 branchPtr(Condition cond,Address left,ImmPtr right)299 Jump branchPtr(Condition cond, Address left, ImmPtr right) 300 { 301 return branch32(cond, left, Imm32(right)); 302 } 303 branchPtr(Condition cond,AbsoluteAddress left,ImmPtr right)304 Jump branchPtr(Condition cond, AbsoluteAddress left, ImmPtr right) 305 { 306 return branch32(cond, left, Imm32(right)); 307 } 308 branchTestPtr(Condition cond,RegisterID reg,RegisterID mask)309 Jump branchTestPtr(Condition cond, RegisterID reg, RegisterID mask) 310 { 311 return branchTest32(cond, reg, mask); 312 } 313 314 Jump branchTestPtr(Condition cond, RegisterID reg, Imm32 mask = Imm32(-1)) 315 { 316 return branchTest32(cond, reg, mask); 317 } 318 319 Jump branchTestPtr(Condition cond, Address address, Imm32 mask = Imm32(-1)) 320 { 321 return branchTest32(cond, address, mask); 322 } 323 324 Jump branchTestPtr(Condition cond, BaseIndex address, Imm32 mask = Imm32(-1)) 325 { 326 return branchTest32(cond, address, mask); 327 } 328 329 branchAddPtr(Condition cond,RegisterID src,RegisterID dest)330 Jump branchAddPtr(Condition cond, RegisterID src, RegisterID dest) 331 { 332 return branchAdd32(cond, src, dest); 333 } 334 branchSubPtr(Condition cond,Imm32 imm,RegisterID dest)335 Jump branchSubPtr(Condition cond, Imm32 imm, RegisterID dest) 336 { 337 return branchSub32(cond, imm, dest); 338 } 339 #endif 340 341 }; 342 343 } // namespace JSC 344 345 #endif // ENABLE(ASSEMBLER) 346 347 #endif // MacroAssembler_h 348