1 /*
2 * Copyright (C) 2009 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 /*
18 * This file is included by Codegen-armv5te.c, and implements architecture
19 * variant-specific code.
20 */
21
22 #define USE_IN_CACHE_HANDLER 1
23
24 /*
25 * Determine the initial instruction set to be used for this trace.
26 * Later components may decide to change this.
27 */
dvmCompilerInstructionSet(CompilationUnit * cUnit)28 JitInstructionSetType dvmCompilerInstructionSet(CompilationUnit *cUnit)
29 {
30 return DALVIK_JIT_THUMB;
31 }
32
33 /*
34 * Jump to the out-of-line handler in ARM mode to finish executing the
35 * remaining of more complex instructions.
36 */
genDispatchToHandler(CompilationUnit * cUnit,TemplateOpCode opCode)37 static void genDispatchToHandler(CompilationUnit *cUnit, TemplateOpCode opCode)
38 {
39 #if USE_IN_CACHE_HANDLER
40 /*
41 * NOTE - In practice BLX only needs one operand, but since the assembler
42 * may abort itself and retry due to other out-of-range conditions we
43 * cannot really use operand[0] to store the absolute target address since
44 * it may get clobbered by the final relative offset. Therefore,
45 * we fake BLX_1 is a two operand instruction and the absolute target
46 * address is stored in operand[1].
47 */
48 newLIR2(cUnit, THUMB_BLX_1,
49 (int) gDvmJit.codeCache + templateEntryOffsets[opCode],
50 (int) gDvmJit.codeCache + templateEntryOffsets[opCode]);
51 newLIR2(cUnit, THUMB_BLX_2,
52 (int) gDvmJit.codeCache + templateEntryOffsets[opCode],
53 (int) gDvmJit.codeCache + templateEntryOffsets[opCode]);
54 #else
55 /*
56 * In case we want to access the statically compiled handlers for
57 * debugging purposes, define USE_IN_CACHE_HANDLER to 0
58 */
59 void *templatePtr;
60
61 #define JIT_TEMPLATE(X) extern void dvmCompiler_TEMPLATE_##X();
62 #include "../../../template/armv5te/TemplateOpList.h"
63 #undef JIT_TEMPLATE
64 switch (opCode) {
65 #define JIT_TEMPLATE(X) \
66 case TEMPLATE_##X: { templatePtr = dvmCompiler_TEMPLATE_##X; break; }
67 #include "../../../template/armv5te/TemplateOpList.h"
68 #undef JIT_TEMPLATE
69 default: templatePtr = NULL;
70 }
71 loadConstant(cUnit, r7, (int) templatePtr);
72 newLIR1(cUnit, THUMB_BLX_R, r7);
73 #endif
74 }
75
76 /* Architecture-specific initializations and checks go here */
dvmCompilerArchInit(void)77 bool dvmCompilerArchInit(void)
78 {
79 /* First, declare dvmCompiler_TEMPLATE_XXX for each template */
80 #define JIT_TEMPLATE(X) extern void dvmCompiler_TEMPLATE_##X();
81 #include "../../../template/armv5te/TemplateOpList.h"
82 #undef JIT_TEMPLATE
83
84 int i = 0;
85 extern void dvmCompilerTemplateStart(void);
86
87 /*
88 * Then, populate the templateEntryOffsets array with the offsets from the
89 * the dvmCompilerTemplateStart symbol for each template.
90 */
91 #define JIT_TEMPLATE(X) templateEntryOffsets[i++] = \
92 (intptr_t) dvmCompiler_TEMPLATE_##X - (intptr_t) dvmCompilerTemplateStart;
93 #include "../../../template/armv5te/TemplateOpList.h"
94 #undef JIT_TEMPLATE
95
96 /* Codegen-specific assumptions */
97 assert(offsetof(ClassObject, vtable) < 128 &&
98 (offsetof(ClassObject, vtable) & 0x3) == 0);
99 assert(offsetof(ArrayObject, length) < 128 &&
100 (offsetof(ArrayObject, length) & 0x3) == 0);
101 assert(offsetof(ArrayObject, contents) < 256);
102
103 /* Up to 5 args are pushed on top of FP - sizeofStackSaveArea */
104 assert(sizeof(StackSaveArea) < 236);
105
106 /*
107 * EA is calculated by doing "Rn + imm5 << 2", and there are 5 entry points
108 * that codegen may access, make sure that the offset from the top of the
109 * struct is less than 108.
110 */
111 assert(offsetof(InterpState, jitToInterpEntries) < 108);
112 return true;
113 }
114
genInlineSqrt(CompilationUnit * cUnit,MIR * mir)115 static bool genInlineSqrt(CompilationUnit *cUnit, MIR *mir)
116 {
117 return false; /* punt to C handler */
118 }
119
genInlineCos(CompilationUnit * cUnit,MIR * mir)120 static bool genInlineCos(CompilationUnit *cUnit, MIR *mir)
121 {
122 return false; /* punt to C handler */
123 }
124
genInlineSin(CompilationUnit * cUnit,MIR * mir)125 static bool genInlineSin(CompilationUnit *cUnit, MIR *mir)
126 {
127 return false; /* punt to C handler */
128 }
129
genConversion(CompilationUnit * cUnit,MIR * mir)130 static bool genConversion(CompilationUnit *cUnit, MIR *mir)
131 {
132 return genConversionPortable(cUnit, mir);
133 }
134
genArithOpFloat(CompilationUnit * cUnit,MIR * mir,int vDest,int vSrc1,int vSrc2)135 static bool genArithOpFloat(CompilationUnit *cUnit, MIR *mir, int vDest,
136 int vSrc1, int vSrc2)
137 {
138 return genArithOpFloatPortable(cUnit, mir, vDest, vSrc1, vSrc2);
139 }
140
genArithOpDouble(CompilationUnit * cUnit,MIR * mir,int vDest,int vSrc1,int vSrc2)141 static bool genArithOpDouble(CompilationUnit *cUnit, MIR *mir, int vDest,
142 int vSrc1, int vSrc2)
143 {
144 return genArithOpDoublePortable(cUnit, mir, vDest, vSrc1, vSrc2);
145 }
146
genCmpX(CompilationUnit * cUnit,MIR * mir,int vDest,int vSrc1,int vSrc2)147 static bool genCmpX(CompilationUnit *cUnit, MIR *mir, int vDest, int vSrc1,
148 int vSrc2)
149 {
150 /*
151 * Don't attempt to optimize register usage since these opcodes call out to
152 * the handlers.
153 */
154 switch (mir->dalvikInsn.opCode) {
155 case OP_CMPL_FLOAT:
156 loadValue(cUnit, vSrc1, r0);
157 loadValue(cUnit, vSrc2, r1);
158 genDispatchToHandler(cUnit, TEMPLATE_CMPL_FLOAT);
159 storeValue(cUnit, r0, vDest, r1);
160 break;
161 case OP_CMPG_FLOAT:
162 loadValue(cUnit, vSrc1, r0);
163 loadValue(cUnit, vSrc2, r1);
164 genDispatchToHandler(cUnit, TEMPLATE_CMPG_FLOAT);
165 storeValue(cUnit, r0, vDest, r1);
166 break;
167 case OP_CMPL_DOUBLE:
168 loadValueAddress(cUnit, vSrc1, r0);
169 loadValueAddress(cUnit, vSrc2, r1);
170 genDispatchToHandler(cUnit, TEMPLATE_CMPL_DOUBLE);
171 storeValue(cUnit, r0, vDest, r1);
172 break;
173 case OP_CMPG_DOUBLE:
174 loadValueAddress(cUnit, vSrc1, r0);
175 loadValueAddress(cUnit, vSrc2, r1);
176 genDispatchToHandler(cUnit, TEMPLATE_CMPG_DOUBLE);
177 storeValue(cUnit, r0, vDest, r1);
178 break;
179 default:
180 return true;
181 }
182 return false;
183 }
184