1 /**************************************************************************** 2 **+-----------------------------------------------------------------------+** 3 **| |** 4 **| Copyright(c) 1998 - 2008 Texas Instruments. All rights reserved. |** 5 **| All rights reserved. |** 6 **| |** 7 **| Redistribution and use in source and binary forms, with or without |** 8 **| modification, are permitted provided that the following conditions |** 9 **| are met: |** 10 **| |** 11 **| * Redistributions of source code must retain the above copyright |** 12 **| notice, this list of conditions and the following disclaimer. |** 13 **| * Redistributions in binary form must reproduce the above copyright |** 14 **| notice, this list of conditions and the following disclaimer in |** 15 **| the documentation and/or other materials provided with the |** 16 **| distribution. |** 17 **| * Neither the name Texas Instruments nor the names of its |** 18 **| contributors may be used to endorse or promote products derived |** 19 **| from this software without specific prior written permission. |** 20 **| |** 21 **| THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS |** 22 **| "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT |** 23 **| LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR |** 24 **| A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT |** 25 **| OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, |** 26 **| SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT |** 27 **| LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |** 28 **| DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |** 29 **| THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |** 30 **| (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |** 31 **| OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |** 32 **| |** 33 **+-----------------------------------------------------------------------+** 34 ****************************************************************************/ 35 36 /**************************************************************************** 37 * 38 * MODULE: shmBus.h 39 * PURPOSE: Shared memory Bus access object 40 * 41 ****************************************************************************/ 42 43 #ifndef _WHAL_SHM_BUS_H 44 #define _WHAL_SHM_BUS_H 45 46 #include "whalHwEeprom.h" 47 #include "whalBus_Api.h" 48 #include "TNETWIF.h" 49 #include "whalTrace.h" 50 51 52 /* 53 * Use this flag to optimize FW download. 54 * By default this flag is disabled, because the 55 * FW image may be stored at ROM addresses 56 */ 57 #undef USE_NO_CHUNK_COPY 58 59 60 /* Firmware image load chunk size */ 61 #define CHUNK_SIZE 512 62 63 64 /* CLASS whalBus */ 65 typedef struct _whalBus_T 66 { 67 TI_HANDLE hTNETWIF; 68 TI_HANDLE hTnetwDrv; 69 HwEeprom_T *pHwEeprom; 70 WhalTrace_T *pTrc; 71 TI_HANDLE hOs; 72 TI_HANDLE hReport; 73 TI_HANDLE hWhalCtrl; 74 UINT8 *pFwBuf; /* Firmware image ptr */ 75 UINT32 uFwLastAddr; /* Firmware image length */ 76 UINT8 *pEEPROMBuf; /* EEPROM image ptr */ 77 UINT32 uEEPROMLen; /* EEPROM image length */ 78 UINT8 *pEEPROMCurPtr; 79 UINT32 uEEPROMCurLen; 80 BootAttr_T BootAttr; 81 TI_HANDLE hHwCtrl; 82 TI_STATUS DownloadStatus; 83 fnotify_t fCb; /* Upper module callback for the init stage */ 84 TI_HANDLE hCb; /* Upper module handle for the init stage */ 85 UINT32 uInitStage; /* Init stage */ 86 UINT32 uResetStage; /* Reset statge */ 87 UINT32 uEEPROMStage; /* EEPROM burst stage */ 88 UINT32 uInitData; /* Init state machine temporary data */ 89 UINT32 uElpCmd; /* ELP command image */ 90 UINT32 uChipId; /* Chip ID */ 91 UINT32 uBootData; /* Boot state machine temporary data */ 92 UINT32 uSelfClearTime; 93 UINT8 uEEPROMBurstLen; 94 UINT8 uEEPROMBurstLoop; 95 UINT32 uEEPROMRegAddr; 96 TI_STATUS uEEPROMStatus; 97 UINT32 uNVSStartAddr; 98 UINT32 uNVSNumChar; 99 UINT32 uNVSNumByte; 100 /* use a struct to write buffers on the bus - used for extra bytes reserving */ 101 PADDING (UINT32 uNVSTempWord) 102 TI_STATUS uNVSStatus; 103 UINT32 uScrPad6; 104 UINT32 uRefFreq; 105 UINT32 uInitSeqStage; 106 TI_STATUS uInitSeqStatus; 107 UINT32 uLoadStage; 108 UINT32 uChunkNum; 109 UINT32 uPartitionLimit; 110 UINT32 uFinStage; 111 UINT32 uFinData; 112 UINT32 uFinLoop; 113 /* Temporary buffer for FW chunk storage */ 114 #ifdef USE_NO_CHUNK_COPY 115 UINT8 auFwTmpBuf [TNETWIF_WRITE_OFFSET_BYTES]; 116 #else 117 UINT8 auFwTmpBuf [TNETWIF_WRITE_OFFSET_BYTES + CHUNK_SIZE]; 118 #endif 119 /* size of the Fw image, retrieved from the image itself */ 120 UINT32 uFwDataLen; 121 122 BOOL recoveryProcess; 123 124 } whalBus_T; 125 126 127 /* Debug */ 128 void shmDebug_registerDump(TI_HANDLE hWhalBus); 129 int shmDebug_PrintRxRegs(TI_HANDLE hWhalBus); 130 int shmDebug_PrintTxRegs(TI_HANDLE hWhalBus); 131 int shmDebug_PrintScrPadRegs(TI_HANDLE hWhalBus); 132 int shmDebug_PrintListRegs(TI_HANDLE hWhalBus, UINT32 RegAddr); 133 void shmDebug_MemPrint(TI_HANDLE hWhalBus, UINT32 MemAddr); 134 void whalBus_MemCopyFrom (TI_HANDLE hWhalBus, UINT8 *Dest, char *SrcOffset, int Len); 135 void shmDebug_macRegisterDump(TI_HANDLE hWhalBus); 136 void shmDebug_phyRegisterDump(TI_HANDLE hWhalBus); 137 138 139 #endif /* _WHAL_SHM_BUS_H */ 140