Lines Matching refs:outw
471 outw(CSR0, DEPCA_ADDR);\
472 outw(STOP, DEPCA_DATA)
503 outw(CSR1, DEPCA_ADDR); /* initialisation block address LSW */ in LoadCSRs()
504 outw((u16) (lp.sh_mem & LA_MASK), DEPCA_DATA); in LoadCSRs()
505 outw(CSR2, DEPCA_ADDR); /* initialisation block address MSW */ in LoadCSRs()
506 outw((u16) ((lp.sh_mem & LA_MASK) >> 16), DEPCA_DATA); in LoadCSRs()
507 outw(CSR3, DEPCA_ADDR); /* ALE control */ in LoadCSRs()
508 outw(ACON, DEPCA_DATA); in LoadCSRs()
509 outw(CSR0, DEPCA_ADDR); /* Point back to CSR0 */ in LoadCSRs()
518 outw(CSR0, DEPCA_ADDR); /* point back to CSR0 */ in InitRestartDepca()
519 outw(INIT, DEPCA_DATA); /* initialise DEPCA */ in InitRestartDepca()
525 outw(IDON | STRT, DEPCA_DATA); in InitRestartDepca()