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Lines Matching refs:priv

611 	TLanPrivateInfo *priv = dev->priv;
614 phy = priv->phy[priv->phyNum];
616 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
657 TLanPrivateInfo *priv = dev->priv;
663 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
664 priv->phyNum = 0xFFFF;
671 priv->phy[0] = TLAN_PHY_MAX_ADDR;
673 priv->phy[0] = TLAN_PHY_NONE;
676 priv->phy[1] = TLAN_PHY_NONE;
683 if ( ( priv->phy[1] == TLAN_PHY_NONE ) && ( phy != TLAN_PHY_MAX_ADDR ) ) {
684 priv->phy[1] = phy;
689 if ( priv->phy[1] != TLAN_PHY_NONE ) {
690 priv->phyNum = 1;
691 } else if ( priv->phy[0] != TLAN_PHY_NONE ) {
692 priv->phyNum = 0;
701 TLanPrivateInfo *priv = dev->priv;
707 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
708 …if ( ( priv->phyNum == 0 ) && ( priv->phy[1] != TLAN_PHY_NONE ) && ( ! ( priv->adapter->flags & TL…
710 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value );
723 TLanPrivateInfo *priv = dev->priv;
729 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value );
741 TLanPrivateInfo *priv = dev->priv;
745 phy = priv->phy[priv->phyNum];
766 TLanPrivateInfo *priv = dev->priv;
774 phy = priv->phy[priv->phyNum];
780 ( ! priv->aui ) ) {
782 if ( priv->speed == TLAN_SPEED_10 &&
783 priv->duplex == TLAN_DUPLEX_HALF) {
785 } else if ( priv->speed == TLAN_SPEED_10 &&
786 priv->duplex == TLAN_DUPLEX_FULL) {
787 priv->tlanFullDuplex = TRUE;
789 } else if ( priv->speed == TLAN_SPEED_100 &&
790 priv->duplex == TLAN_DUPLEX_HALF) {
792 } else if ( priv->speed == TLAN_SPEED_100 &&
793 priv->duplex == TLAN_DUPLEX_FULL) {
794 priv->tlanFullDuplex = TRUE;
816 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) {
817 priv->phyNum = 0;
822 } else if ( priv->phyNum == 0 ) {
824 if ( priv->aui ) {
829 if ( priv->duplex == TLAN_DUPLEX_FULL ) {
831 priv->tlanFullDuplex = TRUE;
833 if ( priv->speed == TLAN_SPEED_100 ) {
850 TLanPrivateInfo *priv = dev->priv;
858 phy = priv->phy[priv->phyNum];
868 if (!priv->neg_be_verbose++) {
883 priv->tlanFullDuplex = TRUE;
885 priv->tlanFullDuplex = TRUE;
888 …if ( ( ! ( mode & 0x0180 ) ) && ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && ( priv->p…
889 priv->phyNum = 0;
896 if ( priv->phyNum == 0 ) {
897 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || ( an_adv & an_lpa & 0x0040 ) ) {
934 TLanPrivateInfo *priv = dev->priv;
938 phy = priv->phy[priv->phyNum];
945 if (priv->link) {
946 priv->link = 0;
955 if ((phy_status & MII_GS_LINK) && !priv->link) {
956 priv->link = 1;
1009 TLanPrivateInfo *priv = dev->priv;
1017 spin_lock_irqsave(&priv->lock, flags);
1063 spin_unlock_irqrestore(&priv->lock, flags);
1167 TLanPrivateInfo *priv = dev->priv;
1173 spin_lock_irqsave(&priv->lock, flags);
1196 spin_unlock_irqrestore(&priv->lock, flags);
1841 TLanPrivateInfo *priv = dev->priv;
1845 spin_lock_irqsave(&priv->lock, flags);
1846 if ( priv->timer.function != NULL &&
1847 priv->timerType != TLAN_TIMER_ACTIVITY ) {
1849 spin_unlock_irqrestore(&priv->lock, flags);
1852 priv->timer.function = &TLan_Timer;
1854 spin_unlock_irqrestore(&priv->lock, flags);
1856 priv->timer.data = (unsigned long) dev;
1857 priv->timerSetAt = jiffies;
1858 priv->timerType = type;
1859 mod_timer(&priv->timer, jiffies + ticks);
1891 TLanPrivateInfo *priv = dev->priv;
1895 if ( priv->dmaStorage ) {
1896 kfree( priv->dmaStorage );
1982 TLanPrivateInfo *priv;
1997 priv = dev->priv;
2003 priv->adapter = &board_info[ent->driver_data];
2024 priv->adapterRev = pci_rev;
2032 priv->is_eisa = 1;
2034 priv->adapter = &board_info[13]; /* NetFlex-3/E */
2035 priv->adapterRev = 23; /* TLAN 2.3 */
2037 priv->adapter = &board_info[14];
2038 priv->adapterRev = 10; /* TLAN 1.0 */
2046 priv->aui = dev->mem_start & 0x01;
2047 priv->duplex = ((dev->mem_start & 0x06) == 0x06) ? 0 : (dev->mem_start & 0x06) >> 1;
2048 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0 : (dev->mem_start & 0x18) >> 3;
2050 if (priv->speed == 0x1) {
2051 priv->speed = TLAN_SPEED_10;
2052 } else if (priv->speed == 0x2) {
2053 priv->speed = TLAN_SPEED_100;
2055 debug = priv->debug = dev->mem_end;
2057 priv->aui = aui[boards_found];
2058 priv->speed = speed[boards_found];
2059 priv->duplex = duplex[boards_found];
2060 priv->debug = debug;
2065 INIT_LIST_HEAD(&priv->tlan_tqueue.list);
2066 priv->tlan_tqueue.sync = 0;
2067 priv->tlan_tqueue.routine = (void *)(void*)TLan_tx_timeout;
2068 priv->tlan_tqueue.data = dev;
2070 spin_lock_init(&priv->lock);
2086 priv->nextDevice = TLan_Eisa_Devices;
2095 priv->adapter->deviceLabel,
2096 priv->adapterRev);
2105 TLanPrivateInfo *priv;
2109 priv = dev->priv;
2110 if (priv->dmaStorage) {
2111 kfree(priv->dmaStorage);
2115 TLan_Eisa_Devices = priv->nextDevice;
2253 TLanPrivateInfo *priv;
2255 priv = dev->priv;
2257 if (!priv->is_eisa) /* EISA devices have already requested IO */
2273 priv->dmaStorage = kmalloc(dma_size, GFP_KERNEL | GFP_DMA);
2274 if ( priv->dmaStorage == NULL ) {
2280 memset( priv->dmaStorage, 0, dma_size );
2281 priv->rxList = (TLanList *)
2282 ( ( ( (u32) priv->dmaStorage ) + 7 ) & 0xFFFFFFF8 );
2283 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS;
2285 priv->rxBuffer = (u8 *) ( priv->txList + TLAN_NUM_TX_LISTS );
2286 priv->txBuffer = priv->rxBuffer
2293 (u8) priv->adapter->addrOfs + i,
2335 TLanPrivateInfo *priv = dev->priv;
2338 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION );
2346 init_timer(&priv->timer);
2356 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n", dev->name, priv->tlanRev );
2379 TLanPrivateInfo *priv = dev->priv;
2381 u32 phy = priv->phy[priv->phyNum];
2383 if (!priv->phyOnline)
2458 TLanPrivateInfo *priv = dev->priv;
2464 if ( ! priv->phyOnline ) {
2470 tail_list = priv->txList + priv->txTail;
2473 …LAN_DEBUG_TX, "TRANSMIT: %s is busy (Head=%d Tail=%d)\n", dev->name, priv->txHead, priv->txTail );
2475 priv->txBusyCount++;
2482 tail_buffer = priv->txBuffer + ( priv->txTail * TLAN_MAX_FRAME_SIZE );
2503 spin_lock_irqsave(&priv->lock, flags);
2505 if ( ! priv->txInProgress ) {
2506 priv->txInProgress = 1;
2507 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Starting TX on buffer %d\n", priv->txTail );
2511 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n", priv->txTail );
2512 if ( priv->txTail == 0 ) {
2513 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward = virt_to_bus( tail_list );
2515 ( priv->txList + ( priv->txTail - 1 ) )->forward = virt_to_bus( tail_list );
2518 spin_unlock_irqrestore(&priv->lock, flags);
2520 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS );
2558 TLanPrivateInfo *priv;
2561 priv = dev->priv;
2563 spin_lock(&priv->lock);
2577 spin_unlock(&priv->lock);
2598 TLanPrivateInfo *priv = dev->priv;
2601 priv->neg_be_verbose = 0;
2605 if ( priv->timer.function != NULL ) {
2606 del_timer_sync( &priv->timer );
2607 priv->timer.function = NULL;
2635 TLanPrivateInfo *priv = dev->priv;
2641 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name, priv->rxEocCount );
2642 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name, priv->txBusyCount );
2649 TLan_PrintList( priv->rxList + i, "RX", i );
2651 TLan_PrintList( priv->txList + i, "TX", i );
2654 return ( &( (TLanPrivateInfo *) dev->priv )->stats );
2780 TLanPrivateInfo *priv = dev->priv;
2786 …TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", priv->txHead, priv->txT…
2787 head_list = priv->txList + priv->txHead;
2799 priv->stats.tx_bytes += head_list->frameSize;
2803 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS );
2804 head_list = priv->txList + priv->txHead;
2811 …TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", priv->txHead, priv->txT…
2812 head_list = priv->txList + priv->txHead;
2817 priv->txInProgress = 0;
2821 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
2823 if ( priv->timer.function == NULL ) {
2824 priv->timer.function = &TLan_Timer;
2825 priv->timer.data = (unsigned long) dev;
2826 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
2827 priv->timerSetAt = jiffies;
2828 priv->timerType = TLAN_TIMER_ACTIVITY;
2829 add_timer(&priv->timer);
2830 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
2831 priv->timerSetAt = jiffies;
2891 TLanPrivateInfo *priv = dev->priv;
2902 …TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTa…
2903 head_list = priv->rxList + priv->rxHead;
2916 head_buffer = priv->rxBuffer + (priv->rxHead * TLAN_MAX_FRAME_SIZE);
2921 priv->stats.rx_bytes += head_list->frameSize;
2944 priv->stats.rx_bytes += frameSize;
2961 tail_list = priv->rxList + priv->rxTail;
2964 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS );
2965 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS );
2966 head_list = priv->rxList + priv->rxHead;
2974 …TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", priv->rxHead, priv->rxTa…
2975 head_list = priv->rxList + priv->rxHead;
2978 priv->rxEocCount++;
2981 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) {
2983 if ( priv->timer.function == NULL ) {
2984 priv->timer.function = &TLan_Timer;
2985 priv->timer.data = (unsigned long) dev;
2986 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
2987 priv->timerSetAt = jiffies;
2988 priv->timerType = TLAN_TIMER_ACTIVITY;
2989 add_timer(&priv->timer);
2990 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) {
2991 priv->timerSetAt = jiffies;
3047 TLanPrivateInfo *priv = dev->priv;
3052 if ( priv->tlanRev < 0x30 ) {
3053 …AN_DEBUG_TX, "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", priv->txHead, priv->txTail );
3054 head_list = priv->txList + priv->txHead;
3060 priv->txInProgress = 0;
3090 TLanPrivateInfo *priv = dev->priv;
3106 queue_task(&priv->tlan_tqueue, &tq_immediate);
3113 phy = priv->phy[priv->phyNum];
3120 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) {
3163 TLanPrivateInfo *priv = dev->priv;
3167 if ( priv->tlanRev < 0x30 ) {
3168 …LAN_DEBUG_RX, "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", priv->rxHead, priv->rxTail );
3169 head_list = priv->rxList + priv->rxHead;
3172 priv->rxEocCount++;
3220 TLanPrivateInfo *priv = dev->priv;
3224 priv->timer.function = NULL;
3226 switch ( priv->timerType ) {
3251 spin_lock_irqsave(&priv->lock, flags);
3252 if ( priv->timer.function == NULL ) {
3253 elapsed = jiffies - priv->timerSetAt;
3257 priv->timer.function = &TLan_Timer;
3258 priv->timer.expires = priv->timerSetAt + TLAN_TIMER_ACT_DELAY;
3259 spin_unlock_irqrestore(&priv->lock, flags);
3260 add_timer( &priv->timer );
3264 spin_unlock_irqrestore(&priv->lock, flags);
3296 TLanPrivateInfo *priv = dev->priv;
3302 priv->txHead = 0;
3303 priv->txTail = 0;
3305 list = priv->txList + i;
3308 list->buffer[0].address = virt_to_bus( priv->txBuffer + ( i * TLAN_MAX_FRAME_SIZE ) );
3317 priv->rxHead = 0;
3318 priv->rxTail = TLAN_NUM_RX_LISTS - 1;
3320 list = priv->rxList + i;
3325 list->buffer[0].address = virt_to_bus( priv->rxBuffer + ( i * TLAN_MAX_FRAME_SIZE ) );
3352 TLanPrivateInfo *priv = dev->priv;
3359 list = priv->txList + i;
3368 list = priv->rxList + i;
3460 TLanPrivateInfo *priv = dev->priv;
3497 priv->stats.rx_packets += rx_good;
3498 priv->stats.rx_errors += rx_over + crc + code;
3499 priv->stats.tx_packets += tx_good;
3500 priv->stats.tx_errors += tx_under + loss;
3501 priv->stats.collisions += multi_col + single_col + excess_col + late_col;
3503 priv->stats.rx_over_errors += rx_over;
3504 priv->stats.rx_crc_errors += crc;
3505 priv->stats.rx_frame_errors += code;
3507 priv->stats.tx_aborted_errors += tx_under;
3508 priv->stats.tx_carrier_errors += loss;
3533 TLanPrivateInfo *priv = dev->priv;
3539 priv->tlanFullDuplex = FALSE;
3540 priv->phyOnline=0;
3579 if ( priv->tlanRev >= 0x30 ) {
3586 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) {
3588 if ( priv->aui == 1 ) {
3590 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) {
3592 priv->tlanFullDuplex = TRUE;
3598 if ( priv->phyNum == 0 ) {
3603 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) {
3614 TLanPrivateInfo *priv = dev->priv;
3625 phy = priv->phy[priv->phyNum];
3628 if ( priv->tlanFullDuplex ) {
3633 if ( priv->phyNum == 0 ) {
3641 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || ( priv->aui ) ) {
3673 priv->link = 1;
3683 if ( priv->phyNum == 0 ) {
3694 priv->phyOnline = 1;
3699 outl( virt_to_bus( priv->rxList ), dev->base_addr + TLAN_CH_PARM );