Lines Matching refs:target_phys_addr_t
66 qemu_irq *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env);
69 void pxa25x_timer_init(target_phys_addr_t base, qemu_irq *irqs);
70 void pxa27x_timer_init(target_phys_addr_t base, qemu_irq *irqs, qemu_irq irq4);
74 PXA2xxGPIOInfo *pxa2xx_gpio_init(target_phys_addr_t base,
83 PXA2xxDMAState *pxa255_dma_init(target_phys_addr_t base,
85 PXA2xxDMAState *pxa27x_dma_init(target_phys_addr_t base,
91 PXA2xxLCDState *pxa2xx_lcdc_init(target_phys_addr_t base,
98 PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base,
105 PXA2xxPCMCIAState *pxa2xx_pcmcia_init(target_phys_addr_t base);
116 PXA2xxKeyPadState *pxa27x_keypad_init(target_phys_addr_t base,
123 PXA2xxI2CState *pxa2xx_i2c_init(target_phys_addr_t base,
146 target_phys_addr_t pm_base;
150 target_phys_addr_t cm_base;
155 target_phys_addr_t mm_base;
162 target_phys_addr_t rtc_base;
217 void usb_ohci_init_pxa(target_phys_addr_t base, int num_ports, int devfn,