Lines Matching refs:mmu_idx
64 int mmu_idx,
97 int mmu_idx) in glue()
112 tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; in glue()
119 addend = env->iotlb[mmu_idx][index]; in glue()
126 if (memcheck_instrument_mmu && mmu_idx == 1 && in glue()
137 do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); in glue()
140 mmu_idx, retaddr); in glue()
145 if (memcheck_instrument_mmu && mmu_idx == 1) { in glue()
154 do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); in glue()
157 addend = env->tlb_table[mmu_idx][index].addend; in glue()
165 env->tlb_table[mmu_idx][index].addr_read ^= TARGET_PAGE_MASK; in glue()
166 env->tlb_table[mmu_idx][index].addr_write ^= TARGET_PAGE_MASK; in glue()
169 env->tlb_table[mmu_idx][index + 1].addr_read ^= TARGET_PAGE_MASK; in glue()
170 env->tlb_table[mmu_idx][index + 1].addr_write ^= TARGET_PAGE_MASK; in glue()
179 do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); in glue()
181 tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); in glue()
189 int mmu_idx, in glue()
199 tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; in glue()
206 addend = env->iotlb[mmu_idx][index]; in glue()
214 mmu_idx, retaddr); in glue()
216 mmu_idx, retaddr); in glue()
226 addend = env->tlb_table[mmu_idx][index].addend; in glue()
231 tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); in glue()
241 int mmu_idx,
274 int mmu_idx) in glue()
286 tlb_addr = env->tlb_table[mmu_idx][index].addr_write; in glue()
293 addend = env->iotlb[mmu_idx][index]; in glue()
300 if (memcheck_instrument_mmu && mmu_idx == 1 && in glue()
311 do_unaligned_access(addr, 1, mmu_idx, retaddr); in glue()
314 mmu_idx, retaddr); in glue()
319 if (memcheck_instrument_mmu && mmu_idx == 1) { in glue()
329 do_unaligned_access(addr, 1, mmu_idx, retaddr); in glue()
332 addend = env->tlb_table[mmu_idx][index].addend; in glue()
340 env->tlb_table[mmu_idx][index].addr_read ^= TARGET_PAGE_MASK; in glue()
341 env->tlb_table[mmu_idx][index].addr_write ^= TARGET_PAGE_MASK; in glue()
344 env->tlb_table[mmu_idx][index + 1].addr_read ^= TARGET_PAGE_MASK; in glue()
345 env->tlb_table[mmu_idx][index + 1].addr_write ^= TARGET_PAGE_MASK; in glue()
354 do_unaligned_access(addr, 1, mmu_idx, retaddr); in glue()
356 tlb_fill(addr, 1, mmu_idx, retaddr); in glue()
364 int mmu_idx, in glue()
373 tlb_addr = env->tlb_table[mmu_idx][index].addr_write; in glue()
379 addend = env->iotlb[mmu_idx][index]; in glue()
389 mmu_idx, retaddr); in glue()
392 mmu_idx, retaddr); in glue()
397 addend = env->tlb_table[mmu_idx][index].addend; in glue()
402 tlb_fill(addr, 1, mmu_idx, retaddr); in glue()