1 /*
2 * rate.c
3 *
4 * Copyright(c) 1998 - 2009 Texas Instruments. All rights reserved.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * * Neither the name Texas Instruments nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34
35 /** \file rate.c
36 * \brief Rate conversion
37 *
38 * \see rate.h
39 */
40 #define __FILE_ID__ FILE_ID_131
41 #include "tidef.h"
42 #include "rate.h"
43
rate_NetToDrv(TI_UINT32 rate)44 ERate rate_NetToDrv (TI_UINT32 rate)
45 {
46 switch (rate)
47 {
48 case NET_RATE_1M:
49 case NET_RATE_1M_BASIC:
50 return DRV_RATE_1M;
51
52 case NET_RATE_2M:
53 case NET_RATE_2M_BASIC:
54 return DRV_RATE_2M;
55
56 case NET_RATE_5_5M:
57 case NET_RATE_5_5M_BASIC:
58 return DRV_RATE_5_5M;
59
60 case NET_RATE_11M:
61 case NET_RATE_11M_BASIC:
62 return DRV_RATE_11M;
63
64 case NET_RATE_22M:
65 case NET_RATE_22M_BASIC:
66 return DRV_RATE_22M;
67
68 case NET_RATE_6M:
69 case NET_RATE_6M_BASIC:
70 return DRV_RATE_6M;
71
72 case NET_RATE_9M:
73 case NET_RATE_9M_BASIC:
74 return DRV_RATE_9M;
75
76 case NET_RATE_12M:
77 case NET_RATE_12M_BASIC:
78 return DRV_RATE_12M;
79
80 case NET_RATE_18M:
81 case NET_RATE_18M_BASIC:
82 return DRV_RATE_18M;
83
84 case NET_RATE_24M:
85 case NET_RATE_24M_BASIC:
86 return DRV_RATE_24M;
87
88 case NET_RATE_36M:
89 case NET_RATE_36M_BASIC:
90 return DRV_RATE_36M;
91
92 case NET_RATE_48M:
93 case NET_RATE_48M_BASIC:
94 return DRV_RATE_48M;
95
96 case NET_RATE_54M:
97 case NET_RATE_54M_BASIC:
98 return DRV_RATE_54M;
99
100 case NET_RATE_MCS0:
101 case NET_RATE_MCS0_BASIC:
102 return DRV_RATE_MCS_0;
103
104 case NET_RATE_MCS1:
105 case NET_RATE_MCS1_BASIC:
106 return DRV_RATE_MCS_1;
107
108 case NET_RATE_MCS2:
109 case NET_RATE_MCS2_BASIC:
110 return DRV_RATE_MCS_2;
111
112 case NET_RATE_MCS3:
113 case NET_RATE_MCS3_BASIC:
114 return DRV_RATE_MCS_3;
115
116 case NET_RATE_MCS4:
117 case NET_RATE_MCS4_BASIC:
118 return DRV_RATE_MCS_4;
119
120 case NET_RATE_MCS5:
121 case NET_RATE_MCS5_BASIC:
122 return DRV_RATE_MCS_5;
123
124 case NET_RATE_MCS6:
125 case NET_RATE_MCS6_BASIC:
126 return DRV_RATE_MCS_6;
127
128 case NET_RATE_MCS7:
129 case NET_RATE_MCS7_BASIC:
130 return DRV_RATE_MCS_7;
131
132 default:
133 return DRV_RATE_INVALID;
134 }
135 }
136
137 /************************************************************************
138 * hostToNetworkRate *
139 ************************************************************************
140 DESCRIPTION: Translates a host rate (1, 2, 3, ....) to network rate (0x02, 0x82, 0x84, etc...)
141
142 INPUT: rate - Host rate
143
144 OUTPUT:
145
146
147 RETURN: Network rate if the input rate is valid, otherwise returns 0.
148
149 ************************************************************************/
rate_DrvToNet(ERate rate)150 ENetRate rate_DrvToNet (ERate rate)
151 {
152 switch (rate)
153 {
154 case DRV_RATE_AUTO:
155 return 0;
156
157 case DRV_RATE_1M:
158 return NET_RATE_1M;
159
160 case DRV_RATE_2M:
161 return NET_RATE_2M;
162
163 case DRV_RATE_5_5M:
164 return NET_RATE_5_5M;
165
166 case DRV_RATE_11M:
167 return NET_RATE_11M;
168
169 case DRV_RATE_22M:
170 return NET_RATE_22M;
171
172 case DRV_RATE_6M:
173 return NET_RATE_6M;
174
175 case DRV_RATE_9M:
176 return NET_RATE_9M;
177
178 case DRV_RATE_12M:
179 return NET_RATE_12M;
180
181 case DRV_RATE_18M:
182 return NET_RATE_18M;
183
184 case DRV_RATE_24M:
185 return NET_RATE_24M;
186
187 case DRV_RATE_36M:
188 return NET_RATE_36M;
189
190 case DRV_RATE_48M:
191 return NET_RATE_48M;
192
193 case DRV_RATE_54M:
194 return NET_RATE_54M;
195
196 case DRV_RATE_MCS_0:
197 return NET_RATE_MCS0;
198
199 case DRV_RATE_MCS_1:
200 return NET_RATE_MCS1;
201
202 case DRV_RATE_MCS_2:
203 return NET_RATE_MCS2;
204
205 case DRV_RATE_MCS_3:
206 return NET_RATE_MCS3;
207
208 case DRV_RATE_MCS_4:
209 return NET_RATE_MCS4;
210
211 case DRV_RATE_MCS_5:
212 return NET_RATE_MCS5;
213
214 case DRV_RATE_MCS_6:
215 return NET_RATE_MCS6;
216
217 case DRV_RATE_MCS_7:
218 return NET_RATE_MCS7;
219
220 default:
221 return 0;
222 }
223 }
224
225 /***************************************************************************
226 * getMaxActiveRatefromBitmap *
227 ****************************************************************************
228 * DESCRIPTION:
229 *
230 * INPUTS: hCtrlData - the object
231 *
232 * OUTPUT:
233 *
234 * RETURNS:
235 ***************************************************************************/
rate_GetMaxFromDrvBitmap(TI_UINT32 uRateBitMap)236 ERate rate_GetMaxFromDrvBitmap (TI_UINT32 uRateBitMap)
237 {
238 if (uRateBitMap & DRV_RATE_MASK_MCS_7_OFDM)
239 {
240 return DRV_RATE_MCS_7;
241 }
242
243 if (uRateBitMap & DRV_RATE_MASK_MCS_6_OFDM)
244 {
245 return DRV_RATE_MCS_6;
246 }
247
248 if (uRateBitMap & DRV_RATE_MASK_MCS_5_OFDM)
249 {
250 return DRV_RATE_MCS_5;
251 }
252
253 if (uRateBitMap & DRV_RATE_MASK_MCS_4_OFDM)
254 {
255 return DRV_RATE_MCS_4;
256 }
257
258 if (uRateBitMap & DRV_RATE_MASK_MCS_3_OFDM)
259 {
260 return DRV_RATE_MCS_3;
261 }
262
263 if (uRateBitMap & DRV_RATE_MASK_MCS_2_OFDM)
264 {
265 return DRV_RATE_MCS_2;
266 }
267
268 if (uRateBitMap & DRV_RATE_MASK_MCS_1_OFDM)
269 {
270 return DRV_RATE_MCS_1;
271 }
272
273 if (uRateBitMap & DRV_RATE_MASK_MCS_0_OFDM)
274 {
275 return DRV_RATE_MCS_0;
276 }
277
278 if (uRateBitMap & DRV_RATE_MASK_54_OFDM)
279 {
280 return DRV_RATE_54M;
281 }
282
283 if (uRateBitMap & DRV_RATE_MASK_48_OFDM)
284 {
285 return DRV_RATE_48M;
286 }
287
288 if (uRateBitMap & DRV_RATE_MASK_36_OFDM)
289 {
290 return DRV_RATE_36M;
291 }
292
293 if (uRateBitMap & DRV_RATE_MASK_24_OFDM)
294 {
295 return DRV_RATE_24M;
296 }
297
298 if (uRateBitMap & DRV_RATE_MASK_22_PBCC)
299 {
300 return DRV_RATE_22M;
301 }
302
303 if (uRateBitMap & DRV_RATE_MASK_18_OFDM)
304 {
305 return DRV_RATE_18M;
306 }
307
308 if (uRateBitMap & DRV_RATE_MASK_12_OFDM)
309 {
310 return DRV_RATE_12M;
311 }
312
313 if (uRateBitMap & DRV_RATE_MASK_11_CCK)
314 {
315 return DRV_RATE_11M;
316 }
317
318 if (uRateBitMap & DRV_RATE_MASK_9_OFDM)
319 {
320 return DRV_RATE_9M;
321 }
322
323 if (uRateBitMap & DRV_RATE_MASK_6_OFDM)
324 {
325 return DRV_RATE_6M;
326 }
327
328 if (uRateBitMap & DRV_RATE_MASK_5_5_CCK)
329 {
330 return DRV_RATE_5_5M;
331 }
332
333 if (uRateBitMap & DRV_RATE_MASK_2_BARKER)
334 {
335 return DRV_RATE_2M;
336 }
337
338 if (uRateBitMap & DRV_RATE_MASK_1_BARKER)
339 {
340 return DRV_RATE_1M;
341 }
342
343 return DRV_RATE_INVALID;
344 }
345
346 /************************************************************************
347 * validateNetworkRate *
348 ************************************************************************
349 DESCRIPTION: Verify that the input nitwork rate is valid
350
351 INPUT: rate - input network rate
352
353 OUTPUT:
354
355
356 RETURN: TI_OK if valid, otherwise TI_NOK
357
358 ************************************************************************/
rate_ValidateNet(ENetRate eRate)359 static TI_STATUS rate_ValidateNet (ENetRate eRate)
360 {
361 switch (eRate)
362 {
363 case NET_RATE_1M:
364 case NET_RATE_1M_BASIC:
365 case NET_RATE_2M:
366 case NET_RATE_2M_BASIC:
367 case NET_RATE_5_5M:
368 case NET_RATE_5_5M_BASIC:
369 case NET_RATE_11M:
370 case NET_RATE_11M_BASIC:
371 case NET_RATE_22M:
372 case NET_RATE_22M_BASIC:
373 case NET_RATE_6M:
374 case NET_RATE_6M_BASIC:
375 case NET_RATE_9M:
376 case NET_RATE_9M_BASIC:
377 case NET_RATE_12M:
378 case NET_RATE_12M_BASIC:
379 case NET_RATE_18M:
380 case NET_RATE_18M_BASIC:
381 case NET_RATE_24M:
382 case NET_RATE_24M_BASIC:
383 case NET_RATE_36M:
384 case NET_RATE_36M_BASIC:
385 case NET_RATE_48M:
386 case NET_RATE_48M_BASIC:
387 case NET_RATE_54M:
388 case NET_RATE_54M_BASIC:
389 return TI_OK;
390
391 default:
392 return TI_NOK;
393 }
394 }
395
396 /************************************************************************
397 * getMaxBasicRate *
398 ************************************************************************
399 DESCRIPTION: Goes over an array of network rates and returns the max basic rate
400
401 INPUT: pRates - Rate array
402
403 OUTPUT:
404
405
406 RETURN: Max basic rate (in network units)
407
408 ************************************************************************/
rate_GetMaxBasicFromStr(TI_UINT8 * pRatesString,TI_UINT32 len,ENetRate eMaxRate)409 ENetRate rate_GetMaxBasicFromStr (TI_UINT8 *pRatesString, TI_UINT32 len, ENetRate eMaxRate)
410 {
411 TI_UINT32 i;
412
413 for (i = 0; i < len; i++)
414 {
415 if (NET_BASIC_RATE (pRatesString[i]) && rate_ValidateNet (pRatesString[i]) == TI_OK)
416 {
417 eMaxRate = TI_MAX (pRatesString[i], eMaxRate);
418 }
419 }
420
421 return eMaxRate;
422 }
423
424 /************************************************************************
425 * getMaxActiveRate *
426 ************************************************************************
427 DESCRIPTION: Goes over an array of network rates and returns the max active rate
428
429 INPUT: pRates - Rate array
430
431 OUTPUT:
432
433
434 RETURN: Max active rate (in network units)
435
436 ************************************************************************/
rate_GetMaxActiveFromStr(TI_UINT8 * pRatesString,TI_UINT32 len,ENetRate eMaxRate)437 ENetRate rate_GetMaxActiveFromStr (TI_UINT8 *pRatesString, TI_UINT32 len, ENetRate eMaxRate)
438 {
439 TI_UINT32 i;
440
441 for (i = 0; i < len; i++)
442 {
443 if (NET_ACTIVE_RATE (pRatesString[i]) && rate_ValidateNet (pRatesString[i]) == TI_OK)
444 {
445 eMaxRate = TI_MAX (pRatesString[i], eMaxRate);
446 }
447 }
448
449 return eMaxRate;
450 }
451
rate_DrvToNumber(ERate eRate)452 TI_UINT32 rate_DrvToNumber (ERate eRate)
453 {
454 switch (eRate)
455 {
456 case DRV_RATE_1M:
457 return 1;
458
459 case DRV_RATE_2M:
460 return 2;
461
462 case DRV_RATE_5_5M:
463 return 5;
464
465 case DRV_RATE_11M:
466 return 11;
467
468 case DRV_RATE_22M:
469 return 22;
470
471 case DRV_RATE_6M:
472 return 6;
473
474 case DRV_RATE_9M:
475 return 9;
476
477 case DRV_RATE_12M:
478 return 12;
479
480 case DRV_RATE_18M:
481 return 18;
482
483 case DRV_RATE_24M:
484 return 24;
485
486 case DRV_RATE_36M:
487 return 36;
488
489 case DRV_RATE_48M:
490 return 48;
491
492 case DRV_RATE_54M:
493 return 54;
494
495 case DRV_RATE_MCS_0:
496 return 6;
497
498 case DRV_RATE_MCS_1:
499 return 13;
500
501 case DRV_RATE_MCS_2:
502 return 19;
503
504 case DRV_RATE_MCS_3:
505 return 26;
506
507 case DRV_RATE_MCS_4:
508 return 39;
509
510 case DRV_RATE_MCS_5:
511 return 52;
512
513 case DRV_RATE_MCS_6:
514 return 58;
515
516 case DRV_RATE_MCS_7:
517 return 65;
518
519 default:
520 return 0;
521 }
522 }
523
524 /************************************************************************
525 * bitMapToNetworkStringRates *
526 ************************************************************************
527 DESCRIPTION: Converts bit map to the rates string
528
529 INPUT: suppRatesBitMap - bit map of supported rates
530 basicRatesBitMap - bit map of basic rates
531
532 OUTPUT: string - network format rates array,
533 len - rates array length
534 firstOFDMrateLoc - the index of first OFDM rate in the rates array.
535
536
537 RETURN: None
538
539 ************************************************************************/
rate_DrvBitmapToNetStr(TI_UINT32 uSuppRatesBitMap,TI_UINT32 uBasicRatesBitMap,TI_UINT8 * string,TI_UINT32 * len,TI_UINT32 * pFirstOfdmRate)540 TI_STATUS rate_DrvBitmapToNetStr (TI_UINT32 uSuppRatesBitMap,
541 TI_UINT32 uBasicRatesBitMap,
542 TI_UINT8 *string,
543 TI_UINT32 *len,
544 TI_UINT32 *pFirstOfdmRate)
545 {
546 TI_UINT32 i = 0;
547
548 if (uSuppRatesBitMap & DRV_RATE_MASK_1_BARKER)
549 {
550 if (uBasicRatesBitMap & DRV_RATE_MASK_1_BARKER)
551 {
552 string[i++] = NET_RATE_1M_BASIC;
553 }
554 else
555 {
556 string[i++] = NET_RATE_1M;
557 }
558 }
559
560 if (uSuppRatesBitMap & DRV_RATE_MASK_2_BARKER)
561 {
562 if (uBasicRatesBitMap & DRV_RATE_MASK_2_BARKER)
563 {
564 string[i++] = NET_RATE_2M_BASIC;
565 }
566 else
567 {
568 string[i++] = NET_RATE_2M;
569 }
570 }
571
572 if (uSuppRatesBitMap & DRV_RATE_MASK_5_5_CCK)
573 {
574 if (uBasicRatesBitMap & DRV_RATE_MASK_5_5_CCK)
575 {
576 string[i++] = NET_RATE_5_5M_BASIC;
577 }
578 else
579 {
580 string[i++] = NET_RATE_5_5M;
581 }
582 }
583
584 if (uSuppRatesBitMap & DRV_RATE_MASK_11_CCK)
585 {
586 if (uBasicRatesBitMap & DRV_RATE_MASK_11_CCK)
587 {
588 string[i++] = NET_RATE_11M_BASIC;
589 }
590 else
591 {
592 string[i++] = NET_RATE_11M;
593 }
594 }
595
596 if (uSuppRatesBitMap & DRV_RATE_MASK_22_PBCC)
597 {
598 if (uBasicRatesBitMap & DRV_RATE_MASK_22_PBCC)
599 {
600 string[i++] = NET_RATE_22M_BASIC;
601 }
602 else
603 {
604 string[i++] = NET_RATE_22M;
605 }
606 }
607
608 *pFirstOfdmRate = i;
609
610 if (uSuppRatesBitMap & DRV_RATE_MASK_6_OFDM)
611 {
612 if (uBasicRatesBitMap & DRV_RATE_MASK_6_OFDM)
613 {
614 string[i++] = NET_RATE_6M_BASIC;
615 }
616 else
617 {
618 string[i++] = NET_RATE_6M;
619 }
620 }
621
622 if (uSuppRatesBitMap & DRV_RATE_MASK_9_OFDM)
623 {
624 if (uBasicRatesBitMap & DRV_RATE_MASK_9_OFDM)
625 {
626 string[i++] = NET_RATE_9M_BASIC;
627 }
628 else
629 {
630 string[i++] = NET_RATE_9M;
631 }
632 }
633
634 if (uSuppRatesBitMap & DRV_RATE_MASK_12_OFDM)
635 {
636 if (uBasicRatesBitMap & DRV_RATE_MASK_12_OFDM)
637 {
638 string[i++] = NET_RATE_12M_BASIC;
639 }
640 else
641 {
642 string[i++] = NET_RATE_12M;
643 }
644 }
645
646 if (uSuppRatesBitMap & DRV_RATE_MASK_18_OFDM)
647 {
648 if (uBasicRatesBitMap & DRV_RATE_MASK_18_OFDM)
649 {
650 string[i++] = NET_RATE_18M_BASIC;
651 }
652 else
653 {
654 string[i++] = NET_RATE_18M;
655 }
656 }
657
658 if (uSuppRatesBitMap & DRV_RATE_MASK_24_OFDM)
659 {
660 if (uBasicRatesBitMap & DRV_RATE_MASK_24_OFDM)
661 {
662 string[i++] = NET_RATE_24M_BASIC;
663 }
664 else
665 {
666 string[i++] = NET_RATE_24M;
667 }
668 }
669
670 if (uSuppRatesBitMap & DRV_RATE_MASK_36_OFDM)
671 {
672 if (uBasicRatesBitMap & DRV_RATE_MASK_36_OFDM)
673 {
674 string[i++] = NET_RATE_36M_BASIC;
675 }
676 else
677 {
678 string[i++] = NET_RATE_36M;
679 }
680 }
681
682 if (uSuppRatesBitMap & DRV_RATE_MASK_48_OFDM)
683 {
684 if (uBasicRatesBitMap & DRV_RATE_MASK_48_OFDM)
685 {
686 string[i++] = NET_RATE_48M_BASIC;
687 }
688 else
689 {
690 string[i++] = NET_RATE_48M;
691 }
692 }
693
694 if (uSuppRatesBitMap & DRV_RATE_MASK_54_OFDM)
695 {
696 if (uBasicRatesBitMap & DRV_RATE_MASK_54_OFDM)
697 {
698 string[i++] = NET_RATE_54M_BASIC;
699 }
700 else
701 {
702 string[i++] = NET_RATE_54M;
703 }
704 }
705
706 /*
707 * Don't convert MCS rates,
708 * it is only for basic and extended rates, otherwise it will exceed 16 bytes string
709 * the code below is a sample and can be used in the future, if need to parse MCS rates bit map to string
710 */
711 #if 0
712 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_0_OFDM)
713 {
714 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_0_OFDM)
715 {
716 string[i++] = NET_RATE_MCS0_BASIC;
717 }
718 else
719 {
720 string[i++] = NET_RATE_MCS0;
721 }
722 }
723
724 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_1_OFDM)
725 {
726 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_1_OFDM)
727 {
728 string[i++] = NET_RATE_MCS1_BASIC;
729 }
730 else
731 {
732 string[i++] = NET_RATE_MCS1;
733 }
734 }
735
736 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_2_OFDM)
737 {
738 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_2_OFDM)
739 {
740 string[i++] = NET_RATE_MCS2_BASIC;
741 }
742 else
743 {
744 string[i++] = NET_RATE_MCS2;
745 }
746 }
747
748 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_3_OFDM)
749 {
750 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_3_OFDM)
751 {
752 string[i++] = NET_RATE_MCS3_BASIC;
753 }
754 else
755 {
756 string[i++] = NET_RATE_MCS3;
757 }
758 }
759
760 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_4_OFDM)
761 {
762 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_4_OFDM)
763 {
764 string[i++] = NET_RATE_MCS4_BASIC;
765 }
766 else
767 {
768 string[i++] = NET_RATE_MCS4;
769 }
770 }
771
772 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_5_OFDM)
773 {
774 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_5_OFDM)
775 {
776 string[i++] = NET_RATE_MCS5_BASIC;
777 }
778 else
779 {
780 string[i++] = NET_RATE_MCS5;
781 }
782 }
783
784 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_6_OFDM)
785 {
786 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_6_OFDM)
787 {
788 string[i++] = NET_RATE_MCS6_BASIC;
789 }
790 else
791 {
792 string[i++] = NET_RATE_MCS6;
793 }
794 }
795
796 if (uSuppRatesBitMap & DRV_RATE_MASK_MCS_7_OFDM)
797 {
798 if (uBasicRatesBitMap & DRV_RATE_MASK_MCS_7_OFDM)
799 {
800 string[i++] = NET_RATE_MCS7_BASIC;
801 }
802 else
803 {
804 string[i++] = NET_RATE_MCS7;
805 }
806 }
807 #endif
808
809 *len = i;
810
811 return TI_OK;
812 }
813
814 /************************************************************************
815 * networkStringToBitMapSuppRates *
816 ************************************************************************
817 DESCRIPTION: Converts supported rates string to the bit map
818
819 INPUT: string - array of rates in the network format
820 len - array length
821
822 OUTPUT: bitMap - bit map of rates.
823
824 RETURN: None
825
826 ************************************************************************/
rate_NetStrToDrvBitmap(TI_UINT32 * pBitMap,TI_UINT8 * string,TI_UINT32 len)827 TI_STATUS rate_NetStrToDrvBitmap (TI_UINT32 *pBitMap, TI_UINT8 *string, TI_UINT32 len)
828 {
829 TI_UINT32 i;
830
831 *pBitMap = 0;
832
833 for (i = 0; i < len; i++)
834 {
835 switch (string[i])
836 {
837 case NET_RATE_1M:
838 case NET_RATE_1M_BASIC:
839 *pBitMap |= DRV_RATE_MASK_1_BARKER;
840 break;
841
842 case NET_RATE_2M:
843 case NET_RATE_2M_BASIC:
844 *pBitMap |= DRV_RATE_MASK_2_BARKER;
845 break;
846
847 case NET_RATE_5_5M:
848 case NET_RATE_5_5M_BASIC:
849 *pBitMap |= DRV_RATE_MASK_5_5_CCK;
850 break;
851
852 case NET_RATE_11M:
853 case NET_RATE_11M_BASIC:
854 *pBitMap |= DRV_RATE_MASK_11_CCK;
855 break;
856
857 case NET_RATE_22M:
858 case NET_RATE_22M_BASIC:
859 *pBitMap |= DRV_RATE_MASK_22_PBCC;
860 break;
861
862 case NET_RATE_6M:
863 case NET_RATE_6M_BASIC:
864 *pBitMap |= DRV_RATE_MASK_6_OFDM;
865 break;
866
867 case NET_RATE_9M:
868 case NET_RATE_9M_BASIC:
869 *pBitMap |= DRV_RATE_MASK_9_OFDM;
870 break;
871
872 case NET_RATE_12M:
873 case NET_RATE_12M_BASIC:
874 *pBitMap |= DRV_RATE_MASK_12_OFDM;
875 break;
876
877 case NET_RATE_18M:
878 case NET_RATE_18M_BASIC:
879 *pBitMap |= DRV_RATE_MASK_18_OFDM;
880 break;
881
882 case NET_RATE_24M:
883 case NET_RATE_24M_BASIC:
884 *pBitMap |= DRV_RATE_MASK_24_OFDM;
885 break;
886
887 case NET_RATE_36M:
888 case NET_RATE_36M_BASIC:
889 *pBitMap |= DRV_RATE_MASK_36_OFDM;
890 break;
891
892 case NET_RATE_48M:
893 case NET_RATE_48M_BASIC:
894 *pBitMap |= DRV_RATE_MASK_48_OFDM;
895 break;
896
897 case NET_RATE_54M:
898 case NET_RATE_54M_BASIC:
899 *pBitMap |= DRV_RATE_MASK_54_OFDM;
900 break;
901
902 case NET_RATE_MCS0:
903 case NET_RATE_MCS0_BASIC:
904 *pBitMap |= DRV_RATE_MASK_MCS_0_OFDM;
905 break;
906
907 case NET_RATE_MCS1:
908 case NET_RATE_MCS1_BASIC:
909 *pBitMap |= DRV_RATE_MASK_MCS_1_OFDM;
910 break;
911
912 case NET_RATE_MCS2:
913 case NET_RATE_MCS2_BASIC:
914 *pBitMap |= DRV_RATE_MASK_MCS_2_OFDM;
915 break;
916
917 case NET_RATE_MCS3:
918 case NET_RATE_MCS3_BASIC:
919 *pBitMap |= DRV_RATE_MASK_MCS_3_OFDM;
920 break;
921
922 case NET_RATE_MCS4:
923 case NET_RATE_MCS4_BASIC:
924 *pBitMap |= DRV_RATE_MASK_MCS_4_OFDM;
925 break;
926
927 case NET_RATE_MCS5:
928 case NET_RATE_MCS5_BASIC:
929 *pBitMap |= DRV_RATE_MASK_MCS_5_OFDM;
930 break;
931
932 case NET_RATE_MCS6:
933 case NET_RATE_MCS6_BASIC:
934 *pBitMap |= DRV_RATE_MASK_MCS_6_OFDM;
935 break;
936
937 case NET_RATE_MCS7:
938 case NET_RATE_MCS7_BASIC:
939 *pBitMap |= DRV_RATE_MASK_MCS_7_OFDM;
940 break;
941
942 default:
943 break;
944 }
945 }
946
947 return TI_OK;
948 }
949
950 /************************************************************************
951 * networkStringToBitMapBasicRates *
952 ************************************************************************
953 DESCRIPTION: Converts basic rates string to the bit map
954
955 INPUT: string - array of rates in the network format
956 len - array length
957
958 OUTPUT: bitMap - bit map of rates.
959
960 RETURN: None
961
962 ************************************************************************/
rate_NetBasicStrToDrvBitmap(TI_UINT32 * pBitMap,TI_UINT8 * string,TI_UINT32 len)963 TI_STATUS rate_NetBasicStrToDrvBitmap (TI_UINT32 *pBitMap, TI_UINT8 *string, TI_UINT32 len)
964 {
965 TI_UINT32 i;
966
967 *pBitMap = 0;
968
969 for (i = 0; i < len; i++)
970 {
971 switch (string[i])
972 {
973 case NET_RATE_1M_BASIC:
974 *pBitMap |= DRV_RATE_MASK_1_BARKER;
975 break;
976
977 case NET_RATE_2M_BASIC:
978 *pBitMap |= DRV_RATE_MASK_2_BARKER;
979 break;
980
981 case NET_RATE_5_5M_BASIC:
982 *pBitMap |= DRV_RATE_MASK_5_5_CCK;
983 break;
984
985 case NET_RATE_11M_BASIC:
986 *pBitMap |= DRV_RATE_MASK_11_CCK;
987 break;
988
989 case NET_RATE_22M_BASIC:
990 *pBitMap |= DRV_RATE_MASK_22_PBCC;
991 break;
992
993 case NET_RATE_6M_BASIC:
994 *pBitMap |= DRV_RATE_MASK_6_OFDM;
995 break;
996
997 case NET_RATE_9M_BASIC:
998 *pBitMap |= DRV_RATE_MASK_9_OFDM;
999 break;
1000
1001 case NET_RATE_12M_BASIC:
1002 *pBitMap |= DRV_RATE_MASK_12_OFDM;
1003 break;
1004
1005 case NET_RATE_18M_BASIC:
1006 *pBitMap |= DRV_RATE_MASK_18_OFDM;
1007 break;
1008
1009 case NET_RATE_24M_BASIC:
1010 *pBitMap |= DRV_RATE_MASK_24_OFDM;
1011 break;
1012
1013 case NET_RATE_36M_BASIC:
1014 *pBitMap |= DRV_RATE_MASK_36_OFDM;
1015 break;
1016
1017 case NET_RATE_48M_BASIC:
1018 *pBitMap |= DRV_RATE_MASK_48_OFDM;
1019 break;
1020
1021 case NET_RATE_54M_BASIC:
1022 *pBitMap |= DRV_RATE_MASK_54_OFDM;
1023 break;
1024
1025 case NET_RATE_MCS0_BASIC:
1026 *pBitMap |= DRV_RATE_MASK_MCS_0_OFDM;
1027 break;
1028
1029 case NET_RATE_MCS1_BASIC:
1030 *pBitMap |= DRV_RATE_MASK_MCS_1_OFDM;
1031 break;
1032
1033 case NET_RATE_MCS2_BASIC:
1034 *pBitMap |= DRV_RATE_MASK_MCS_2_OFDM;
1035 break;
1036
1037 case NET_RATE_MCS3_BASIC:
1038 *pBitMap |= DRV_RATE_MASK_MCS_3_OFDM;
1039 break;
1040
1041 case NET_RATE_MCS4_BASIC:
1042 *pBitMap |= DRV_RATE_MASK_MCS_4_OFDM;
1043 break;
1044
1045 case NET_RATE_MCS5_BASIC:
1046 *pBitMap |= DRV_RATE_MASK_MCS_5_OFDM;
1047 break;
1048
1049 case NET_RATE_MCS6_BASIC:
1050 *pBitMap |= DRV_RATE_MASK_MCS_6_OFDM;
1051 break;
1052
1053 case NET_RATE_MCS7_BASIC:
1054 *pBitMap |= DRV_RATE_MASK_MCS_7_OFDM;
1055 break;
1056
1057 default:
1058 break;
1059 }
1060 }
1061
1062 return TI_OK;
1063 }
1064
1065
1066 /************************************************************************
1067 * rate_McsNetStrToDrvBitmap *
1068 ************************************************************************
1069 DESCRIPTION: Converts MCS IEs rates bit map to driver bit map.
1070 supported only MCS0 - MCS7
1071
1072 INPUT: string - HT capabilities IE in the network format
1073 len - IE array length
1074
1075 OUTPUT: bitMap - bit map of rates.
1076
1077 RETURN: None
1078
1079 ************************************************************************/
rate_McsNetStrToDrvBitmap(TI_UINT32 * pBitMap,TI_UINT8 * string)1080 TI_STATUS rate_McsNetStrToDrvBitmap (TI_UINT32 *pBitMap, TI_UINT8 *string)
1081 {
1082 *pBitMap = string[0];
1083
1084 *pBitMap = *pBitMap << (DRV_RATE_MCS_0 - 1);
1085
1086 return TI_OK;
1087 }
1088
1089
rate_DrvBitmapToHwBitmap(TI_UINT32 uDrvBitMap,TI_UINT32 * pHwBitmap)1090 TI_STATUS rate_DrvBitmapToHwBitmap (TI_UINT32 uDrvBitMap, TI_UINT32 *pHwBitmap)
1091 {
1092 TI_UINT32 uHwBitMap = 0;
1093
1094 if (uDrvBitMap & DRV_RATE_MASK_1_BARKER)
1095 {
1096 uHwBitMap |= HW_BIT_RATE_1MBPS;
1097 }
1098
1099 if (uDrvBitMap & DRV_RATE_MASK_2_BARKER)
1100 {
1101 uHwBitMap |= HW_BIT_RATE_2MBPS;
1102 }
1103
1104 if (uDrvBitMap & DRV_RATE_MASK_5_5_CCK)
1105 {
1106 uHwBitMap |= HW_BIT_RATE_5_5MBPS;
1107 }
1108
1109 if (uDrvBitMap & DRV_RATE_MASK_11_CCK)
1110 {
1111 uHwBitMap |= HW_BIT_RATE_11MBPS;
1112 }
1113
1114 if (uDrvBitMap & DRV_RATE_MASK_22_PBCC)
1115 {
1116 uHwBitMap |= HW_BIT_RATE_22MBPS;
1117 }
1118
1119 if (uDrvBitMap & DRV_RATE_MASK_6_OFDM)
1120 {
1121 uHwBitMap |= HW_BIT_RATE_6MBPS;
1122 }
1123
1124 if (uDrvBitMap & DRV_RATE_MASK_9_OFDM)
1125 {
1126 uHwBitMap |= HW_BIT_RATE_9MBPS;
1127 }
1128
1129 if (uDrvBitMap & DRV_RATE_MASK_12_OFDM)
1130 {
1131 uHwBitMap |= HW_BIT_RATE_12MBPS;
1132 }
1133
1134 if (uDrvBitMap & DRV_RATE_MASK_18_OFDM)
1135 {
1136 uHwBitMap |= HW_BIT_RATE_18MBPS;
1137 }
1138
1139 if (uDrvBitMap & DRV_RATE_MASK_24_OFDM)
1140 {
1141 uHwBitMap |= HW_BIT_RATE_24MBPS;
1142 }
1143
1144 if (uDrvBitMap & DRV_RATE_MASK_36_OFDM)
1145 {
1146 uHwBitMap |= HW_BIT_RATE_36MBPS;
1147 }
1148
1149 if (uDrvBitMap & DRV_RATE_MASK_48_OFDM)
1150 {
1151 uHwBitMap |= HW_BIT_RATE_48MBPS;
1152 }
1153
1154 if (uDrvBitMap & DRV_RATE_MASK_54_OFDM)
1155 {
1156 uHwBitMap |= HW_BIT_RATE_54MBPS;
1157 }
1158
1159 if (uDrvBitMap & DRV_RATE_MASK_MCS_0_OFDM)
1160 {
1161 uHwBitMap |= HW_BIT_RATE_MCS_0;
1162 }
1163
1164 if (uDrvBitMap & DRV_RATE_MASK_MCS_1_OFDM)
1165 {
1166 uHwBitMap |= HW_BIT_RATE_MCS_1;
1167 }
1168
1169 if (uDrvBitMap & DRV_RATE_MASK_MCS_2_OFDM)
1170 {
1171 uHwBitMap |= HW_BIT_RATE_MCS_2;
1172 }
1173
1174 if (uDrvBitMap & DRV_RATE_MASK_MCS_3_OFDM)
1175 {
1176 uHwBitMap |= HW_BIT_RATE_MCS_3;
1177 }
1178
1179 if (uDrvBitMap & DRV_RATE_MASK_MCS_4_OFDM)
1180 {
1181 uHwBitMap |= HW_BIT_RATE_MCS_4;
1182 }
1183
1184 if (uDrvBitMap & DRV_RATE_MASK_MCS_5_OFDM)
1185 {
1186 uHwBitMap |= HW_BIT_RATE_MCS_5;
1187 }
1188
1189 if (uDrvBitMap & DRV_RATE_MASK_MCS_6_OFDM)
1190 {
1191 uHwBitMap |= HW_BIT_RATE_MCS_6;
1192 }
1193
1194 if (uDrvBitMap & DRV_RATE_MASK_MCS_7_OFDM)
1195 {
1196 uHwBitMap |= HW_BIT_RATE_MCS_7;
1197 }
1198
1199 *pHwBitmap = uHwBitMap;
1200
1201 return TI_OK;
1202 }
1203
rate_PolicyToDrv(ETxRateClassId ePolicyRate,ERate * eAppRate)1204 TI_STATUS rate_PolicyToDrv (ETxRateClassId ePolicyRate, ERate *eAppRate)
1205 {
1206 TI_UINT8 Rate = 0;
1207 TI_STATUS status = TI_OK;
1208
1209 switch (ePolicyRate)
1210 {
1211 case txPolicy1 : Rate = DRV_RATE_1M ; break;
1212 case txPolicy2 : Rate = DRV_RATE_2M ; break;
1213 case txPolicy5_5 : Rate = DRV_RATE_5_5M ; break;
1214 case txPolicy11 : Rate = DRV_RATE_11M ; break;
1215 case txPolicy22 : Rate = DRV_RATE_22M ; break;
1216 case txPolicy6 : Rate = DRV_RATE_6M ; break;
1217 case txPolicy9 : Rate = DRV_RATE_9M ; break;
1218 case txPolicy12 : Rate = DRV_RATE_12M ; break;
1219 case txPolicy18 : Rate = DRV_RATE_18M ; break;
1220 case txPolicy24 : Rate = DRV_RATE_24M ; break;
1221 case txPolicy36 : Rate = DRV_RATE_36M ; break;
1222 case txPolicy48 : Rate = DRV_RATE_48M ; break;
1223 case txPolicy54 : Rate = DRV_RATE_54M ; break;
1224 case txPolicyMcs0 : Rate = DRV_RATE_MCS_0; break;
1225 case txPolicyMcs1 : Rate = DRV_RATE_MCS_1; break;
1226 case txPolicyMcs2 : Rate = DRV_RATE_MCS_2; break;
1227 case txPolicyMcs3 : Rate = DRV_RATE_MCS_3; break;
1228 case txPolicyMcs4 : Rate = DRV_RATE_MCS_4; break;
1229 case txPolicyMcs5 : Rate = DRV_RATE_MCS_5; break;
1230 case txPolicyMcs6 : Rate = DRV_RATE_MCS_6; break;
1231 case txPolicyMcs7 : Rate = DRV_RATE_MCS_7; break;
1232
1233 default:
1234 status = TI_NOK;
1235 break;
1236 }
1237
1238 if (status == TI_OK)
1239 *eAppRate = Rate;
1240 else
1241 *eAppRate = DRV_RATE_INVALID;
1242
1243 return status;
1244 }
1245
1246
rate_BasicToDrvBitmap(EBasicRateSet eBasicRateSet,TI_BOOL bDot11a)1247 TI_UINT32 rate_BasicToDrvBitmap (EBasicRateSet eBasicRateSet, TI_BOOL bDot11a)
1248 {
1249 if (!bDot11a)
1250 {
1251 switch (eBasicRateSet)
1252 {
1253 case BASIC_RATE_SET_1_2:
1254 return DRV_RATE_MASK_1_BARKER |
1255 DRV_RATE_MASK_2_BARKER;
1256
1257 case BASIC_RATE_SET_1_2_5_5_11:
1258 return DRV_RATE_MASK_1_BARKER |
1259 DRV_RATE_MASK_2_BARKER |
1260 DRV_RATE_MASK_5_5_CCK |
1261 DRV_RATE_MASK_11_CCK;
1262
1263 case BASIC_RATE_SET_UP_TO_12:
1264 return DRV_RATE_MASK_1_BARKER |
1265 DRV_RATE_MASK_2_BARKER |
1266 DRV_RATE_MASK_5_5_CCK |
1267 DRV_RATE_MASK_11_CCK |
1268 DRV_RATE_MASK_6_OFDM |
1269 DRV_RATE_MASK_9_OFDM |
1270 DRV_RATE_MASK_12_OFDM;
1271
1272 case BASIC_RATE_SET_UP_TO_18:
1273 return DRV_RATE_MASK_1_BARKER |
1274 DRV_RATE_MASK_2_BARKER |
1275 DRV_RATE_MASK_5_5_CCK |
1276 DRV_RATE_MASK_11_CCK |
1277 DRV_RATE_MASK_6_OFDM |
1278 DRV_RATE_MASK_9_OFDM |
1279 DRV_RATE_MASK_12_OFDM |
1280 DRV_RATE_MASK_18_OFDM;
1281
1282 case BASIC_RATE_SET_UP_TO_24:
1283 return DRV_RATE_MASK_1_BARKER |
1284 DRV_RATE_MASK_2_BARKER |
1285 DRV_RATE_MASK_5_5_CCK |
1286 DRV_RATE_MASK_11_CCK |
1287 DRV_RATE_MASK_6_OFDM |
1288 DRV_RATE_MASK_9_OFDM |
1289 DRV_RATE_MASK_12_OFDM |
1290 DRV_RATE_MASK_18_OFDM |
1291 DRV_RATE_MASK_24_OFDM;
1292
1293 case BASIC_RATE_SET_UP_TO_36:
1294 return DRV_RATE_MASK_1_BARKER |
1295 DRV_RATE_MASK_2_BARKER |
1296 DRV_RATE_MASK_5_5_CCK |
1297 DRV_RATE_MASK_11_CCK |
1298 DRV_RATE_MASK_6_OFDM |
1299 DRV_RATE_MASK_9_OFDM |
1300 DRV_RATE_MASK_12_OFDM |
1301 DRV_RATE_MASK_18_OFDM |
1302 DRV_RATE_MASK_24_OFDM |
1303 DRV_RATE_MASK_36_OFDM;
1304
1305 case BASIC_RATE_SET_UP_TO_48:
1306 return DRV_RATE_MASK_1_BARKER |
1307 DRV_RATE_MASK_2_BARKER |
1308 DRV_RATE_MASK_5_5_CCK |
1309 DRV_RATE_MASK_11_CCK |
1310 DRV_RATE_MASK_6_OFDM |
1311 DRV_RATE_MASK_9_OFDM |
1312 DRV_RATE_MASK_12_OFDM |
1313 DRV_RATE_MASK_18_OFDM |
1314 DRV_RATE_MASK_24_OFDM |
1315 DRV_RATE_MASK_36_OFDM |
1316 DRV_RATE_MASK_48_OFDM;
1317
1318 case BASIC_RATE_SET_UP_TO_54:
1319 return DRV_RATE_MASK_1_BARKER |
1320 DRV_RATE_MASK_2_BARKER |
1321 DRV_RATE_MASK_5_5_CCK |
1322 DRV_RATE_MASK_11_CCK |
1323 DRV_RATE_MASK_6_OFDM |
1324 DRV_RATE_MASK_9_OFDM |
1325 DRV_RATE_MASK_12_OFDM |
1326 DRV_RATE_MASK_18_OFDM |
1327 DRV_RATE_MASK_24_OFDM |
1328 DRV_RATE_MASK_36_OFDM |
1329 DRV_RATE_MASK_48_OFDM |
1330 DRV_RATE_MASK_54_OFDM;
1331
1332 case BASIC_RATE_SET_6_12_24:
1333 return DRV_RATE_MASK_6_OFDM |
1334 DRV_RATE_MASK_12_OFDM |
1335 DRV_RATE_MASK_24_OFDM;
1336
1337 case BASIC_RATE_SET_1_2_5_5_6_11_12_24:
1338 return DRV_RATE_MASK_1_BARKER |
1339 DRV_RATE_MASK_2_BARKER |
1340 DRV_RATE_MASK_5_5_CCK |
1341 DRV_RATE_MASK_11_CCK |
1342 DRV_RATE_MASK_6_OFDM |
1343 DRV_RATE_MASK_12_OFDM |
1344 DRV_RATE_MASK_24_OFDM;
1345
1346 case BASIC_RATE_SET_ALL_MCS_RATES:
1347 return DRV_RATE_MASK_MCS_0_OFDM |
1348 DRV_RATE_MASK_MCS_1_OFDM |
1349 DRV_RATE_MASK_MCS_2_OFDM |
1350 DRV_RATE_MASK_MCS_3_OFDM |
1351 DRV_RATE_MASK_MCS_4_OFDM |
1352 DRV_RATE_MASK_MCS_5_OFDM |
1353 DRV_RATE_MASK_MCS_6_OFDM |
1354 DRV_RATE_MASK_MCS_7_OFDM |
1355 DRV_RATE_MASK_1_BARKER |
1356 DRV_RATE_MASK_2_BARKER |
1357 DRV_RATE_MASK_5_5_CCK |
1358 DRV_RATE_MASK_11_CCK;
1359
1360
1361 default:
1362 return DRV_RATE_MASK_1_BARKER |
1363 DRV_RATE_MASK_2_BARKER;
1364 }
1365 }
1366 else
1367 {
1368 switch (eBasicRateSet)
1369 {
1370 case BASIC_RATE_SET_UP_TO_12:
1371 return DRV_RATE_MASK_6_OFDM |
1372 DRV_RATE_MASK_9_OFDM |
1373 DRV_RATE_MASK_12_OFDM;
1374
1375 case BASIC_RATE_SET_UP_TO_18:
1376 return DRV_RATE_MASK_6_OFDM |
1377 DRV_RATE_MASK_9_OFDM |
1378 DRV_RATE_MASK_12_OFDM |
1379 DRV_RATE_MASK_18_OFDM;
1380
1381 case BASIC_RATE_SET_UP_TO_24:
1382 return DRV_RATE_MASK_6_OFDM |
1383 DRV_RATE_MASK_9_OFDM |
1384 DRV_RATE_MASK_12_OFDM |
1385 DRV_RATE_MASK_18_OFDM |
1386 DRV_RATE_MASK_24_OFDM;
1387
1388 case BASIC_RATE_SET_UP_TO_36:
1389 return DRV_RATE_MASK_6_OFDM |
1390 DRV_RATE_MASK_9_OFDM |
1391 DRV_RATE_MASK_12_OFDM |
1392 DRV_RATE_MASK_18_OFDM |
1393 DRV_RATE_MASK_24_OFDM |
1394 DRV_RATE_MASK_36_OFDM;
1395
1396 case BASIC_RATE_SET_UP_TO_48:
1397 return DRV_RATE_MASK_6_OFDM |
1398 DRV_RATE_MASK_9_OFDM |
1399 DRV_RATE_MASK_12_OFDM |
1400 DRV_RATE_MASK_18_OFDM |
1401 DRV_RATE_MASK_24_OFDM |
1402 DRV_RATE_MASK_36_OFDM |
1403 DRV_RATE_MASK_48_OFDM;
1404
1405 case BASIC_RATE_SET_UP_TO_54:
1406 return DRV_RATE_MASK_6_OFDM |
1407 DRV_RATE_MASK_9_OFDM |
1408 DRV_RATE_MASK_12_OFDM |
1409 DRV_RATE_MASK_18_OFDM |
1410 DRV_RATE_MASK_24_OFDM |
1411 DRV_RATE_MASK_36_OFDM |
1412 DRV_RATE_MASK_48_OFDM |
1413 DRV_RATE_MASK_54_OFDM;
1414
1415 case BASIC_RATE_SET_6_12_24:
1416 return DRV_RATE_MASK_6_OFDM |
1417 DRV_RATE_MASK_12_OFDM |
1418 DRV_RATE_MASK_24_OFDM;
1419
1420 case BASIC_RATE_SET_ALL_MCS_RATES:
1421 return DRV_RATE_MASK_MCS_0_OFDM |
1422 DRV_RATE_MASK_MCS_1_OFDM |
1423 DRV_RATE_MASK_MCS_2_OFDM |
1424 DRV_RATE_MASK_MCS_3_OFDM |
1425 DRV_RATE_MASK_MCS_4_OFDM |
1426 DRV_RATE_MASK_MCS_5_OFDM |
1427 DRV_RATE_MASK_MCS_6_OFDM |
1428 DRV_RATE_MASK_MCS_7_OFDM |
1429 DRV_RATE_MASK_6_OFDM |
1430 DRV_RATE_MASK_12_OFDM |
1431 DRV_RATE_MASK_24_OFDM;
1432
1433 default:
1434 return DRV_RATE_MASK_6_OFDM |
1435 DRV_RATE_MASK_12_OFDM |
1436 DRV_RATE_MASK_24_OFDM;
1437 }
1438 }
1439 }
1440
rate_SupportedToDrvBitmap(ESupportedRateSet eSupportedRateSet,TI_BOOL bDot11a)1441 TI_UINT32 rate_SupportedToDrvBitmap (ESupportedRateSet eSupportedRateSet, TI_BOOL bDot11a)
1442 {
1443 if (!bDot11a)
1444 {
1445 switch (eSupportedRateSet)
1446 {
1447 case SUPPORTED_RATE_SET_1_2:
1448 return DRV_RATE_MASK_1_BARKER |
1449 DRV_RATE_MASK_2_BARKER;
1450
1451 case SUPPORTED_RATE_SET_1_2_5_5_11:
1452 return DRV_RATE_MASK_1_BARKER |
1453 DRV_RATE_MASK_2_BARKER |
1454 DRV_RATE_MASK_5_5_CCK |
1455 DRV_RATE_MASK_11_CCK;
1456
1457 case SUPPORTED_RATE_SET_1_2_5_5_11_22:
1458 return DRV_RATE_MASK_1_BARKER |
1459 DRV_RATE_MASK_2_BARKER |
1460 DRV_RATE_MASK_5_5_CCK |
1461 DRV_RATE_MASK_11_CCK |
1462 DRV_RATE_MASK_22_PBCC;
1463
1464 case SUPPORTED_RATE_SET_UP_TO_18:
1465 return DRV_RATE_MASK_1_BARKER |
1466 DRV_RATE_MASK_2_BARKER |
1467 DRV_RATE_MASK_5_5_CCK |
1468 DRV_RATE_MASK_11_CCK |
1469 DRV_RATE_MASK_6_OFDM |
1470 DRV_RATE_MASK_9_OFDM |
1471 DRV_RATE_MASK_12_OFDM |
1472 DRV_RATE_MASK_18_OFDM;
1473
1474 case SUPPORTED_RATE_SET_UP_TO_24:
1475 return DRV_RATE_MASK_1_BARKER |
1476 DRV_RATE_MASK_2_BARKER |
1477 DRV_RATE_MASK_5_5_CCK |
1478 DRV_RATE_MASK_11_CCK |
1479 DRV_RATE_MASK_6_OFDM |
1480 DRV_RATE_MASK_9_OFDM |
1481 DRV_RATE_MASK_12_OFDM |
1482 DRV_RATE_MASK_18_OFDM |
1483 DRV_RATE_MASK_24_OFDM;
1484
1485 case SUPPORTED_RATE_SET_UP_TO_36:
1486 return DRV_RATE_MASK_1_BARKER |
1487 DRV_RATE_MASK_2_BARKER |
1488 DRV_RATE_MASK_5_5_CCK |
1489 DRV_RATE_MASK_11_CCK |
1490 DRV_RATE_MASK_6_OFDM |
1491 DRV_RATE_MASK_9_OFDM |
1492 DRV_RATE_MASK_12_OFDM |
1493 DRV_RATE_MASK_18_OFDM |
1494 DRV_RATE_MASK_24_OFDM |
1495 DRV_RATE_MASK_36_OFDM;
1496
1497 case SUPPORTED_RATE_SET_UP_TO_48:
1498 return DRV_RATE_MASK_1_BARKER |
1499 DRV_RATE_MASK_2_BARKER |
1500 DRV_RATE_MASK_5_5_CCK |
1501 DRV_RATE_MASK_11_CCK |
1502 DRV_RATE_MASK_6_OFDM |
1503 DRV_RATE_MASK_9_OFDM |
1504 DRV_RATE_MASK_12_OFDM |
1505 DRV_RATE_MASK_18_OFDM |
1506 DRV_RATE_MASK_24_OFDM |
1507 DRV_RATE_MASK_36_OFDM |
1508 DRV_RATE_MASK_48_OFDM;
1509
1510 case SUPPORTED_RATE_SET_UP_TO_54:
1511 return DRV_RATE_MASK_1_BARKER |
1512 DRV_RATE_MASK_2_BARKER |
1513 DRV_RATE_MASK_5_5_CCK |
1514 DRV_RATE_MASK_11_CCK |
1515 DRV_RATE_MASK_6_OFDM |
1516 DRV_RATE_MASK_9_OFDM |
1517 DRV_RATE_MASK_12_OFDM |
1518 DRV_RATE_MASK_18_OFDM |
1519 DRV_RATE_MASK_24_OFDM |
1520 DRV_RATE_MASK_36_OFDM |
1521 DRV_RATE_MASK_48_OFDM |
1522 DRV_RATE_MASK_54_OFDM;
1523
1524 case SUPPORTED_RATE_SET_ALL:
1525 return DRV_RATE_MASK_1_BARKER |
1526 DRV_RATE_MASK_2_BARKER |
1527 DRV_RATE_MASK_5_5_CCK |
1528 DRV_RATE_MASK_11_CCK |
1529 DRV_RATE_MASK_22_PBCC |
1530 DRV_RATE_MASK_6_OFDM |
1531 DRV_RATE_MASK_9_OFDM |
1532 DRV_RATE_MASK_12_OFDM |
1533 DRV_RATE_MASK_18_OFDM |
1534 DRV_RATE_MASK_24_OFDM |
1535 DRV_RATE_MASK_36_OFDM |
1536 DRV_RATE_MASK_48_OFDM |
1537 DRV_RATE_MASK_54_OFDM;
1538
1539 case SUPPORTED_RATE_SET_ALL_OFDM:
1540 return DRV_RATE_MASK_6_OFDM |
1541 DRV_RATE_MASK_9_OFDM |
1542 DRV_RATE_MASK_12_OFDM |
1543 DRV_RATE_MASK_18_OFDM |
1544 DRV_RATE_MASK_24_OFDM |
1545 DRV_RATE_MASK_36_OFDM |
1546 DRV_RATE_MASK_48_OFDM |
1547 DRV_RATE_MASK_54_OFDM;
1548
1549 case SUPPORTED_RATE_SET_ALL_MCS_RATES:
1550 return DRV_RATE_MASK_MCS_0_OFDM |
1551 DRV_RATE_MASK_MCS_1_OFDM |
1552 DRV_RATE_MASK_MCS_2_OFDM |
1553 DRV_RATE_MASK_MCS_3_OFDM |
1554 DRV_RATE_MASK_MCS_4_OFDM |
1555 DRV_RATE_MASK_MCS_5_OFDM |
1556 DRV_RATE_MASK_MCS_6_OFDM |
1557 DRV_RATE_MASK_MCS_7_OFDM |
1558 DRV_RATE_MASK_1_BARKER |
1559 DRV_RATE_MASK_2_BARKER |
1560 DRV_RATE_MASK_5_5_CCK |
1561 DRV_RATE_MASK_11_CCK |
1562 DRV_RATE_MASK_22_PBCC |
1563 DRV_RATE_MASK_6_OFDM |
1564 DRV_RATE_MASK_9_OFDM |
1565 DRV_RATE_MASK_12_OFDM |
1566 DRV_RATE_MASK_18_OFDM |
1567 DRV_RATE_MASK_24_OFDM |
1568 DRV_RATE_MASK_36_OFDM |
1569 DRV_RATE_MASK_48_OFDM |
1570 DRV_RATE_MASK_54_OFDM;
1571
1572 default:
1573 return DRV_RATE_MASK_1_BARKER |
1574 DRV_RATE_MASK_2_BARKER |
1575 DRV_RATE_MASK_5_5_CCK |
1576 DRV_RATE_MASK_11_CCK |
1577 DRV_RATE_MASK_22_PBCC |
1578 DRV_RATE_MASK_6_OFDM |
1579 DRV_RATE_MASK_9_OFDM |
1580 DRV_RATE_MASK_12_OFDM |
1581 DRV_RATE_MASK_18_OFDM |
1582 DRV_RATE_MASK_24_OFDM |
1583 DRV_RATE_MASK_36_OFDM |
1584 DRV_RATE_MASK_48_OFDM |
1585 DRV_RATE_MASK_54_OFDM;
1586 }
1587 }
1588 else
1589 {
1590 switch (eSupportedRateSet)
1591 {
1592 case SUPPORTED_RATE_SET_UP_TO_18:
1593 return DRV_RATE_MASK_6_OFDM |
1594 DRV_RATE_MASK_9_OFDM |
1595 DRV_RATE_MASK_12_OFDM |
1596 DRV_RATE_MASK_18_OFDM;
1597
1598 case SUPPORTED_RATE_SET_UP_TO_24:
1599 return DRV_RATE_MASK_6_OFDM |
1600 DRV_RATE_MASK_9_OFDM |
1601 DRV_RATE_MASK_12_OFDM |
1602 DRV_RATE_MASK_18_OFDM |
1603 DRV_RATE_MASK_24_OFDM;
1604
1605 case SUPPORTED_RATE_SET_UP_TO_36:
1606 return DRV_RATE_MASK_6_OFDM |
1607 DRV_RATE_MASK_9_OFDM |
1608 DRV_RATE_MASK_12_OFDM |
1609 DRV_RATE_MASK_18_OFDM |
1610 DRV_RATE_MASK_24_OFDM |
1611 DRV_RATE_MASK_36_OFDM;
1612
1613 case SUPPORTED_RATE_SET_UP_TO_48:
1614 return DRV_RATE_MASK_6_OFDM |
1615 DRV_RATE_MASK_9_OFDM |
1616 DRV_RATE_MASK_12_OFDM |
1617 DRV_RATE_MASK_18_OFDM |
1618 DRV_RATE_MASK_24_OFDM |
1619 DRV_RATE_MASK_36_OFDM |
1620 DRV_RATE_MASK_48_OFDM;
1621
1622 case SUPPORTED_RATE_SET_UP_TO_54:
1623 return DRV_RATE_MASK_6_OFDM |
1624 DRV_RATE_MASK_9_OFDM |
1625 DRV_RATE_MASK_12_OFDM |
1626 DRV_RATE_MASK_18_OFDM |
1627 DRV_RATE_MASK_24_OFDM |
1628 DRV_RATE_MASK_36_OFDM |
1629 DRV_RATE_MASK_48_OFDM |
1630 DRV_RATE_MASK_54_OFDM;
1631
1632 case SUPPORTED_RATE_SET_ALL:
1633 case SUPPORTED_RATE_SET_ALL_OFDM:
1634 return DRV_RATE_MASK_6_OFDM |
1635 DRV_RATE_MASK_9_OFDM |
1636 DRV_RATE_MASK_12_OFDM |
1637 DRV_RATE_MASK_18_OFDM |
1638 DRV_RATE_MASK_24_OFDM |
1639 DRV_RATE_MASK_36_OFDM |
1640 DRV_RATE_MASK_48_OFDM |
1641 DRV_RATE_MASK_54_OFDM;
1642
1643 case SUPPORTED_RATE_SET_ALL_MCS_RATES:
1644 return DRV_RATE_MASK_MCS_0_OFDM |
1645 DRV_RATE_MASK_MCS_1_OFDM |
1646 DRV_RATE_MASK_MCS_2_OFDM |
1647 DRV_RATE_MASK_MCS_3_OFDM |
1648 DRV_RATE_MASK_MCS_4_OFDM |
1649 DRV_RATE_MASK_MCS_5_OFDM |
1650 DRV_RATE_MASK_MCS_6_OFDM |
1651 DRV_RATE_MASK_MCS_7_OFDM |
1652 DRV_RATE_MASK_6_OFDM |
1653 DRV_RATE_MASK_9_OFDM |
1654 DRV_RATE_MASK_12_OFDM |
1655 DRV_RATE_MASK_18_OFDM |
1656 DRV_RATE_MASK_24_OFDM |
1657 DRV_RATE_MASK_36_OFDM |
1658 DRV_RATE_MASK_48_OFDM |
1659 DRV_RATE_MASK_54_OFDM;
1660
1661 default:
1662 return DRV_RATE_MASK_6_OFDM |
1663 DRV_RATE_MASK_9_OFDM |
1664 DRV_RATE_MASK_12_OFDM |
1665 DRV_RATE_MASK_18_OFDM |
1666 DRV_RATE_MASK_24_OFDM |
1667 DRV_RATE_MASK_36_OFDM |
1668 DRV_RATE_MASK_48_OFDM |
1669 DRV_RATE_MASK_54_OFDM;
1670 }
1671 }
1672 }
1673
rate_ValidateVsBand(TI_UINT32 * pSupportedMask,TI_UINT32 * pBasicMask,TI_BOOL bDot11a)1674 TI_STATUS rate_ValidateVsBand (TI_UINT32 *pSupportedMask, TI_UINT32 *pBasicMask, TI_BOOL bDot11a)
1675 {
1676 if (bDot11a)
1677 {
1678 *pSupportedMask &= ~
1679 (
1680 DRV_RATE_MASK_1_BARKER |
1681 DRV_RATE_MASK_2_BARKER |
1682 DRV_RATE_MASK_5_5_CCK |
1683 DRV_RATE_MASK_11_CCK |
1684 DRV_RATE_MASK_22_PBCC
1685 );
1686 }
1687
1688 *pBasicMask &= *pSupportedMask;
1689
1690 if (*pBasicMask == 0)
1691 {
1692 if (bDot11a)
1693 {
1694 *pBasicMask = DRV_RATE_MASK_6_OFDM | DRV_RATE_MASK_12_OFDM | DRV_RATE_MASK_24_OFDM;
1695 }
1696 else
1697 {
1698 *pBasicMask = DRV_RATE_MASK_1_BARKER | DRV_RATE_MASK_2_BARKER;
1699 }
1700 }
1701
1702 return TI_OK;
1703 }
1704
1705 /*-----------------------------------------------------------------------------
1706 Routine Name: RateNumberToHost
1707 Routine Description:
1708 Arguments:
1709 Return Value: None
1710 -----------------------------------------------------------------------------*/
rate_NumberToDrv(TI_UINT32 rate)1711 ERate rate_NumberToDrv (TI_UINT32 rate)
1712 {
1713 switch (rate)
1714 {
1715 case 0x1:
1716 return DRV_RATE_1M;
1717
1718 case 0x2:
1719 return DRV_RATE_2M;
1720
1721 case 0x5:
1722 return DRV_RATE_5_5M;
1723
1724 case 0xB:
1725 return DRV_RATE_11M;
1726
1727 case 0x16:
1728 return DRV_RATE_22M;
1729
1730 case 0x6:
1731 return DRV_RATE_6M;
1732
1733 case 0x9:
1734 return DRV_RATE_9M;
1735
1736 case 0xC:
1737 return DRV_RATE_12M;
1738
1739 case 0x12:
1740 return DRV_RATE_18M;
1741
1742 case 0x18:
1743 return DRV_RATE_24M;
1744
1745 case 0x24:
1746 return DRV_RATE_36M;
1747
1748 case 0x30:
1749 return DRV_RATE_48M;
1750
1751 case 0x36:
1752 return DRV_RATE_54M;
1753
1754 /* MCS rate */
1755 case 0x7:
1756 return DRV_RATE_MCS_0;
1757
1758 case 0xD:
1759 return DRV_RATE_MCS_1;
1760
1761 case 0x13:
1762 return DRV_RATE_MCS_2;
1763
1764 case 0x1A:
1765 return DRV_RATE_MCS_3;
1766
1767 case 0x27:
1768 return DRV_RATE_MCS_4;
1769
1770 case 0x34:
1771 return DRV_RATE_MCS_5;
1772
1773 case 0x3A:
1774 return DRV_RATE_MCS_6;
1775
1776 case 0x41:
1777 return DRV_RATE_MCS_7;
1778
1779 default:
1780 return DRV_RATE_6M;
1781 }
1782 }
1783
rate_GetDrvBitmapForDefaultBasicSet()1784 TI_UINT32 rate_GetDrvBitmapForDefaultBasicSet ()
1785 {
1786 return rate_BasicToDrvBitmap (BASIC_RATE_SET_1_2_5_5_11, TI_FALSE);
1787 }
1788
rate_GetDrvBitmapForDefaultSupporteSet()1789 TI_UINT32 rate_GetDrvBitmapForDefaultSupporteSet ()
1790 {
1791 return rate_SupportedToDrvBitmap (SUPPORTED_RATE_SET_1_2_5_5_11, TI_FALSE);
1792 }
1793
1794