Searched refs:aligned (Results 1 – 16 of 16) sorted by relevance
| /dalvik/dx/tests/077-dex-code-alignment/ |
| D | info.txt | 2 code arrays are 4-byte aligned within a dex file.
|
| /dalvik/vm/arch/arm/ |
| D | CallEABI.S | 143 @ sure we're aligned properly now.
144 DBG tst sp, #4 @ 64-bit aligned?
309 @ 64-bit value, insert padding if we're not aligned
324 DBG tst sp, #7 @ DEBUG - make sure sp is aligned now
375 @ ensure alignment. We know the [r8] output area is 64-bit aligned,
|
| /dalvik/vm/mterp/armv6t2/ |
| D | OP_IPUT_WIDE_QUICK.S | 13 strd r0, [r2, r3] @ obj.field (64 bits, aligned)<- r0/r1
|
| D | OP_IPUT_WIDE.S | 38 strd r0, [r9, r3] @ obj.field (64 bits, aligned)<- r0
|
| /dalvik/vm/mterp/armv5te/ |
| D | OP_IPUT_WIDE_QUICK.S | 14 strd r0, [r2, r3] @ obj.field (64 bits, aligned)<- r0/r1
|
| D | OP_SGET_WIDE.S | 22 ldrd r0, [r0, #offStaticField_value] @ r0/r1<- field value (aligned)
|
| D | OP_IPUT_WIDE.S | 44 strd r0, [r9, r3] @ obj.field (64 bits, aligned)<- r0/r1
|
| /dalvik/vm/mterp/armv4t/ |
| D | OP_IPUT_WIDE_QUICK.S | 15 stmia r2, {r0-r1} @ obj.field (64 bits, aligned)<- r0/r1
|
| D | OP_SGET_WIDE.S | 22 ldmia r0, {r0-r1} @ r0/r1<- field value (aligned)
|
| D | OP_IPUT_WIDE.S | 44 stmia r2, {r0-r1} @ obj.field (64 bits, aligned)<- r0/r1
|
| /dalvik/vm/alloc/ |
| D | Copying.c | 612 size_t aligned, available, blocks; in dvmHeapSourceAlloc() local
619 aligned = alignUp(length, ALLOC_ALIGNMENT); in dvmHeapSourceAlloc()
623 if (aligned <= available) { in dvmHeapSourceAlloc()
625 heapSource->allocPtr += aligned; in dvmHeapSourceAlloc()
626 heapSource->bytesAllocated += aligned; in dvmHeapSourceAlloc()
632 if (aligned <= BLOCK_SIZE) { in dvmHeapSourceAlloc()
636 heapSource->allocPtr = addr + aligned; in dvmHeapSourceAlloc()
637 heapSource->bytesAllocated += aligned; in dvmHeapSourceAlloc()
645 blocks = alignUp(aligned, BLOCK_SIZE) / BLOCK_SIZE; in dvmHeapSourceAlloc()
650 heapSource->bytesAllocated += aligned; in dvmHeapSourceAlloc()
|
| /dalvik/vm/mterp/out/ |
| D | InterpAsm-armv5te-vfp.S | 7319 ldrd r0, [r0, #offStaticField_value] @ r0/r1<- field value (aligned)
7491 ldrd r0, [r3, ip] @ r0<- obj.field (64 bits, aligned)
9224 strd r0, [r9, r3] @ obj.field (64 bits, aligned)<- r0/r1
|
| D | InterpAsm-armv7-a-neon.S | 7273 ldrd r0, [r0, #offStaticField_value] @ r0/r1<- field value (aligned)
7444 ldrd r0, [r3, ip] @ r0<- obj.field (64 bits, aligned)
9158 strd r0, [r9, r3] @ obj.field (64 bits, aligned)<- r0/r1
|
| D | InterpAsm-armv7-a.S | 7273 ldrd r0, [r0, #offStaticField_value] @ r0/r1<- field value (aligned)
7444 ldrd r0, [r3, ip] @ r0<- obj.field (64 bits, aligned)
9158 strd r0, [r9, r3] @ obj.field (64 bits, aligned)<- r0/r1
|
| D | InterpAsm-armv4t.S | 7639 ldmia r0, {r0-r1} @ r0/r1<- field value (aligned)
7812 ldmia r9, {r0-r1} @ r0/r1<- obj.field (64 bits, aligned)
9686 stmia r2, {r0-r1} @ obj.field (64 bits, aligned)<- r0/r1
|
| D | InterpAsm-armv5te.S | 7641 ldrd r0, [r0, #offStaticField_value] @ r0/r1<- field value (aligned)
7813 ldrd r0, [r3, ip] @ r0<- obj.field (64 bits, aligned)
9682 strd r0, [r9, r3] @ obj.field (64 bits, aligned)<- r0/r1
|