Searched refs:clz (Results 1 – 16 of 16) sorted by relevance
/external/qemu/tcg/ |
D | TODO | 1 - Add new instructions such as: setcond, clz, ctz, popcnt.
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/external/libvpx/vp8/encoder/arm/armv5te/ |
D | boolhuff_armv5te.asm | 65 clz r6, r4 138 clz r6, r4 229 clz r6, r4
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D | vp8_packtokens_partitions_armv5.asm | 138 clz r6, r4 236 clz r6, r4 357 clz r6, r4
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D | vp8_packtokens_armv5.asm | 89 clz r6, r4 187 clz r6, r4
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D | vp8_packtokens_mbrow_armv5.asm | 110 clz r6, r4 208 clz r6, r4
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/external/skia/src/core/ |
D | SkBitmap.cpp | 1040 int clz = SkCLZ(sx); in ComputeMipLevel() local 1041 SkASSERT(clz >= 1 && clz <= 15); in ComputeMipLevel() 1042 return SkIntToFixed(15 - clz) + ((unsigned)(sx << (clz + 1)) >> 16); in ComputeMipLevel()
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/external/libvpx/vp8/decoder/arm/ |
D | detokenize.asm | 125 clz r3, r2 ; vp8dx_bitreader_norm[range] + 24 173 clz r3, r2 ; shift - leading zeros in split
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/external/libvpx/vp8/decoder/arm/armv6/ |
D | dboolhuff_v6.asm | 140 clz r12, r2
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/external/libvpx/vp8/decoder/arm/neon/ |
D | dboolhuff_neon.asm | 140 clz r12, r2
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/external/v8/src/arm/ |
D | assembler-arm.h | 717 void clz(Register dst, Register src, Condition cond = al); // v5 and above
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D | assembler-thumb2.h | 717 void clz(Register dst, Register src, Condition cond = al); // v5 and above
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D | assembler-arm.cc | 1078 void Assembler::clz(Register dst, Register src, Condition cond) { in clz() function in v8::internal::Assembler
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D | assembler-thumb2.cc | 1058 void Assembler::clz(Register dst, Register src, Condition cond) { in clz() function in v8::internal::Assembler
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D | codegen-arm.cc | 4639 __ clz(zeros, source); // This instruction is only supported after ARM5. in CountLeadingZeros() local
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/external/qemu/target-arm/ |
D | helpers.h | 3 DEF_HELPER_1(clz, i32, i32)
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D | helper.c | 401 uint32_t HELPER(clz)(uint32_t x) in HELPER() argument
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