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Searched refs:clz (Results 1 – 16 of 16) sorted by relevance

/external/qemu/tcg/
DTODO1 - Add new instructions such as: setcond, clz, ctz, popcnt.
/external/libvpx/vp8/encoder/arm/armv5te/
Dboolhuff_armv5te.asm65 clz r6, r4
138 clz r6, r4
229 clz r6, r4
Dvp8_packtokens_partitions_armv5.asm138 clz r6, r4
236 clz r6, r4
357 clz r6, r4
Dvp8_packtokens_armv5.asm89 clz r6, r4
187 clz r6, r4
Dvp8_packtokens_mbrow_armv5.asm110 clz r6, r4
208 clz r6, r4
/external/skia/src/core/
DSkBitmap.cpp1040 int clz = SkCLZ(sx); in ComputeMipLevel() local
1041 SkASSERT(clz >= 1 && clz <= 15); in ComputeMipLevel()
1042 return SkIntToFixed(15 - clz) + ((unsigned)(sx << (clz + 1)) >> 16); in ComputeMipLevel()
/external/libvpx/vp8/decoder/arm/
Ddetokenize.asm125 clz r3, r2 ; vp8dx_bitreader_norm[range] + 24
173 clz r3, r2 ; shift - leading zeros in split
/external/libvpx/vp8/decoder/arm/armv6/
Ddboolhuff_v6.asm140 clz r12, r2
/external/libvpx/vp8/decoder/arm/neon/
Ddboolhuff_neon.asm140 clz r12, r2
/external/v8/src/arm/
Dassembler-arm.h717 void clz(Register dst, Register src, Condition cond = al); // v5 and above
Dassembler-thumb2.h717 void clz(Register dst, Register src, Condition cond = al); // v5 and above
Dassembler-arm.cc1078 void Assembler::clz(Register dst, Register src, Condition cond) { in clz() function in v8::internal::Assembler
Dassembler-thumb2.cc1058 void Assembler::clz(Register dst, Register src, Condition cond) { in clz() function in v8::internal::Assembler
Dcodegen-arm.cc4639 __ clz(zeros, source); // This instruction is only supported after ARM5. in CountLeadingZeros() local
/external/qemu/target-arm/
Dhelpers.h3 DEF_HELPER_1(clz, i32, i32)
Dhelper.c401 uint32_t HELPER(clz)(uint32_t x) in HELPER() argument