1 /* 2 * (C) Copyright Advanced Micro Devices, Inc. 2002, 2007 3 * Copyright (c) 2008-2009 QUALCOMM USA, INC. 4 * 5 * All source code in this file is licensed under the following license 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * version 2 as published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. 14 * See the GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, you can find it at http://www.fsf.org 18 */ 19 #ifndef _MSM_KGSL_H 20 #define _MSM_KGSL_H 21 22 /*context flags */ 23 #define KGSL_CONTEXT_SAVE_GMEM 1 24 #define KGSL_CONTEXT_NO_GMEM_ALLOC 2 25 26 /* generic flag values */ 27 #define KGSL_FLAGS_NORMALMODE 0x00000000 28 #define KGSL_FLAGS_SAFEMODE 0x00000001 29 #define KGSL_FLAGS_INITIALIZED0 0x00000002 30 #define KGSL_FLAGS_INITIALIZED 0x00000004 31 #define KGSL_FLAGS_STARTED 0x00000008 32 #define KGSL_FLAGS_ACTIVE 0x00000010 33 #define KGSL_FLAGS_RESERVED0 0x00000020 34 #define KGSL_FLAGS_RESERVED1 0x00000040 35 #define KGSL_FLAGS_RESERVED2 0x00000080 36 37 /* device id */ 38 enum kgsl_deviceid { 39 KGSL_DEVICE_ANY = 0x00000000, 40 KGSL_DEVICE_YAMATO = 0x00000001, 41 KGSL_DEVICE_G12 = 0x00000002, 42 KGSL_DEVICE_MAX = 0x00000002 43 }; 44 45 struct kgsl_devinfo { 46 47 unsigned int device_id; 48 /* chip revision id 49 * coreid:8 majorrev:8 minorrev:8 patch:8 50 */ 51 unsigned int chip_id; 52 unsigned int mmu_enabled; 53 unsigned int gmem_gpubaseaddr; 54 /* if gmem_hostbaseaddr is NULL, we would know its not mapped into 55 * mmio space */ 56 unsigned int gmem_hostbaseaddr; 57 unsigned int gmem_sizebytes; 58 }; 59 60 /* this structure defines the region of memory that can be mmap()ed from this 61 driver. The timestamp fields are volatile because they are written by the 62 GPU 63 */ 64 struct kgsl_devmemstore { 65 volatile unsigned int soptimestamp; 66 unsigned int sbz; 67 volatile unsigned int eoptimestamp; 68 unsigned int sbz2; 69 volatile unsigned int ts_cmp_enable; 70 unsigned int sbz3; 71 volatile unsigned int ref_wait_ts; 72 unsigned int sbz4; 73 }; 74 75 #define KGSL_DEVICE_MEMSTORE_OFFSET(field) \ 76 offsetof(struct kgsl_devmemstore, field) 77 78 79 /* timestamp id*/ 80 enum kgsl_timestamp_type { 81 KGSL_TIMESTAMP_CONSUMED = 0x00000001, /* start-of-pipeline timestamp */ 82 KGSL_TIMESTAMP_RETIRED = 0x00000002, /* end-of-pipeline timestamp*/ 83 KGSL_TIMESTAMP_MAX = 0x00000002, 84 }; 85 86 /* property types - used with kgsl_device_getproperty */ 87 enum kgsl_property_type { 88 KGSL_PROP_DEVICE_INFO = 0x00000001, 89 KGSL_PROP_DEVICE_SHADOW = 0x00000002, 90 KGSL_PROP_DEVICE_POWER = 0x00000003, 91 KGSL_PROP_SHMEM = 0x00000004, 92 KGSL_PROP_SHMEM_APERTURES = 0x00000005, 93 KGSL_PROP_MMU_ENABLE = 0x00000006, 94 KGSL_PROP_INTERRUPT_WAITS = 0x00000007, 95 }; 96 97 struct kgsl_shadowprop { 98 unsigned int gpuaddr; 99 unsigned int size; 100 unsigned int flags; /* contains KGSL_FLAGS_ values */ 101 }; 102 103 /* ioctls */ 104 #define KGSL_IOC_TYPE 0x09 105 106 /* get misc info about the GPU 107 type should be a value from enum kgsl_property_type 108 value points to a structure that varies based on type 109 sizebytes is sizeof() that structure 110 for KGSL_PROP_DEVICE_INFO, use struct kgsl_devinfo 111 this structure contaings hardware versioning info. 112 for KGSL_PROP_DEVICE_SHADOW, use struct kgsl_shadowprop 113 this is used to find mmap() offset and sizes for mapping 114 struct kgsl_memstore into userspace. 115 */ 116 struct kgsl_device_getproperty { 117 unsigned int type; 118 void *value; 119 unsigned int sizebytes; 120 }; 121 122 #define IOCTL_KGSL_DEVICE_GETPROPERTY \ 123 _IOWR(KGSL_IOC_TYPE, 0x2, struct kgsl_device_getproperty) 124 125 126 /* read a GPU register. 127 offsetwords it the 32 bit word offset from the beginning of the 128 GPU register space. 129 */ 130 struct kgsl_device_regread { 131 unsigned int offsetwords; 132 unsigned int value; /* output param */ 133 }; 134 135 #define IOCTL_KGSL_DEVICE_REGREAD \ 136 _IOWR(KGSL_IOC_TYPE, 0x3, struct kgsl_device_regread) 137 138 139 /* block until the GPU has executed past a given timestamp 140 * timeout is in milliseconds. 141 */ 142 struct kgsl_device_waittimestamp { 143 unsigned int timestamp; 144 unsigned int timeout; 145 }; 146 147 #define IOCTL_KGSL_DEVICE_WAITTIMESTAMP \ 148 _IOW(KGSL_IOC_TYPE, 0x6, struct kgsl_device_waittimestamp) 149 150 151 /* issue indirect commands to the GPU. 152 * drawctxt_id must have been created with IOCTL_KGSL_DRAWCTXT_CREATE 153 * ibaddr and sizedwords must specify a subset of a buffer created 154 * with IOCTL_KGSL_SHAREDMEM_FROM_PMEM 155 * flags may be a mask of KGSL_CONTEXT_ values 156 * timestamp is a returned counter value which can be passed to 157 * other ioctls to determine when the commands have been executed by 158 * the GPU. 159 */ 160 struct kgsl_ringbuffer_issueibcmds { 161 unsigned int drawctxt_id; 162 unsigned int ibaddr; 163 unsigned int sizedwords; 164 unsigned int timestamp; /*output param */ 165 unsigned int flags; 166 }; 167 168 #define IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS \ 169 _IOWR(KGSL_IOC_TYPE, 0x10, struct kgsl_ringbuffer_issueibcmds) 170 171 /* read the most recently executed timestamp value 172 * type should be a value from enum kgsl_timestamp_type 173 */ 174 struct kgsl_cmdstream_readtimestamp { 175 unsigned int type; 176 unsigned int timestamp; /*output param */ 177 }; 178 179 #define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP \ 180 _IOR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp) 181 182 /* free memory when the GPU reaches a given timestamp. 183 * gpuaddr specify a memory region created by a 184 * IOCTL_KGSL_SHAREDMEM_FROM_PMEM call 185 * type should be a value from enum kgsl_timestamp_type 186 */ 187 struct kgsl_cmdstream_freememontimestamp { 188 unsigned int gpuaddr; 189 unsigned int type; 190 unsigned int timestamp; 191 }; 192 193 #define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP \ 194 _IOR(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp) 195 196 /* create a draw context, which is used to preserve GPU state. 197 * The flags field may contain a mask KGSL_CONTEXT_* values 198 */ 199 struct kgsl_drawctxt_create { 200 unsigned int flags; 201 unsigned int drawctxt_id; /*output param */ 202 }; 203 204 #define IOCTL_KGSL_DRAWCTXT_CREATE \ 205 _IOWR(KGSL_IOC_TYPE, 0x13, struct kgsl_drawctxt_create) 206 207 /* destroy a draw context */ 208 struct kgsl_drawctxt_destroy { 209 unsigned int drawctxt_id; 210 }; 211 212 #define IOCTL_KGSL_DRAWCTXT_DESTROY \ 213 _IOW(KGSL_IOC_TYPE, 0x14, struct kgsl_drawctxt_destroy) 214 215 /* add a block of pmem or fb into the GPU address space */ 216 struct kgsl_sharedmem_from_pmem { 217 int pmem_fd; 218 unsigned int gpuaddr; /*output param */ 219 unsigned int len; 220 unsigned int offset; 221 }; 222 223 #define IOCTL_KGSL_SHAREDMEM_FROM_PMEM \ 224 _IOWR(KGSL_IOC_TYPE, 0x20, struct kgsl_sharedmem_from_pmem) 225 226 /* remove memory from the GPU's address space */ 227 struct kgsl_sharedmem_free { 228 unsigned int gpuaddr; 229 }; 230 231 #define IOCTL_KGSL_SHAREDMEM_FREE \ 232 _IOW(KGSL_IOC_TYPE, 0x21, struct kgsl_sharedmem_free) 233 234 struct kgsl_gmem_desc { 235 unsigned int x; 236 unsigned int y; 237 unsigned int width; 238 unsigned int height; 239 unsigned int pitch; 240 }; 241 242 struct kgsl_buffer_desc { 243 void *hostptr; 244 unsigned int gpuaddr; 245 int size; 246 unsigned int format; 247 unsigned int pitch; 248 unsigned int enabled; 249 }; 250 251 struct kgsl_bind_gmem_shadow { 252 unsigned int drawctxt_id; 253 struct kgsl_gmem_desc gmem_desc; 254 unsigned int shadow_x; 255 unsigned int shadow_y; 256 struct kgsl_buffer_desc shadow_buffer; 257 unsigned int buffer_id; 258 }; 259 260 #define IOCTL_KGSL_DRAWCTXT_BIND_GMEM_SHADOW \ 261 _IOW(KGSL_IOC_TYPE, 0x22, struct kgsl_bind_gmem_shadow) 262 263 /* add a block of memory into the GPU address space */ 264 struct kgsl_sharedmem_from_vmalloc { 265 unsigned int gpuaddr; /*output param */ 266 unsigned int hostptr; 267 /* If set from user space then will attempt to 268 * allocate even if low watermark is crossed */ 269 int force_no_low_watermark; 270 }; 271 272 #define IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC \ 273 _IOWR(KGSL_IOC_TYPE, 0x23, struct kgsl_sharedmem_from_vmalloc) 274 275 #define IOCTL_KGSL_SHAREDMEM_FLUSH_CACHE \ 276 _IOW(KGSL_IOC_TYPE, 0x24, struct kgsl_sharedmem_free) 277 278 struct kgsl_drawctxt_set_bin_base_offset { 279 unsigned int drawctxt_id; 280 unsigned int offset; 281 }; 282 283 #define IOCTL_KGSL_DRAWCTXT_SET_BIN_BASE_OFFSET \ 284 _IOW(KGSL_IOC_TYPE, 0x25, struct kgsl_drawctxt_set_bin_base_offset) 285 286 #endif /* _MSM_KGSL_H */ 287