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Searched refs:tcg_const_i32 (Results 1 – 5 of 5) sorted by relevance

/external/qemu/
Dgen-icount.h36 TCGv_i32 tmp = tcg_const_i32(1); in gen_io_start()
43 TCGv_i32 tmp = tcg_const_i32(0); in gen_io_end()
/external/qemu/tcg/
Dtcg-op.h433 TCGv_i32 t0 = tcg_const_i32(arg2); in tcg_gen_addi_i32()
446 TCGv_i32 t0 = tcg_const_i32(arg1); in tcg_gen_subfi_i32()
457 TCGv_i32 t0 = tcg_const_i32(arg2); in tcg_gen_subi_i32()
480 TCGv_i32 t0 = tcg_const_i32(arg2); in tcg_gen_andi_i32()
503 TCGv_i32 t0 = tcg_const_i32(arg2); in tcg_gen_ori_i32()
524 TCGv_i32 t0 = tcg_const_i32(arg2); in tcg_gen_xori_i32()
540 TCGv_i32 t0 = tcg_const_i32(arg2); in tcg_gen_shli_i32()
556 TCGv_i32 t0 = tcg_const_i32(arg2); in tcg_gen_shri_i32()
572 TCGv_i32 t0 = tcg_const_i32(arg2); in tcg_gen_sari_i32()
587 TCGv_i32 t0 = tcg_const_i32(arg2); in tcg_gen_brcondi_i32()
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Dtcg.h437 #define tcg_const_ptr tcg_const_i32
470 TCGv_i32 tcg_const_i32(int32_t val);
Dtcg.c505 TCGv_i32 tcg_const_i32(int32_t val) in tcg_const_i32() function
/external/qemu/target-arm/
Dtranslate.c264 #define gen_set_cpsr(var, mask) gen_helper_cpsr_write(var, tcg_const_i32(mask))
1142 gen_helper_vfp_##name##d(cpu_F0d, cpu_F0d, tcg_const_i32(shift), cpu_env);\
1144 gen_helper_vfp_##name##s(cpu_F0s, cpu_F0s, tcg_const_i32(shift), cpu_env);\
1416 TCGv tmp = tcg_const_i32(shift); in gen_op_iwmmxt_insr_M0_T0_T1()
2590 gen_helper_get_cp(tmp, cpu_env, tcg_const_i32(insn)); in disas_cp_insn()
2597 gen_helper_set_cp(cpu_env, tcg_const_i32(insn), tmp); in disas_cp_insn()
2659 gen_helper_get_cp15(tmp, cpu_env, tcg_const_i32(insn)); in disas_cp15_insn()
2667 gen_helper_set_cp15(cpu_env, tcg_const_i32(insn), tmp); in disas_cp15_insn()
4679 tmp2 = tcg_const_i32(imm); in disas_neon_data_insn()
4684 tmp2 = tcg_const_i32(imm); in disas_neon_data_insn()
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