58   TRI = mf.getTarget().getRegisterInfo();  in runOnMachineFunction()
82   for (TargetRegisterInfo::regclass_iterator I = TRI->regclass_begin(),  in runOnMachineFunction()
83          E = TRI->regclass_end(); I != E; ++I)  in runOnMachineFunction()
85                                             TRI->getAllocatableSet(mf, *I)));  in runOnMachineFunction()
125   return TRI->ResolveRegAllocHint(Hint.first, physReg, *MF);  in getRegAllocPref()
227   unsigned NumRegs = TRI->getNumRegs();  in FindUnusedRegisters()
238   BitVector Allocatable = TRI->getAllocatableSet(*MF);  in FindUnusedRegisters()
243       for (const unsigned *AS = TRI->getAliasSet(Reg); *AS; ++AS) {  in FindUnusedRegisters()
298           PhysReg = TRI->getSubReg(PhysReg, MO.getSubReg());  in rewrite()
310         MI->addRegisterKilled(SuperKills.pop_back_val(), TRI, true);  in rewrite()
313         MI->addRegisterDead(SuperDeads.pop_back_val(), TRI, true);  in rewrite()
316         MI->addRegisterDefined(SuperDefs.pop_back_val(), TRI);  in rewrite()
340   for (unsigned Reg = 1, RegE = TRI->getNumRegs(); Reg != RegE; ++Reg)  in rewrite()
346   const TargetRegisterInfo* TRI = MF->getTarget().getRegisterInfo();  in print()  local
353       OS << '[' << PrintReg(Reg, TRI) << " -> "  in print()
354          << PrintReg(Virt2PhysMap[Reg], TRI) << "] "  in print()
362       OS << '[' << PrintReg(Reg, TRI) << " -> fi#" << Virt2StackSlotMap[Reg]  in print()