113                                     unsigned Op0, bool Op0IsKill);
116                                      unsigned Op0, bool Op0IsKill,
120                                       unsigned Op0, bool Op0IsKill,
125                                      unsigned Op0, bool Op0IsKill,
129                                      unsigned Op0, bool Op0IsKill,
133                                       unsigned Op0, bool Op0IsKill,
144                                                 unsigned Op0, bool Op0IsKill,
289                                      unsigned Op0, bool Op0IsKill) {  in FastEmitInst_r()  argument
295                    .addReg(Op0, Op0IsKill * RegState::Kill));  in FastEmitInst_r()
298                    .addReg(Op0, Op0IsKill * RegState::Kill));  in FastEmitInst_r()
308                                       unsigned Op0, bool Op0IsKill,  in FastEmitInst_rr()  argument
315                    .addReg(Op0, Op0IsKill * RegState::Kill)  in FastEmitInst_rr()
319                    .addReg(Op0, Op0IsKill * RegState::Kill)  in FastEmitInst_rr()
330                                        unsigned Op0, bool Op0IsKill,  in FastEmitInst_rrr()  argument
338                    .addReg(Op0, Op0IsKill * RegState::Kill)  in FastEmitInst_rrr()
343                    .addReg(Op0, Op0IsKill * RegState::Kill)  in FastEmitInst_rrr()
355                                       unsigned Op0, bool Op0IsKill,  in FastEmitInst_ri()  argument
362                    .addReg(Op0, Op0IsKill * RegState::Kill)  in FastEmitInst_ri()
366                    .addReg(Op0, Op0IsKill * RegState::Kill)  in FastEmitInst_ri()
377                                       unsigned Op0, bool Op0IsKill,  in FastEmitInst_rf()  argument
384                    .addReg(Op0, Op0IsKill * RegState::Kill)  in FastEmitInst_rf()
388                    .addReg(Op0, Op0IsKill * RegState::Kill)  in FastEmitInst_rf()
399                                        unsigned Op0, bool Op0IsKill,  in FastEmitInst_rri()  argument
407                    .addReg(Op0, Op0IsKill * RegState::Kill)  in FastEmitInst_rri()
412                    .addReg(Op0, Op0IsKill * RegState::Kill)  in FastEmitInst_rri()
462                                                  unsigned Op0, bool Op0IsKill,  in FastEmitInst_extractsubreg()  argument
465   assert(TargetRegisterInfo::isVirtualRegister(Op0) &&  in FastEmitInst_extractsubreg()
469                  .addReg(Op0, getKillRegState(Op0IsKill), Idx));  in FastEmitInst_extractsubreg()
1008   Value *Op0 = I->getOperand(0);  in SelectStore()  local
1017   SrcReg = getRegForValue(Op0);  in SelectStore()