Lines Matching refs:getNode
1118 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
1121 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerCallResult()
1122 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
1133 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerCallResult()
1134 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, in LowerCallResult()
1148 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); in LowerCallResult()
1167 PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); in LowerMemOpCallTo()
1181 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in PassF64ArgInRegs()
1189 if (StackPtr.getNode() == 0) in PassF64ArgInRegs()
1269 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1272 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1275 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); in LowerCall()
1278 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerCall()
1285 SDValue Op0 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
1287 SDValue Op1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerCall()
1320 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const); in LowerCall()
1333 SDValue Dst = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, in LowerCall()
1336 SDValue Src = DAG.getNode(ISD::ADD, dl, getPointerTy(), Arg, SrcOffset); in LowerCall()
1355 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in LowerCall()
1412 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
1426 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
1448 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
1454 Callee = DAG.getNode(ARMISD::PIC_ADD, dl, in LowerCall()
1476 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerCall()
1482 Callee = DAG.getNode(ARMISD::PIC_ADD, dl, in LowerCall()
1517 if (InFlag.getNode()) in LowerCall()
1522 return DAG.getNode(ARMISD::TC_RETURN, dl, NodeTys, &Ops[0], Ops.size()); in LowerCall()
1525 Chain = DAG.getNode(CallOpc, dl, NodeTys, &Ops[0], Ops.size()); in LowerCall()
1788 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); in LowerReturn()
1795 SDValue Half = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
1797 SDValue HalfGPRs = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
1809 Arg = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, Arg, in LowerReturn()
1814 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, in LowerReturn()
1830 if (Flag.getNode()) in LowerReturn()
1831 result = DAG.getNode(ARMISD::RET_FLAG, dl, MVT::Other, Chain, Flag); in LowerReturn()
1833 result = DAG.getNode(ARMISD::RET_FLAG, dl, MVT::Other, Chain); in LowerReturn()
1921 return DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Res); in LowerConstantPool()
1948 CPAddr = DAG.getNode(ARMISD::Wrapper, DL, PtrVT, CPAddr); in LowerBlockAddress()
1955 return DAG.getNode(ARMISD::PIC_ADD, DL, PtrVT, Result, PICLabel); in LowerBlockAddress()
1972 Argument = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Argument); in LowerToTLSGeneralDynamicModel()
1979 Argument = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Argument, PICLabel); in LowerToTLSGeneralDynamicModel()
2007 SDValue ThreadPointer = DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerToTLSExecModels()
2019 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
2026 Offset = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Offset, PICLabel); in LowerToTLSExecModels()
2035 Offset = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, Offset); in LowerToTLSExecModels()
2043 return DAG.getNode(ISD::ADD, dl, PtrVT, ThreadPointer, Offset); in LowerToTLSExecModels()
2071 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
2078 Result = DAG.getNode(ISD::ADD, dl, PtrVT, Result, GOT); in LowerGlobalAddressELF()
2091 return DAG.getNode(ARMISD::Wrapper, dl, PtrVT, in LowerGlobalAddressELF()
2095 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressELF()
2117 return DAG.getNode(ARMISD::Wrapper, dl, PtrVT, in LowerGlobalAddressDarwin()
2122 SDValue Result = DAG.getNode(Wrapper, dl, PtrVT, in LowerGlobalAddressDarwin()
2141 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGlobalAddressDarwin()
2150 Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerGlobalAddressDarwin()
2174 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerGLOBAL_OFFSET_TABLE()
2179 return DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerGLOBAL_OFFSET_TABLE()
2186 return DAG.getNode(ARMISD::EH_SJLJ_DISPATCHSETUP, dl, MVT::Other, in LowerEH_SJLJ_DISPATCHSETUP()
2194 return DAG.getNode(ARMISD::EH_SJLJ_SETJMP, dl, MVT::i32, Op.getOperand(0), in LowerEH_SJLJ_SETJMP()
2201 return DAG.getNode(ARMISD::EH_SJLJ_LONGJMP, dl, MVT::Other, Op.getOperand(0), in LowerEH_SJLJ_LONGJMP()
2214 return DAG.getNode(ARMISD::THREAD_POINTER, dl, PtrVT); in LowerINTRINSIC_WO_CHAIN()
2230 CPAddr = DAG.getNode(ARMISD::Wrapper, dl, MVT::i32, CPAddr); in LowerINTRINSIC_WO_CHAIN()
2238 Result = DAG.getNode(ARMISD::PIC_ADD, dl, PtrVT, Result, PICLabel); in LowerINTRINSIC_WO_CHAIN()
2246 return DAG.getNode(NewOpc, Op.getDebugLoc(), Op.getValueType(), in LowerINTRINSIC_WO_CHAIN()
2261 return DAG.getNode(ARMISD::MEMBARRIER_MCR, dl, MVT::Other, Op.getOperand(0), in LowerMEMBARRIER()
2276 return DAG.getNode(ARMISD::MEMBARRIER, dl, MVT::Other, Op.getOperand(0), in LowerMEMBARRIER()
2302 return DAG.getNode(ARMISD::PRELOAD, dl, MVT::Other, Op.getOperand(0), in LowerPREFETCH()
2353 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, ArgValue, ArgValue2); in GetF64FormalArgument()
2427 FIN = DAG.getNode(ISD::ADD, dl, getPointerTy(), FIN, in VarArgStyleRegisters()
2431 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, in VarArgStyleRegisters()
2488 ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); in LowerFormalArguments()
2489 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, in LowerFormalArguments()
2491 ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, in LowerFormalArguments()
2523 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
2526 ArgValue = DAG.getNode(ISD::AssertSext, dl, RegVT, ArgValue, in LowerFormalArguments()
2528 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
2531 ArgValue = DAG.getNode(ISD::AssertZext, dl, RegVT, ArgValue, in LowerFormalArguments()
2533 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue); in LowerFormalArguments()
2592 else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) { in isFloatingPointZero()
2610 if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.getNode())) { in getARMCmp()
2661 return DAG.getNode(CompareType, dl, MVT::Glue, LHS, RHS); in getARMCmp()
2670 Cmp = DAG.getNode(ARMISD::CMPFP, dl, MVT::Glue, LHS, RHS); in getVFPCmp()
2672 Cmp = DAG.getNode(ARMISD::CMPFPw0, dl, MVT::Glue, LHS); in getVFPCmp()
2673 return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Glue, Cmp); in getVFPCmp()
2683 return DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1)); in duplicateCmp()
2689 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0),Cmp.getOperand(1)); in duplicateCmp()
2692 Cmp = DAG.getNode(Opc, DL, MVT::Glue, Cmp.getOperand(0)); in duplicateCmp()
2694 return DAG.getNode(ARMISD::FMSTAT, DL, MVT::Glue, Cmp); in duplicateCmp()
2728 if (True.getNode() && False.getNode()) { in LowerSELECT()
2734 return DAG.getNode(ARMISD::CMOV, dl, VT, True, False, ARMcc, CCR, Cmp); in LowerSELECT()
2757 return DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, CCR, Cmp); in LowerSELECT_CC()
2766 SDValue Result = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, in LowerSELECT_CC()
2772 Result = DAG.getNode(ARMISD::CMOV, dl, VT, in LowerSELECT_CC()
2782 SDNode *N = Op.getNode(); in canChangeToInt()
2832 SDValue NewPtr = DAG.getNode(ISD::ADD, Op.getDebugLoc(), in expandf64Toi32()
2876 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in OptimizeVFPBrcond()
2888 return DAG.getNode(ARMISD::BCC_i64, dl, VTList, Ops, 7); in OptimizeVFPBrcond()
2906 return DAG.getNode(ARMISD::BRCOND, dl, MVT::Other, in LowerBR_CC()
2916 if (Result.getNode()) in LowerBR_CC()
2928 SDValue Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops, 5); in LowerBR_CC()
2932 Res = DAG.getNode(ARMISD::BRCOND, dl, VTList, Ops, 5); in LowerBR_CC()
2948 Table = DAG.getNode(ARMISD::WrapperJT, dl, MVT::i32, JTI, UId); in LowerBR_JT()
2949 Index = DAG.getNode(ISD::MUL, dl, PTy, Index, DAG.getConstant(4, PTy)); in LowerBR_JT()
2950 SDValue Addr = DAG.getNode(ISD::ADD, dl, PTy, Index, Table); in LowerBR_JT()
2956 return DAG.getNode(ARMISD::BR2_JT, dl, MVT::Other, Chain, in LowerBR_JT()
2964 Addr = DAG.getNode(ISD::ADD, dl, PTy, Addr, Table); in LowerBR_JT()
2965 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI, UId); in LowerBR_JT()
2970 return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI, UId); in LowerBR_JT()
2988 Op = DAG.getNode(Opc, dl, MVT::f32, Op.getOperand(0)); in LowerFP_TO_INT()
2989 return DAG.getNode(ISD::BITCAST, dl, MVT::i32, Op); in LowerFP_TO_INT()
2999 return DAG.UnrollVectorOp(Op.getNode()); in LowerVectorINT_TO_FP()
3016 Op = DAG.getNode(CastOpc, dl, MVT::v4i32, Op.getOperand(0)); in LowerVectorINT_TO_FP()
3017 return DAG.getNode(Opc, dl, VT, Op); in LowerVectorINT_TO_FP()
3039 Op = DAG.getNode(ISD::BITCAST, dl, MVT::f32, Op.getOperand(0)); in LowerINT_TO_FP()
3040 return DAG.getNode(Opc, dl, VT, Op); in LowerINT_TO_FP()
3057 SDValue Mask = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v2i32, in LowerFCOPYSIGN()
3061 Mask = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN()
3062 DAG.getNode(ISD::BITCAST, dl, OpVT, Mask), in LowerFCOPYSIGN()
3065 Tmp0 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp0); in LowerFCOPYSIGN()
3067 Tmp1 = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, MVT::v2f32, Tmp1); in LowerFCOPYSIGN()
3069 Tmp1 = DAG.getNode(ARMISD::VSHL, dl, OpVT, in LowerFCOPYSIGN()
3070 DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1), in LowerFCOPYSIGN()
3073 Tmp1 = DAG.getNode(ARMISD::VSHRu, dl, MVT::v1i64, in LowerFCOPYSIGN()
3074 DAG.getNode(ISD::BITCAST, dl, MVT::v1i64, Tmp1), in LowerFCOPYSIGN()
3076 Tmp0 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp0); in LowerFCOPYSIGN()
3077 Tmp1 = DAG.getNode(ISD::BITCAST, dl, OpVT, Tmp1); in LowerFCOPYSIGN()
3081 AllOnes = DAG.getNode(ARMISD::VMOVIMM, dl, MVT::v8i8, AllOnes); in LowerFCOPYSIGN()
3082 SDValue MaskNot = DAG.getNode(ISD::XOR, dl, OpVT, Mask, in LowerFCOPYSIGN()
3083 DAG.getNode(ISD::BITCAST, dl, OpVT, AllOnes)); in LowerFCOPYSIGN()
3085 SDValue Res = DAG.getNode(ISD::OR, dl, OpVT, in LowerFCOPYSIGN()
3086 DAG.getNode(ISD::AND, dl, OpVT, Tmp1, Mask), in LowerFCOPYSIGN()
3087 DAG.getNode(ISD::AND, dl, OpVT, Tmp0, MaskNot)); in LowerFCOPYSIGN()
3089 Res = DAG.getNode(ISD::BITCAST, dl, MVT::v2f32, Res); in LowerFCOPYSIGN()
3090 Res = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f32, Res, in LowerFCOPYSIGN()
3093 Res = DAG.getNode(ISD::BITCAST, dl, MVT::f64, Res); in LowerFCOPYSIGN()
3101 Tmp1 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
3103 Tmp1 = DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp1); in LowerFCOPYSIGN()
3108 Tmp1 = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp1, Mask1); in LowerFCOPYSIGN()
3110 Tmp0 = DAG.getNode(ISD::AND, dl, MVT::i32, in LowerFCOPYSIGN()
3111 DAG.getNode(ISD::BITCAST, dl, MVT::i32, Tmp0), Mask2); in LowerFCOPYSIGN()
3112 return DAG.getNode(ISD::BITCAST, dl, MVT::f32, in LowerFCOPYSIGN()
3113 DAG.getNode(ISD::OR, dl, MVT::i32, Tmp0, Tmp1)); in LowerFCOPYSIGN()
3117 Tmp0 = DAG.getNode(ARMISD::VMOVRRD, dl, DAG.getVTList(MVT::i32, MVT::i32), in LowerFCOPYSIGN()
3120 SDValue Hi = DAG.getNode(ISD::AND, dl, MVT::i32, Tmp0.getValue(1), Mask2); in LowerFCOPYSIGN()
3121 Hi = DAG.getNode(ISD::OR, dl, MVT::i32, Hi, Tmp1); in LowerFCOPYSIGN()
3122 return DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); in LowerFCOPYSIGN()
3137 DAG.getNode(ISD::ADD, dl, VT, FrameAddr, Offset), in LowerRETURNADDR()
3182 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
3184 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op, in ExpandBITCAST()
3186 return DAG.getNode(ISD::BITCAST, dl, DstVT, in ExpandBITCAST()
3187 DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi)); in ExpandBITCAST()
3192 SDValue Cvt = DAG.getNode(ARMISD::VMOVRRD, dl, in ExpandBITCAST()
3195 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Cvt, Cvt.getValue(1)); in ExpandBITCAST()
3212 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, EncodedVal); in getZeroVector()
3213 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in getZeroVector()
3232 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftRightParts()
3234 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, ShAmt); in LowerShiftRightParts()
3235 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftRightParts()
3237 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, RevShAmt); in LowerShiftRightParts()
3238 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftRightParts()
3239 SDValue TrueVal = DAG.getNode(Opc, dl, VT, ShOpHi, ExtraShAmt); in LowerShiftRightParts()
3244 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts()
3245 SDValue Lo = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, TrueVal, ARMcc, in LowerShiftRightParts()
3266 SDValue RevShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, in LowerShiftLeftParts()
3268 SDValue Tmp1 = DAG.getNode(ISD::SRL, dl, VT, ShOpLo, RevShAmt); in LowerShiftLeftParts()
3269 SDValue ExtraShAmt = DAG.getNode(ISD::SUB, dl, MVT::i32, ShAmt, in LowerShiftLeftParts()
3271 SDValue Tmp2 = DAG.getNode(ISD::SHL, dl, VT, ShOpHi, ShAmt); in LowerShiftLeftParts()
3272 SDValue Tmp3 = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ExtraShAmt); in LowerShiftLeftParts()
3274 SDValue FalseVal = DAG.getNode(ISD::OR, dl, VT, Tmp1, Tmp2); in LowerShiftLeftParts()
3278 SDValue Lo = DAG.getNode(ISD::SHL, dl, VT, ShOpLo, ShAmt); in LowerShiftLeftParts()
3279 SDValue Hi = DAG.getNode(ARMISD::CMOV, dl, VT, FalseVal, Tmp3, ARMcc, in LowerShiftLeftParts()
3293 SDValue FPSCR = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::i32, in LowerFLT_ROUNDS_()
3296 SDValue FltRounds = DAG.getNode(ISD::ADD, dl, MVT::i32, FPSCR, in LowerFLT_ROUNDS_()
3298 SDValue RMODE = DAG.getNode(ISD::SRL, dl, MVT::i32, FltRounds, in LowerFLT_ROUNDS_()
3300 return DAG.getNode(ISD::AND, dl, MVT::i32, RMODE, in LowerFLT_ROUNDS_()
3312 SDValue rbit = DAG.getNode(ARMISD::RBIT, dl, VT, N->getOperand(0)); in LowerCTTZ()
3313 return DAG.getNode(ISD::CTLZ, dl, VT, rbit); in LowerCTTZ()
3329 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, in LowerShift()
3340 SDValue NegatedCount = DAG.getNode(ISD::SUB, dl, ShiftVT, in LowerShift()
3346 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, VT, in LowerShift()
3372 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
3374 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, N->getOperand(0), in Expand64BitShift()
3380 Hi = DAG.getNode(Opc, dl, DAG.getVTList(MVT::i32, MVT::Glue), &Hi, 1); in Expand64BitShift()
3383 Lo = DAG.getNode(ARMISD::RRX, dl, MVT::i32, Lo, Hi.getValue(1)); in Expand64BitShift()
3386 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in Expand64BitShift()
3427 Op0 = DAG.getNode(ARMISD::VCGT, dl, VT, TmpOp1, TmpOp0); in LowerVSETCC()
3428 Op1 = DAG.getNode(ARMISD::VCGT, dl, VT, TmpOp0, TmpOp1); in LowerVSETCC()
3436 Op0 = DAG.getNode(ARMISD::VCGT, dl, VT, TmpOp1, TmpOp0); in LowerVSETCC()
3437 Op1 = DAG.getNode(ARMISD::VCGE, dl, VT, TmpOp0, TmpOp1); in LowerVSETCC()
3460 if (ISD::isBuildVectorAllZeros(Op1.getNode())) in LowerVSETCC()
3462 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) in LowerVSETCC()
3466 if (AndOp.getNode() && AndOp.getOpcode() == ISD::BITCAST) in LowerVSETCC()
3469 if (AndOp.getNode() && AndOp.getOpcode() == ISD::AND) { in LowerVSETCC()
3471 Op0 = DAG.getNode(ISD::BITCAST, dl, VT, AndOp.getOperand(0)); in LowerVSETCC()
3472 Op1 = DAG.getNode(ISD::BITCAST, dl, VT, AndOp.getOperand(1)); in LowerVSETCC()
3484 if (ISD::isBuildVectorAllZeros(Op1.getNode())) in LowerVSETCC()
3486 else if (ISD::isBuildVectorAllZeros(Op0.getNode())) { in LowerVSETCC()
3495 if (SingleOp.getNode()) { in LowerVSETCC()
3498 Result = DAG.getNode(ARMISD::VCEQZ, dl, VT, SingleOp); break; in LowerVSETCC()
3500 Result = DAG.getNode(ARMISD::VCGEZ, dl, VT, SingleOp); break; in LowerVSETCC()
3502 Result = DAG.getNode(ARMISD::VCLEZ, dl, VT, SingleOp); break; in LowerVSETCC()
3504 Result = DAG.getNode(ARMISD::VCGTZ, dl, VT, SingleOp); break; in LowerVSETCC()
3506 Result = DAG.getNode(ARMISD::VCLTZ, dl, VT, SingleOp); break; in LowerVSETCC()
3508 Result = DAG.getNode(Opc, dl, VT, Op0, Op1); in LowerVSETCC()
3511 Result = DAG.getNode(Opc, dl, VT, Op0, Op1); in LowerVSETCC()
3887 BuildVectorSDNode *BVN = cast<BuildVectorSDNode>(Op.getNode()); in LowerBUILD_VECTOR()
3902 if (Val.getNode()) { in LowerBUILD_VECTOR()
3903 SDValue Vmov = DAG.getNode(ARMISD::VMOVIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
3904 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
3914 if (Val.getNode()) { in LowerBUILD_VECTOR()
3915 SDValue Vmov = DAG.getNode(ARMISD::VMVNIMM, dl, VmovVT, Val); in LowerBUILD_VECTOR()
3916 return DAG.getNode(ISD::BITCAST, dl, VT, Vmov); in LowerBUILD_VECTOR()
3936 if (!Value.getNode()) in LowerBUILD_VECTOR()
3942 if (!Value.getNode()) in LowerBUILD_VECTOR()
3946 return DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, VT, Value); in LowerBUILD_VECTOR()
3954 return DAG.getNode(ARMISD::VDUP, dl, VT, Value); in LowerBUILD_VECTOR()
3958 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, MVT::i32, in LowerBUILD_VECTOR()
3961 SDValue Val = DAG.getNode(ISD::BUILD_VECTOR, dl, VecVT, &Ops[0], NumElts); in LowerBUILD_VECTOR()
3963 if (Val.getNode()) in LowerBUILD_VECTOR()
3964 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
3967 if (Val.getNode()) in LowerBUILD_VECTOR()
3968 return DAG.getNode(ARMISD::VDUP, dl, VT, Val); in LowerBUILD_VECTOR()
3994 Ops.push_back(DAG.getNode(ISD::BITCAST, dl, EltVT, Op.getOperand(i))); in LowerBUILD_VECTOR()
3995 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, &Ops[0],NumElts); in LowerBUILD_VECTOR()
3996 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerBUILD_VECTOR()
4082 ShuffleSrcs[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, in ReconstructShuffle()
4088 ShuffleSrcs[i] = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, in ReconstructShuffle()
4094 SDValue VEXTSrc1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, in ReconstructShuffle()
4097 SDValue VEXTSrc2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, in ReconstructShuffle()
4100 ShuffleSrcs[i] = DAG.getNode(ARMISD::VEXT, dl, VT, VEXTSrc1, VEXTSrc2, in ReconstructShuffle()
4222 return DAG.getNode(ARMISD::VREV64, dl, VT, OpLHS); in GeneratePerfectShuffle()
4225 return DAG.getNode(ARMISD::VREV32, dl, VT, OpLHS); in GeneratePerfectShuffle()
4228 return DAG.getNode(ARMISD::VREV16, dl, VT, OpLHS); in GeneratePerfectShuffle()
4233 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, in GeneratePerfectShuffle()
4238 return DAG.getNode(ARMISD::VEXT, dl, VT, in GeneratePerfectShuffle()
4243 return DAG.getNode(ARMISD::VUZP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
4247 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
4251 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in GeneratePerfectShuffle()
4269 if (V2.getNode()->getOpcode() == ISD::UNDEF) in LowerVECTOR_SHUFFLEv8i8()
4270 return DAG.getNode(ARMISD::VTBL1, DL, MVT::v8i8, V1, in LowerVECTOR_SHUFFLEv8i8()
4271 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8, in LowerVECTOR_SHUFFLEv8i8()
4274 return DAG.getNode(ARMISD::VTBL2, DL, MVT::v8i8, V1, V2, in LowerVECTOR_SHUFFLEv8i8()
4275 DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v8i8, in LowerVECTOR_SHUFFLEv8i8()
4284 ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op.getNode()); in LowerVECTOR_SHUFFLE()
4303 return DAG.getNode(ARMISD::VDUP, dl, VT, V1.getOperand(0)); in LowerVECTOR_SHUFFLE()
4305 return DAG.getNode(ARMISD::VDUPLANE, dl, VT, V1, in LowerVECTOR_SHUFFLE()
4314 return DAG.getNode(ARMISD::VEXT, dl, VT, V1, V2, in LowerVECTOR_SHUFFLE()
4319 return DAG.getNode(ARMISD::VREV64, dl, VT, V1); in LowerVECTOR_SHUFFLE()
4321 return DAG.getNode(ARMISD::VREV32, dl, VT, V1); in LowerVECTOR_SHUFFLE()
4323 return DAG.getNode(ARMISD::VREV16, dl, VT, V1); in LowerVECTOR_SHUFFLE()
4332 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4335 return DAG.getNode(ARMISD::VUZP, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4338 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4342 return DAG.getNode(ARMISD::VTRN, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4345 return DAG.getNode(ARMISD::VUZP, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4348 return DAG.getNode(ARMISD::VZIP, dl, DAG.getVTList(VT, VT), in LowerVECTOR_SHUFFLE()
4380 V1 = DAG.getNode(ISD::BITCAST, dl, VecVT, V1); in LowerVECTOR_SHUFFLE()
4381 V2 = DAG.getNode(ISD::BITCAST, dl, VecVT, V2); in LowerVECTOR_SHUFFLE()
4387 Ops.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, in LowerVECTOR_SHUFFLE()
4392 SDValue Val = DAG.getNode(ARMISD::BUILD_VECTOR, dl, VecVT, &Ops[0],NumElts); in LowerVECTOR_SHUFFLE()
4393 return DAG.getNode(ISD::BITCAST, dl, VT, Val); in LowerVECTOR_SHUFFLE()
4398 if (NewOp.getNode()) in LowerVECTOR_SHUFFLE()
4415 return DAG.getNode(ARMISD::VGETLANEu, dl, MVT::i32, Vec, Lane); in LowerEXTRACT_VECTOR_ELT()
4431 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
4432 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op0), in LowerCONCAT_VECTORS()
4435 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Val, in LowerCONCAT_VECTORS()
4436 DAG.getNode(ISD::BITCAST, dl, MVT::f64, Op1), in LowerCONCAT_VECTORS()
4438 return DAG.getNode(ISD::BITCAST, dl, Op.getValueType(), Val); in LowerCONCAT_VECTORS()
4449 SDNode *BVN = N->getOperand(0).getNode(); in isExtendedBUILD_VECTOR()
4476 SDNode *Elt = N->getOperand(i).getNode(); in isExtendedBUILD_VECTOR()
4528 SDNode *BVN = N->getOperand(0).getNode(); in SkipExtension()
4532 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), MVT::v2i32, in SkipExtension()
4547 return DAG.getNode(ISD::BUILD_VECTOR, N->getDebugLoc(), in SkipExtension()
4554 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubSExt()
4555 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubSExt()
4565 SDNode *N0 = N->getOperand(0).getNode(); in isAddSubZExt()
4566 SDNode *N1 = N->getOperand(1).getNode(); in isAddSubZExt()
4578 SDNode *N0 = Op.getOperand(0).getNode(); in LowerMUL()
4579 SDNode *N1 = Op.getOperand(1).getNode(); in LowerMUL()
4626 return DAG.getNode(NewOpc, DL, VT, Op0, Op1); in LowerMUL()
4637 SDValue N00 = SkipExtension(N0->getOperand(0).getNode(), DAG); in LowerMUL()
4638 SDValue N01 = SkipExtension(N0->getOperand(1).getNode(), DAG); in LowerMUL()
4640 return DAG.getNode(N0->getOpcode(), DL, VT, in LowerMUL()
4641 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
4642 DAG.getNode(ISD::BITCAST, DL, Op1VT, N00), Op1), in LowerMUL()
4643 DAG.getNode(NewOpc, DL, VT, in LowerMUL()
4644 DAG.getNode(ISD::BITCAST, DL, Op1VT, N01), Op1)); in LowerMUL()
4652 X = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
4653 Y = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, Y); in LowerSDIV_v4i8()
4654 X = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
4655 Y = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, Y); in LowerSDIV_v4i8()
4658 Y = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i8()
4664 X = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, X, Y); in LowerSDIV_v4i8()
4665 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
4667 Y = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, Y, Y, Y, Y); in LowerSDIV_v4i8()
4668 X = DAG.getNode(ISD::ADD, dl, MVT::v4i32, X, Y); in LowerSDIV_v4i8()
4669 X = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, X); in LowerSDIV_v4i8()
4671 X = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, X); in LowerSDIV_v4i8()
4672 X = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, X); in LowerSDIV_v4i8()
4682 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
4683 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v4i32, N1); in LowerSDIV_v4i16()
4684 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
4685 N1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerSDIV_v4i16()
4690 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
4692 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerSDIV_v4i16()
4695 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerSDIV_v4i16()
4700 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerSDIV_v4i16()
4701 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
4703 N1 = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, N1, N1, N1, N1); in LowerSDIV_v4i16()
4704 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerSDIV_v4i16()
4705 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerSDIV_v4i16()
4708 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerSDIV_v4i16()
4709 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerSDIV_v4i16()
4724 N0 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N0); in LowerSDIV()
4725 N1 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::v8i16, N1); in LowerSDIV()
4727 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
4729 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
4731 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerSDIV()
4733 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerSDIV()
4739 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerSDIV()
4742 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v8i8, N0); in LowerSDIV()
4759 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N0); in LowerUDIV()
4760 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v8i16, N1); in LowerUDIV()
4762 N2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
4764 N3 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
4766 N0 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N0, in LowerUDIV()
4768 N1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v4i16, N1, in LowerUDIV()
4774 N0 = DAG.getNode(ISD::CONCAT_VECTORS, dl, MVT::v8i16, N0, N2); in LowerUDIV()
4777 N0 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v8i8, in LowerUDIV()
4786 N0 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N0); in LowerUDIV()
4787 N1 = DAG.getNode(ISD::ZERO_EXTEND, dl, MVT::v4i32, N1); in LowerUDIV()
4788 N0 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N0); in LowerUDIV()
4789 SDValue BN1 = DAG.getNode(ISD::SINT_TO_FP, dl, MVT::v4f32, N1); in LowerUDIV()
4795 N2 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
4797 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
4800 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
4801 N1 = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, dl, MVT::v4f32, in LowerUDIV()
4804 N2 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N1, N2); in LowerUDIV()
4809 N0 = DAG.getNode(ISD::FMUL, dl, MVT::v4f32, N0, N2); in LowerUDIV()
4810 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, N0); in LowerUDIV()
4812 N1 = DAG.getNode(ISD::BUILD_VECTOR, dl, MVT::v4i32, N1, N1, N1, N1); in LowerUDIV()
4813 N0 = DAG.getNode(ISD::ADD, dl, MVT::v4i32, N0, N1); in LowerUDIV()
4814 N0 = DAG.getNode(ISD::BITCAST, dl, MVT::v4f32, N0); in LowerUDIV()
4817 N0 = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::v4i32, N0); in LowerUDIV()
4818 N0 = DAG.getNode(ISD::TRUNCATE, dl, MVT::v4i16, N0); in LowerUDIV()
4851 case ISD::BITCAST: return ExpandBITCAST(Op.getNode(), DAG); in LowerOperation()
4854 case ISD::SRA: return LowerShift(Op.getNode(), DAG, Subtarget); in LowerOperation()
4858 case ISD::CTTZ: return LowerCTTZ(Op.getNode(), DAG, Subtarget); in LowerOperation()
4890 if (Res.getNode()) in ReplaceNodeResults()
5523 SDValue Result = DAG.getNode(Opc, RHS.getDebugLoc(), VT, OtherOp, RHS); in combineSelectAndUse()
5531 return DAG.getNode(ISD::SELECT, N->getDebugLoc(), VT, in combineSelectAndUse()
5565 SDNode *V = Vec.getNode(); in AddCombineToVPADDL()
5579 if (V != ExtVec0->getOperand(0).getNode() || in AddCombineToVPADDL()
5580 V != ExtVec1->getOperand(0).getNode()) in AddCombineToVPADDL()
5621 SDValue tmp = DAG.getNode(ISD::INTRINSIC_WO_CHAIN, N->getDebugLoc(), in AddCombineToVPADDL()
5623 return DAG.getNode(ISD::TRUNCATE, N->getDebugLoc(), VT, tmp); in AddCombineToVPADDL()
5636 if (Result.getNode()) in PerformADDCombineWithOperands()
5640 if (N0.getOpcode() == ISD::SELECT && N0.getNode()->hasOneUse()) { in PerformADDCombineWithOperands()
5642 if (Result.getNode()) return Result; in PerformADDCombineWithOperands()
5657 if (Result.getNode()) in PerformADDCombine()
5672 if (N1.getOpcode() == ISD::SELECT && N1.getNode()->hasOneUse()) { in PerformSUBCombine()
5674 if (Result.getNode()) return Result; in PerformSUBCombine()
5711 return DAG.getNode(Opcode, DL, VT, in PerformVMULCombine()
5712 DAG.getNode(ISD::MUL, DL, VT, N00, N1), in PerformVMULCombine()
5713 DAG.getNode(ISD::MUL, DL, VT, N01, N1)); in PerformVMULCombine()
5747 Res = DAG.getNode(ISD::ADD, DL, VT, in PerformMULCombine()
5748 V, DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
5753 Res = DAG.getNode(ISD::SUB, DL, VT, in PerformMULCombine()
5754 DAG.getNode(ISD::SHL, DL, VT, in PerformMULCombine()
5762 Res = DAG.getNode(ISD::SHL, DL, VT, Res, in PerformMULCombine()
5793 if (Val.getNode()) { in PerformANDCombine()
5795 DAG.getNode(ISD::BITCAST, dl, VbicVT, N->getOperand(0)); in PerformANDCombine()
5796 SDValue Vbic = DAG.getNode(ARMISD::VBICIMM, dl, VbicVT, Input, Val); in PerformANDCombine()
5797 return DAG.getNode(ISD::BITCAST, dl, VT, Vbic); in PerformANDCombine()
5829 if (Val.getNode()) { in PerformORCombine()
5831 DAG.getNode(ISD::BITCAST, dl, VorrVT, N->getOperand(0)); in PerformORCombine()
5832 SDValue Vorr = DAG.getNode(ARMISD::VORRIMM, dl, VorrVT, Input, Val); in PerformORCombine()
5833 return DAG.getNode(ISD::BITCAST, dl, VT, Vorr); in PerformORCombine()
5861 SDValue Result = DAG.getNode(ARMISD::VBSL, dl, CanonicalVT, in PerformORCombine()
5864 return DAG.getNode(ISD::BITCAST, dl, VT, Result); in PerformORCombine()
5913 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, in PerformORCombine()
5939 Res = DAG.getNode(ISD::SRL, DL, VT, N1.getOperand(0), in PerformORCombine()
5941 Res = DAG.getNode(ARMISD::BFI, DL, VT, N00, Res, in PerformORCombine()
5955 Res = DAG.getNode(ISD::SRL, DL, VT, N00, in PerformORCombine()
5957 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1.getOperand(0), Res, in PerformORCombine()
5976 Res = DAG.getNode(ARMISD::BFI, DL, VT, N1, N00.getOperand(0), in PerformORCombine()
6001 return DCI.DAG.getNode(ARMISD::BFI, N->getDebugLoc(), N->getValueType(0), in PerformBFICombine()
6018 SDNode *InNode = InDouble.getNode(); in PerformVMOVRRDCombine()
6033 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in PerformVMOVRRDCombine()
6061 Op0.getNode() == Op1.getNode() && in PerformVMOVDRRCombine()
6063 return DAG.getNode(ISD::BITCAST, N->getDebugLoc(), in PerformVMOVDRRCombine()
6079 if (StVal.getNode()->getOpcode() == ARMISD::VMOVDRR && in PerformSTORECombine()
6080 StVal.getNode()->hasOneUse() && !St->isVolatile()) { in PerformSTORECombine()
6085 StVal.getNode()->getOperand(0), BasePtr, in PerformSTORECombine()
6089 SDValue OffsetPtr = DAG.getNode(ISD::ADD, DL, MVT::i32, BasePtr, in PerformSTORECombine()
6091 return DAG.getStore(NewST1.getValue(0), DL, StVal.getNode()->getOperand(1), in PerformSTORECombine()
6098 StVal.getNode()->getOpcode() != ISD::EXTRACT_VECTOR_ELT) in PerformSTORECombine()
6106 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, IntVec); in PerformSTORECombine()
6107 SDValue ExtElt = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::f64, in PerformSTORECombine()
6110 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::i64, ExtElt); in PerformSTORECombine()
6112 DCI.AddToWorklist(Vec.getNode()); in PerformSTORECombine()
6113 DCI.AddToWorklist(ExtElt.getNode()); in PerformSTORECombine()
6114 DCI.AddToWorklist(V.getNode()); in PerformSTORECombine()
6128 SDNode *Elt = N->getOperand(i).getNode(); in hasNormalLoadOperand()
6146 if (RV.getNode()) in PerformBUILD_VECTORCombine()
6159 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(i)); in PerformBUILD_VECTORCombine()
6162 DCI.AddToWorklist(V.getNode()); in PerformBUILD_VECTORCombine()
6165 SDValue BV = DAG.getNode(ISD::BUILD_VECTOR, dl, FloatVT, Ops.data(), NumElts); in PerformBUILD_VECTORCombine()
6166 return DAG.getNode(ISD::BITCAST, dl, VT, BV); in PerformBUILD_VECTORCombine()
6176 SDNode *Elt = N->getOperand(1).getNode(); in PerformInsertEltCombine()
6185 SDValue Vec = DAG.getNode(ISD::BITCAST, dl, FloatVT, N->getOperand(0)); in PerformInsertEltCombine()
6186 SDValue V = DAG.getNode(ISD::BITCAST, dl, MVT::f64, N->getOperand(1)); in PerformInsertEltCombine()
6188 DCI.AddToWorklist(Vec.getNode()); in PerformInsertEltCombine()
6189 DCI.AddToWorklist(V.getNode()); in PerformInsertEltCombine()
6190 SDValue InsElt = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, FloatVT, in PerformInsertEltCombine()
6192 return DAG.getNode(ISD::BITCAST, dl, VT, InsElt); in PerformInsertEltCombine()
6228 SDValue NewConcat = DAG.getNode(ISD::CONCAT_VECTORS, N->getDebugLoc(), VT, in PerformVECTOR_SHUFFLECombine()
6262 for (SDNode::use_iterator UI = Addr.getNode()->use_begin(), in CombineBaseUpdate()
6263 UE = Addr.getNode()->use_end(); UI != UE; ++UI) { in CombineBaseUpdate()
6334 if (ConstantSDNode *CInc = dyn_cast<ConstantSDNode>(Inc.getNode())) { in CombineBaseUpdate()
6369 NewResults.push_back(SDValue(UpdN.getNode(), i)); in CombineBaseUpdate()
6371 NewResults.push_back(SDValue(UpdN.getNode(), NumResultVecs+1)); // chain in CombineBaseUpdate()
6373 DCI.CombineTo(User, SDValue(UpdN.getNode(), NumResultVecs)); in CombineBaseUpdate()
6392 SDNode *VLD = N->getOperand(0).getNode(); in CombineVLDDUP()
6447 DCI.CombineTo(User, SDValue(VLDDup.getNode(), ResNo)); in CombineVLDDUP()
6454 VLDDupResults.push_back(SDValue(VLDDup.getNode(), n)); in CombineVLDDUP()
6455 VLDDupResults.push_back(SDValue(VLDDup.getNode(), NumVecs)); in CombineVLDDUP()
6490 return DCI.DAG.getNode(ISD::BITCAST, N->getDebugLoc(), VT, Op); in PerformVDUPLANECombine()
6549 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, N->getDebugLoc(), in PerformVCVTCombine()
6569 unsigned OpOpcode = Op.getNode()->getOpcode(); in PerformVDIVCombine()
6585 return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, N->getDebugLoc(), in PerformVDIVCombine()
6598 BuildVectorSDNode *BVN = dyn_cast<BuildVectorSDNode>(Op.getNode()); in getVShiftImm()
6769 return DAG.getNode(VShiftOpc, N->getDebugLoc(), N->getValueType(0), in PerformIntrinsicCombine()
6786 return DAG.getNode(VShiftOpc, N->getDebugLoc(), N->getValueType(0), in PerformIntrinsicCombine()
6822 return DAG.getNode(ARMISD::VSHL, N->getDebugLoc(), VT, N->getOperand(0), in PerformShiftCombine()
6831 return DAG.getNode(VShiftOpc, N->getDebugLoc(), VT, N->getOperand(0), in PerformShiftCombine()
6871 return DAG.getNode(Opc, N->getDebugLoc(), VT, Vec, Lane); in PerformExtendCombine()
6960 return DAG.getNode(Opcode, N->getDebugLoc(), N->getValueType(0), LHS, RHS); in PerformSELECT_CCCombine()
6999 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, TrueVal, ARMcc, in PerformCMOVCombine()
7004 Res = DAG.getNode(ARMISD::CMOV, dl, VT, LHS, FalseVal, ARMcc, in PerformCMOVCombine()
7008 if (Res.getNode()) { in PerformCMOVCombine()
7014 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
7017 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
7020 Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, in PerformCMOVCombine()
7427 isLegal = getT2IndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
7430 isLegal = getARMIndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base, in getPreIndexedAddressParts()
7813 if (Result.getNode()) { in LowerAsmOperandForConstraint()